452results about "Metal core circuit manufacture" patented technology

A multilayer resin wiring board includes a metal core substrate having a first main surface and a second main surface; a plurality of wiring layers located on the first and second main surfaces of the metal core substrate; a plurality of insulating resin layers, each intervening between the metal core substrate and the wiring layers and between the metal core substrate and the wiring layers and between the wiring layers; and a via formed on the wall of a through hole for connection to the metal core substrate extending through the insulating resin layers and the metal core substrate so as to establish electrical conductivity to the metal core substrate. The metal core substrate has a thin portion which is thinner than the remaining portion of the metal core substrate. The through hole for connection to the metal core substrate is formed through the thin portion by laser machining.

Multi-layer ground plane structures and methods of manufacture for integrated lead suspension flexures. A flexure in accordance with one embodiment of the invention includes an insulating layer, a plurality of traces on the insulating layer and a stainless steel base layer on the side of the insulating layer opposite the traces. The stainless steel base layer includes one or more void portions with voids in the base layer opposite the insulating layer from the traces and one or more backed portions with the base layer backing the traces. A plurality of patterned and transversely-spaced first conductive ground planes are located opposite the insulating layer from the traces at the void portions and backed portions of the stainless steel base layer. A continuous gold second conductive ground plane is located opposite the insulating layer and the first ground planes from the side of the insulating layer adjacent to the traces at the void portions and backed portions of the stainless steel base layer. The gold ground plane can be used as an etch stop during formation of the voids in the base layer.

A producing method of a suspension board with circuit that can permit a terminal portion to be formed by electrolysis plating without exposing a conductor layer to outside and also can reduce the number of processes, and the suspension board with circuit produced by the same producing method. After an insulating base layer 3 is formed on a suspension board 2 in a specific pattern in which a second opening 12 is formed, a thin metal film 13 is formed on an entire surface of the insulating base layer 3 and on a surface of the suspension board 2 including the second opening 12 exposed from the insulating base layer 3.Then, a conductor layer 4 is formed in the form of a wired circuit pattern on the thin metal film 13. Thereafter, the insulating cover layer 10 is formed in such a manner that a pad opening 11 is formed in the insulating cover layer 10 and then a pad portion 16 is formed in the pad opening 11 using the suspension board 2 as a lead portion of the electrolysis plating. Thereafter, a first opening 25 larger than the second opening 12 is formed in the suspension board 2 at a portion thereof corresponding to the second opening 12.

A multilayer wiring board comprises: a metal substrate as a core, a condenser dielectric layer formed to cover the metal layer, and a condenser electrode metal layer formed to cover the condenser dielectric layer, so that a condenser is defined by the metal substrate, the condenser dielectric layer and the condenser electrode metal layer. Integral with the structure of the wiring board is a discrete capacitor component with the metal substrate and the condenser electrode forming the two plates thereof with the dielectric layer there between. The condenser dielectric layer is provided with a first contact hole to communicate with the metal substrate and the condenser electrode metal layer is provided with a second contact hole to communicate with the first contact hole, the diameter of the second contact hole being larger than that of the first contact hole. An insulating layer is formed on the condenser electrode metal layer and is provided with a via hole to communicate with the metal substrate through the second and first contact holes. A metal substrate contact metal layer formed on an inner wall of the via hole, so that the metal substrate contact metal layer comes into electrical contact with the metal substrate.

An attachment surface for an implantable device has an irregular pattern formed through a process including masking, chemical or electrochemical etching, blasting and debris removal steps. Surface material is removed from the implant surface without stress on the adjoining material and the process provides fully dimensional fillet radii at the base of the surface irregularities. This irregular surface is adapted to receive the ingrowth of bone material and to provide a strong anchor for that bone material which is resistant to cracking or breaking. The surface is prepared through an etching process which utilizes the random application of a maskant and subsequent etching in areas unprotected by the maskant. This chemical etching process is repeated a number of times as necessitated by the nature of the irregularities required in the surface. The blasting and debris removal steps produce microfeatures on the surface that enhance the ingrowth of bone material.

Prepregs, laminates, printed wiring board structures and processes for constructing materials and printed wiring boards that enable the construction of printed wiring boards with improved thermal properties. In one embodiment, the prepregs include substrates impregnated with electrically and thermally conductive resins. In other embodiments, the prepregs have substrate materials that include carbon. In other embodiments, the prepregs include substrates impregnated with thermally conductive resins. In other embodiments, the printed wiring board structures include electrically and thermally conductive laminates that can act as ground and / or power planes.

A method for fabricating copper-faced electronic modules is described. These modules are mechanically robust, thermally accessible for cooling purposes, and capable of supporting high power circuits, including operation at 10 GHz and above. An imprinting method is described for patterning the copper layers of the interconnection circuit, including a variation of the imprinting method to create a special assembly layer having wells filled with solder. The flip chip assembly method comprising stud bumps inserted into wells enables unlimited rework of defective chips. The methods can be applied to multi chip modules that may be connected to other electronic systems or subsystems using feeds through the copper substrate, using a new type of module access cable, or by wireless means. The top copper plate can be replaced with a chamber containing circulating cooling fluid for aggressive cooling that may be required for servers and supercomputers. Application of these methods to create a liquid cooled supercomputer is described.

Methods for the production of insulated, conductive through-features in conductive core materials for electronics packaging are disclosed. Invention methods employ protective mask technology in order to facilitate the selective removal of material from planar conductive core material that has been encapsulated in electrically insulated materials. By filling the cavity in the conductive core material with an electrically insulated material, the through-feature is electrically isolated from the remainder of the core material. In this manner, a conductive through-feature that completely transverses the core of the substrate board is created. Also provided are planar substrates for multilayer printed circuit boards, or chip carriers, comprising the conductive through-features produced by invention methods.

A concentric ‘conductor within a via’ RF interconnect architecture, has an inner via through which at least one RF signal conductor passes. The inner conductive via is coaxially formed within and stably coaxially aligned within an outer conductive via, which serves as a coaxial ground plane that completely surrounds the inner conductive via. The outer conductive via passes through dielectric layers of microstrip or stripline structures on opposite sides of a multi printed circuit laminate.

This invention relates generally to a structure and process for thin film interconnect, and more particularly to a structure and process for a multilayer thin film interconnect structure with improved dimensional stability and electrical performance. The invention further relates to a process of fabrication of the multilayer thin film structures. The individual thin film structure is termed a compensator, and functions as both a ground / reference plane and as a stabilizing entity with regard to dimensional integrity. The compensator is comprised primarily of a metal sheet having a metallized via pattern and high-temperature stable polymer as an insulator.

Provided are: a light emitting module capable of ensuring a high heat-dissipating property and mountable in any of sets in various shapes; and a method for manufacturing the light emitting module. The light emitting module mainly includes: a metal substrate; an insulating layer covering the upper surface of the metal substrate; a conductive pattern formed on the upper surface of the insulating layer; and a light emitting element fixedly attached to the upper surface of the metal substrate and electrically connected to the conductive pattern. Furthermore, a groove is formed in the metal substrate, and then the metal substrate is bent. Thus, a bent portion is formed in the metal substrate.

An electrical assembly which includes a circuitized substrate including a first plurality of dielectric and electrically conductive circuit layers alternatively oriented in a stacked orientation, a thermal cooling structure bonded to one of the dielectric layers and at least one electrical component mounted on the circuitized substrate. The circuitized substrate includes a plurality of electrically conductive and thermally conductive thru-holes located therein, selected ones of the thermally conductive thru-holes thermally coupled to the electrical component(s) and extending through the first plurality of dielectric and electrically conductive circuit layers and being thermally coupled to the thermal cooling structure, each of these selected ones of thermally conductive thru-holes providing a thermal path from the electrical component to the thermal cooling structure during assembly operation. The thermal cooling structure is adapted for having cooling fluid pass there-through during operation of the assembly. A method of making the substrate is also provided.

A light source module including a substrate, a plurality of light emitting devices installed on the substrate, and a plurality of lenses installed on the substrate to cover the plurality of light emitting devices, respectively, and each of the plurality of lenses having a pair of open end portions facing one another, the plurality of lenses arranged such that an open end portion of one lens faces an opened end portion of an adjacent lens is provided.

A suspension board with circuit permits a terminal portion to be formed by electrolysis plating without exposing a conductor layer to outside and a production method thereof. After an insulating base layer is formed on a suspension board in a specific pattern in which a second opening is formed, a thin metal film is formed on the insulating base layer and on the suspension board including the second opening exposed from the insulating base layer. A conductor layer is formed in the form of a wired circuit pattern on the thin metal film. An insulating cover layer is formed with a pad opening therein, and a pad portion formed in the pad opening using the suspension board as a lead portion of the electrolysis plating. A first opening larger than the second opening is formed in the suspension board at a portion thereof corresponding to the second opening.

A composite multi-layer substrate comprising a flat plate-like core member formed of a material having an excellent electric conductivity, an excellent heat conductivity, and a high rigidity, a front resin layer and a rear resin layer covering at least the front and rear surfaces of the core member, and a bottomless hole formed in the core member through the front and rear sides of the core member, wherein an electronic component is installed in the bottomless hole, whereby since the strength of the composite multi-layer substrate can be assured by the rigidity of the core member, conventional prior art glass cloth can be eliminated, deterioration in the electric characteristics caused by ion migration can be avoided and will result in reduced production cost.

A disk drive suspension circuit has copper signal conductors connected by vias through an insulative layer to respective stainless steel flying leads. The stainless steel flying leads are activated and plated with one or more metals, with a final layer over the flying lead being a layer such as gold, suitable for bonding to form bond pads. The gold bond pads may be attached using thermosonic welding, solder ball bonding, or other suitable methods to an electrical component such as wires or a the disk drive's pre-amp circuit.

The present invention is provided with a composite electronic device comprising an inductor element and an ESD protection element formed between two magnetic substrates, wherein the inductor element includes insulation layers made of a resin, and conductor patterns formed on the insulation layers, the ESD protection element includes a base insulation layer, a pair of electrodes arranged via gap formed therebetween on the base insulation layer, and an ESD absorbing layer arranged at least between the electrodes, and the ESD absorbing layer includes a composite material having an insulation inorganic material and a conductive inorganic material discontinuously dispersed in a matrix of the insulation inorganic material.

A method of making a PCB having an integral heat spreader and / or central ground plane includes forming one or more first openings in a first layer of a metal at selected locations and filling the. openings with an electrically insulating material. The first sheet is laminated between second and third layers of a metal interleaved with first and second layers of a dielectric material. At least one second opening is formed through the insulating material in one of the first openings, and at least one third opening is formed in the laminate at a position displaced from the first openings. The upper and lower layers of metal are electrically connected to each other through the at least one second and third openings to define "vias" through the laminate. The vias comprise "clearance vias" from which the first metal sheet is electrically isolated, and "thermal vias" to which the first metal sheet is electrically connected. The thermally enhanced PCB is fabricated using only conventional PCB fabrication techniques.

In order to provide a new production method of a suspension board with circuit capable of preventing deterioration of the outward appearance and defects in products caused by a metal supporting layer, and further capable of forming an electroless nickel plating layer having an even thickness in a reliable manner, an insulating base layer is first formed on a supporting board, and a chromium thin film and a copper thin film are formed next sequentially on the surface of the supporting board exposed from the insulating base layer and on the entire surface of the insulating base layer. Subsequently, a plating resist is formed in a reversal pattern with respect to the wired circuit pattern on the surface of the copper thin film, and a conductor layer is formed on the surface of the copper thin film exposed from the plating resist by electrolytic plating. The plating resist is removed after an electroless nickel plating layer is formed on the conductor layer. Subsequently, the copper thin film and the chromium thin film are removed sequentially, and an insulating cover layer is formed next.

A method for forming an electrical interconnect to the spring metal layer in an integrated lead suspension or suspension component of the type having a multi-layer structure including a spring metal layer and a conductor layer separated by a dielectric insulator layer. The method includes forming an aperture through at least one of either the spring metal and conductor layers, and optionally through the dielectric layer, at an interconnect site. A first mass of malleable conductive metal is inserted into the aperture. The mass of metal is then coined to form a stud that engages at least the spring metal layer at the interconnect site.

The invention relates to a method for manufacturing a dual-layer sandwich metal base PCB (printed circuit board) with high thermal conductivity. According to the method, a copper base or aluminum base is used for replacing the FR4 insulation material base or ceramic base in the prior art. According to the invention, the high terminal conductively of metal is utilized, so that heat threats to most electronic power devices and an LED (light emitting diode) on the PCB can be greatly reduced or eliminated, thus the lowest running temperature, greatest luminosity and longest service life of the LED can be ensured, therefore, the PCB is an ideal carrier board for the electronic power devices and an LED array.

A semiconductor device that includes a metal substrate including a top surface, a bottom surface and four side surfaces, a conductive pattern insulated from the metal substrate, and a semiconductor element mounted on and electrically connected to the conductive pattern. The top surface is insulated. Each of the side surfaces of the metal substrate includes a first inclining side surface and a second inclining side surface so as to form a convex shape protruding outwardly between the top surface and the bottom surface of the metal substrate, and the first inclining side surfaces of a pair of two opposing side surfaces are smaller than corresponding first inclining side surfaces of another pair of two opposing side surfaces.

A method for forming insulating precursors to via holes formed through conductive and semiconductive substrates includes use of stereolithographic processes. An unconsolidated material is introduced into a precursor hole, then regions of the unconsolidated material that are located adjacent to the surface of each precursor hole are selectively consolidated to form an insulative coating thereon. This process may be conducted once to form a single-layered insulative coating or multiple times to form multilayered insulative coatings. Subsequently, unconsolidated material may be removed to expose a via hole that extends through the insulative coating. Structures that include via holes and conductive vias that have been insulated in this manner are also disclosed, as are systems for forming the insulative coatings.

A semiconductor package board for mounting thereon a semiconductor chip includes a metal base having an opening for receiving therein the semiconductor chip and a multilayer wiring film layered onto the metal base. The semiconductor chip is flip-chip bonded onto the metal pads disposed on the multilayer wiring film within the opening. The surface of the metal base is flush with the top surface of the semiconductor chip received in the opening. The resultant semiconductor device has a larger number of external pins and a smaller deformation without using a stiffener.

This invention relates generally to a structure and process for thin film interconnect, and more particularly to a structure and process for a multilayer thin film interconnect structure with improved dimensional stability and electrical performance. The invention further relates to a process of fabrication of the multilayer thin film structures. The individual thin film structure is termed a compensator, and functions as both a ground / reference plane and as a stabilizing entity with regard to dimensional integrity. The compensator is comprised primarily of a metal sheet having a metallized via pattern and high-temperature stable polymer as an insulator.

Methods and devices for cooling printed circuit boards having at least one heat source are disclosed and described. Such a device may include a dielectric layer disposed onto a surface of a substrate. The dielectric layer may include a plurality of carbonaceous particles disposed in a dielectric material. In one aspect, the carbonaceous particles may be diamond particles. Furthermore, a circuit including a heat source may be disposed onto a surface of the dielectric layer opposite to the substrate such that the circuit is thermally coupled to the dielectric layer. Additionally, the dielectric layer may be configured to accelerate heat generated by the heat source away from the heat source.

A multilayer wiring board comprises: a metal substrate as a core, a condenser dielectric layer formed to cover the metal layer, and a condenser electrode metal layer formed to cover the condenser dielectric layer, so that a condenser is defined by the metal substrate, the condenser and the condenser electrode metal layer. The condenser dielectric layer is provided with a first contact hole to communicate with the metal substrate and the condenser electrode metal layer is provided with a second contact hole to communicate with the first contact hole, the diameter of the second contact hole being larger than that of the first contact hole. An insulating layer is formed on the condenser electrode metal layer and is provided with a via hole to communicate with the metal substrate through the second and first contact holes. A metal substrate contact metal layer formed on an inner wall of the via hole, so that the metal substrate contact metal layer comes into electrical contact with the metal substrate.

A circuit board layer 2 in accordance with the present invention includes a conductive sheet 4 sandwiched between an insulating top layer 10 and an insulating bottom layer 14. The top and bottom layers 10 and 14 and the conductive sheet 4 define the circuit board layer 2 having an edge that includes an edge 20 of the conductive sheet 4. An insulating edge layer 18 covers substantially all of the edge 20 of the conductive sheet 4.

A multilayer circuit board for mounting a semiconductor element thereon, comprising a core substrate of a metal material and a plurality of wiring layers stacked on either side of the core substrate, each of the stacked wiring layers being isolated from an adjacent wiring layer by an insulating layer interposed therebetween, the multilayer circuit board having an area at which a heat spreader for dissipating heat generated from the semiconductor element mounted on the circuit board is to be joined to the multilayer circuit board, wherein the multilayer circuit board allows the heat spreader to be joined to the core substrate without the insulating layers being interposed therebetween. A semiconductor device using the multilayer circuit board is also disclosed.