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109results about How to "Ensure interval" patented technology

High rigidity and light space camera lens cylinder and test method for vibration resistance stability thereof

The invention discloses a high rigidity and light space camera lens cylinder and a test method for vibration resistance stability thereof. The cylinder comprises a cylinder body, a main mirror flange,a secondary mirror flange and a reinforcing rib. The cylinder body is a hollow cylinder. One end of the cylinder body is provided with a main mirror flange for connecting a space camera main mirror,and the other end of the cylinder is provided with the secondary mirror flange for connecting the space camera secondary mirror. The outer side of the cylinder body is provided with a reinforcing ribfor reinforcing the structure. The cylinder body, the main mirror flange, the secondary mirror flange and the rib are integrally formed by three-dimensional braiding silicon carbide. According to theinvention, the overall structure of the lens cylinder is optimized by integrally forming the cylinder body, the flanges and the reinforcing rib through using the three-dimensional braiding of siliconcarbide materials, and the defect that the traditional metal support structure is too heavy and has a large self-expansion coefficient is overcome; by designing the vibration resistance stability testmethod of the lens cylinder structure, the stability of the entire lens cylinder is ensured; and the problem of quite poor stability of the conventional resin-based composite material is solved.
Owner:BEIJING RES INST OF SPATIAL MECHANICAL & ELECTRICAL TECH

A three-dimensional flash memory array unit operation method with variable programming stages

ActiveCN109903799AProgramming accuratelyNarrow spatial distributionRead-only memoriesUnit operationBlock structure
The invention discloses an operation method of a three-dimensional flash memory array unit with variable programming stages. The operation method comprises the following steps: S1, receiving an erasing operation instruction and address information; S2, erasing the selected block structure; S3, receiving a multi-level programming instruction and address information; S4, judging whether the addressoverflows or not, if yes, entering S5, otherwise, receiving programming level information of the target unit, and entering S6; S5, completing the programming operation of the selected block structure,and ending; S6, performing multi-level programming operation on the current flash memory unit according to the multi-level programming instruction, the address information and the programming level information of the target unit; S7, judging whether the difference of the threshold voltages is not smaller than the preset minimum interval voltage or not, if yes, changing the address information, entering S3, and performing the programming operation of the next flash memory unit; And otherwise, carrying out multi-level programming operation on the current flash memory unit for no more than the preset number of times again. The flash memory unit is subjected to target stage number programming, the threshold voltage of the flash memory unit is accurate to the preset value, and therefore the data state of the flash memory unit is accurately controlled.
Owner:HUAZHONG UNIV OF SCI & TECH
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