The invention provides a silicon-based wrap gate transistor with a buried-channel structure, and belongs to the field of electronic semiconductor devices. The transistor comprises a channel region, a gate medium, a gate region, a source region, a drain region and a source/drain terminal epitaxial region, wherein the channel region has a silicon nanowire structure with three layers, a cylindrical channel region lower layer is arranged inside the channel region, and the channel region and the channel region upper layer are wrapped outside the channel region lower layer respectively; impurities with opposite types are mixed into the channel region upper layer and the channel region lower layer; a layer of gate medium region is covered outside the channel region upper layer; and the gate region is positioned on the outer layer of the gate medium. In a preparation method, the silicon-based wrap gate transistor with the buried-channel structure which is suitable to be applied to high-speed circuits is prepared on the basis of an oxidizing dephlegmation technology, so that the phenomena of descending in mobility and serious random telegraph noise which are caused by the polycrystal orientation of wrap gate devices are avoided.