42 results about "Multiple zeros" patented technology

The invention discloses a zero-expansion dot matrix cylindrical shell structure used for a spacecraft and a design method thereof. According to the zero-expansion dot matrix cylindrical shell structure, a zero-expansion planar structure (5) is curved to form a cylinder, the zero-expansion planar structure (5) is obtained by spatially translating and interconnecting multiple zero-expansion basic cells (4) on a plane, each zero-expansion basic cell (4) is obtained by connecting four same micro-structures(3) at a top point, every two adjacent micro-structures (9) in each basic cell (4) are perpendicular to each other, and each micro-structure (3) is a triangle composed of a bottom edge (1) and two bevel edges (2). When the zero-expansion dot matrix cylindrical shell structure is designed, two different types of metal materials are selected to respectively serve as the material of the bottom edges (1) and the material of the bevel edges (2); then geometric dimension of the microstructure (3), the height and diameter of the zero-expansion dot matrix cylindrical shell structure (6), the number of basic cells in the annular direction, the number of basic cells in the height direction, the length of each bottom edge (1), the length of each bevel edge (2) and the section shape are designed in sequence; a finite element method is adopted for simulation; and a final design scheme is obtained through adjusting the length of each bottom edge (1) and the length of each bevel edge (2).

The invention includes: a bitstream updating output unit configured to receive a bitstream and update a syntax element located at a beginning of the bitstream according to a code length thereof and outputs the syntax element; a bitstream decoding unit configured to decode, in response to a decode request, a variable-length code of the syntax element outputted from the bitstream updating output unit; a zerosLeft updating unit configured to update zerosLeft based on a specific syntax element decoded by the bitstream decoding unit; a run_before remaining number updating unit configured to update a run_before remaining number based on a specific syntax element decoded by the bitstream decoding unit; and a syntax selection unit configured to select a syntax element to be decoded by the bitstream decoding unit. Thus, multiple zero run_before syntaxes and one non-zero run_before syntax, or multiple zero run_before syntaxes are decoded all at once.

A multi-stage, push-pull driven, resonant DC-AC converter ties the center-taps of primary windings of respective push-pull stages together, and drives each center-tap with a current source. Tying the center-taps of the primary windings of the respective DC-AC converters' transformers together forces the voltages at these locations to be the same, so as to achieve mutual resonant synchronization between the two stages. Connecting the center-taps to a current source provides the necessary power for each stage and allows for a variation in current between stages, as the center-tap voltages track one another. The tied-together center-tap voltage is monitored to obtain the zero voltage switching required for efficient operation of switching devices of each DC-AC converter stage.

The invention provides multiple zero temperature coefficient optical wave plates or optical wave polarization state converters. The optical wave plate or optical wave polarization state converter is formed by the way that two refractive optical mediums HB1 and HB2 the fast axes of which are mutually vertical or parallel are welded or connected together. The length of HB1 is L1, beat length is LB1, temperature coefficient of beat length is KB1, phase delay of linear polarized light the polarization direction of which is respectively parallel with fast axis and slow axis of HB1 after passing through HB1 is Phi1; the length of HB2 is L2, beat length is LB2, temperature coefficient of beat length is KB2, phase delay of linear polarized light the polarization direction of which is respectivelyparallel with fast axis and slow axis of HB2 after passing through HB2 is Phi2; the length of optical wave plate and optical wave polarization state converter formed by HB1 and HB2 according to the method is L which is equal to L1+L2, and phase delay theta is Phi1-Phi2 or Phi1+Phi2. When KB1 is different from KB2, the optical wave plate and optical wave polarization state converter designed according to the method provided by the invention have phase delay theta with the temperature coefficient of zero.

This invention relates to a cascade multiple zero-type matrix rectifier, in which, a general input filter is connected between a net and a step-down transformer to get sine-wave input current, the step-down transformer includes n secondary windings with Yn spliced mid lines, the phase of all the three-phase windings is the same, the rectifier array is arrayed in a 1 row x n lines by n zero-matrix rectifier units, each line of which is connected with the seconday winding of the step-down transfornmer, and the outputs of the rectifier units are serial orderly to form a DC output, the general controller is responsible for regulating work of the entire system and connected with the branch controllers by signal cables to control the work of the rectifier units in the array.

The invention discloses a single-phase grounding leakage line selection method and device of the industrial and mineral low-tension electrical network. A single-phase leakage line selection module of the device comprises a zero-sequence fundamental-wave frequency-multiplication phase discriminating device, a zero-sequence voltage signal u0 processing circuit, a fault discriminating start voltage signal u0q processing circuit, a three-phase electrical network insulation level monitoring signal Ujy processing circuit and multiple zero-sequence current signal i0 processing circuit. According to the invention, frequency multiplication is directly carried out on the fundamental-wave zero-sequence current and voltage signals, the signals after frequency multiplication is sued for selecting and discriminating the single-phase grounding leakage fault, and such method is used for the first time domestically. Via the zero-sequence fundamental-wave frequency-multiplication phase discrimination method, selection time for the single-phase grounding leakage fault is shortened to less than or equivalent to 10ms which is greatly shorter than the protective motion time prescribed in the standard JB6314-92, and the technical problem that rapid and accurate leakage selection cannot be realized in the industrial and mineral low-tension multilevel electrical network with the zero-sequence reactor compensation function.

The invention discloses a multiple-zero miniaturized inlaid dual-bandpass filter. A third harmonic oscillator and a fourth harmonic oscillator adopt 1 / 4 of an SIR structure, and each of the third harmonic oscillator and a fourth harmonic oscillator comprises a low impedance line part and a high impedance line part; a first harmonic oscillator and a second harmonic oscillator adopt 1 / 4 of the annular SIR structure, each of the first harmonic oscillator and the second harmonic oscillator comprises a rectangular ring part and a linear part, the ground terminals of the linear parts of the first harmonic oscillator and the second harmonic oscillator are connected with each other and share a first ground connection through hole, and the other end points of the linear parts are connected with thetop points of the rectangular ring parts respectively; a third harmonic oscillator and a fourth harmonic oscillator are arranged inside the rectangular rings of the first harmonic oscillator and thesecond harmonic oscillator, and the ground terminals of the high impedance lines are connected to a second ground connection through hole and a third ground connection through hole respectively; and an input terminal transmission line and an output terminal transmission line are positioned on the outer side of the first harmonic oscillator and the outer side of the second harmonic oscillator. A plurality of transmission zeros can be introduced into the filter, and then the positions of the zeros of the filter can be changed according to different adjusting filtering parameters of the item.

The invention discloses a zero-power-consumption standby energy-saving switch module with a button switch, relating to the technical field of energy-saving switches. The zero-power-consumption standbyenergy-saving switch module is characterized by comprising an L1 end and an N2 end connected to a 220V power supply, an N4 end and an L3 end connected to the power supply input end of a control electric appliance, and a button switch AN1, a first capacitor C1, a bridge rectifier, a first voltage regulator tube VD1, a first resistor R1, a second capacitor C2, a first triode Q1, a second resistor R3, a third resistor R4, a fourth resistor R5, a fifth resistor R6, a sixth resistor R7, a third capacitor C3, a fourth capacitor C4, a second triode Q2, a seventh resistor R8, a photoelectric couplerIC1, an eighth resistor R9 and a bidirectional thyristor VT1. The module disclosed by the invention is simple in structure, the button switch structure is easy to control, the control electric appliance can be rapidly turned on or turned off through the button switch, the phenomenon that the power consumption is zero when the control electric appliance is in a standby state can be achieved, the energy can be saved, and the cost can be reduced; and by connecting multiple zero-power-consumption standby energy-saving switch modules with the button switches in parallel, the function of performingmulti-cascade control on a lamp can be achieved.

The invention provides a two-stage superconducting quantum interference apparatus's magnetic flux-voltage conversion device, method and application thereof. Through the amplification and combination of current's positive feedback and limiting amplification, the magnetic flux-voltage transfer rate is improved and the outputted magnetic amplitude is less than 2[phi]0, which avoids multiple zero points of transmission. At the same time, the SQUID magnetic detection module, using an under-feedback principle, achieves a magnetic flux detector that can realize self-reset and has a monotonic transfer characteristic to ensure that the outputted magnetic flux of the SQUID magnetic flux amplification module is conducted at a fixed operating point under a uniquely defined transmission characteristic for magnetic-voltage conversion and that the problem of multi-value transmission characteristics is addressed. The invention has the advantages that the two-stage SQUID amplifying module can improve the magnetic flux-voltage transmission rate and the single operating point cycle value in the transmission characteristic is obtained to avoid the multi-value problem; the operation is simple and the noise performance is improved greatly and can provide a practical high-performance SQUID magnetic sensor, thus a practical high-performance SQUID magnetic sensor can be formed.

The invention relates to a multi-tap electric reactor-based capacitive load power factor compensation circuit comprising a load voltage-current signal processing circuit and a compensation control and power supply circuit. To be specific, the multi-tap electric reactor-based capacitive load power factor compensation circuit is composed of a voltage transformer VS1, a current transformer CS1, a processor IC1, a drive chip IC2, a voltage-stabilized source module U0, an A solid-state relay U1, a B solid-state relay U2, a C solid-state relay U3, a D solid-state relay U4, an E solid-state relay U5, an F-solid state relay U6, a G solid-state relay U7, an electric reactor L1, a reference tube D1, an upper voltage-regulator tube D2, a lower voltage-regulator tube D3, and a load resistor R1 and the like. According to the invention, disturbance-free switch controlling is carried out on a power grid by using the multiple zero-crossing alternating-current solid-state relays and one multi-tap compensation reactor, thereby realizing multi-level compensation control of a power factor; and the requirements of power factor compensation control of most of capacitive loads can be met. Moreover, the provided circuit has advantages of high cost performance, good universality, and high security and reliability.

The invention relates to an access point voltage phase detection method of a line inductance based photovoltaic inverter by applying multiple zero-crossing points, which is simple, has small computation quantity, and can effectively detect the zero-crossing points and determine the phase of an actual grid voltage. The zero-crossing point moment of the actual gird voltage is accurately calculated through detecting before-and-after boundaries of the multiple zero-crossing point region by utilizing a unique characteristic that a multiple zero-crossing point region of the access point voltage wave form of the photovoltaic inverter is in strict bilateral symmetry on the zero-crossing points of the actual grid voltage, and further the specific phase at the current time in the grid voltage is determined .