A non-
volatile memory device includes a tunnel
oxide layer, a charge storage layer, a blocking insulating layer, and a gate
electrode that are sequentially stacked, as well as an
impurity diffusion layer in an active region at both sides of the gate
electrode. The gate
electrode crosses active regions between device isolation
layers formed in a predetermined area of a
semiconductor substrate, and an edge of the charge storage layer is extended to have a protruding part that protrudes from the gate electrode. In order to form a charge storage layer having a protruding part, a stack insulating layer including first to third insulating
layers is formed in an active region between the device isolation
layers formed in the substrate. A plurality of gate electrodes crossing the active region are formed on the stack insulating layer, and a sidewall spacer is formed on both sidewalls of the gate electrode. Using the sidewall spacer and the gate electrode, the stack insulating layer is etched to form a charge storage layer that protrudes from the sidewall of the gate electrode.