36results about How to "Simplify layout and routing" patented technology

This invention relates to an error-check and error-correction code circuit for storages and a method for reading and writing data by it taking matrix G as a logic core including: a decoding process and a coding process and a method for writing in data by this method. Apart from a decoding process and an error correction process, it also includes a coding process, and finally puts forward an error check and correction and coding circuit for realizing said two methods including a decoder, an error-correction circuit, a coding circuit, an interface circuit and related data transmission circuit so as to simplify layout of bottom circuit and speed up operation speed of circuits.

The invention relates to a wireless sensor network system used for environmental monitoring inside a spacecraft. The wireless sensor network system comprises: a local network, that is, a data collection and transmission network, which employs a wireless networking technology to collect and transmit an environmental parameter inside a spacecraft; a gateway, which is used for carrying out bridging between the local network and a spaceborne data network / bus so as to realize data exchange between the local network and the spaceborne data network / bus; the spaceborne data network / bus, which is used for realizing communication between terminals on the bus and between a terminal and a spaceborne computer; and the spaceborne computer, which is used for carrying out processing on sensor data collected by the local network and emitting an appropriate instruction according to a result.

The invention provides a shift register unit, a grid driving circuit and a display apparatus, and belongs to the technical field of display. The shift register unit comprises an input module, an output module, a pull-down control module and a pull-down module, wherein the input module is connected with the output module and the pull-down control module, the pull-down module is connected with the pull-down control module and the output module, the input module, the output module and the pull-down control module are convergent to form a first-node PU, and the control end of the pull-down module is provided with a second-node PD. According to the technical scheme provided by the invention, the shift register unit can be formed by use of a quite small number of thin film transistors, the structure is simple, the area occupied by a grid driving circuit can be saved, and power consumption of the grid driving circuit is reduced.

The invention discloses a focal plane assembly capable of realizing same viewing field splicing, belonging to the technical field of aerospace optical remote sensors. The focal plane assembly comprises three imaging circuit boards, three photosensitive devices, two reflecting mirrors, two bosses and a structural frame, wherein the three photosensitive devices are respectively positioned on three imaging circuit boards and are distributed on three planes; reflecting mirrors are cross to realize twice reflection and once perpendicular incidence, thereby overcoming the detect that image elementsare leaked when a big-shell photosensitive device is spliced by the traditional two-surface layout; and the physical structures of the photosensitive devices or the circuit board can be prevented from mutually interfering on the splicing direction, the photosensitive surfaces of the three photosensitive devices are connected end to end, and parts of regions of the junction are overlapped so as torealize seamless splicing. According to the focal plane assembly, three (which can be expanded to multiple pieces) photosensitive devices, especially three big-shell devices, can be subjected to seamless same viewing field splicing, the size requirement on an imaging circuit is lowered, the performance is improved, the cost is lowered, and the focal plane size is enlarged so as to enlarge the ground coverage width.

The invention discloses an autonomous reconstruction soft configuration method for a SoPC chip. The autonomous reconstruction soft configuration method is obtained by researching an autonomous reconstruction soft configuration circuit technology of the SoPC chip. According to the autonomous reconstruction soft configuration method, the characteristic that configuration interfaces are controllable is fully used, the GPIO interface of a processor is connected with the configuration interface of an FPGA chip, a physical data path and a configuration link are constructed, time sequence configuration and data configuration are achieved through control over signal output and collection of the GPIO interface and level fluctuations of the interfaces, and then autonomous reconstruction is completed. Compared with a traditional reconstruction configuration method, autonomous reconstruction of a system can be achieved without additionally arranging a special configuration chip for an FPGA in the SoPC chip, the size of the SoPC chip is effectively reduced, few signals for controlling autonomous reconstruction exist in the SoPC chip, and therefore the designing complexity is lowered.

The invention provides a temperature sensing device with an UHFRID communication function, and the device comprises an antenna, a radio frequency energy conversion module, a temperature sensor and a radio frequency transmission module. The antenna is sued for receiving a superhigh frequency signal in a free space. The radio frequency energy conversion module is connected with the antenna and converts the superhigh frequency signal into an electrical signal. The temperature sensor acquires the temperature of a measured object and is electrically connected with the radio frequency energy conversion module, and the radio frequency energy conversion module supplies power to the temperature sensor. The radio frequency transmission module is separately and electrically connected with the radio frequency energy conversion module, the temperature sensor and the antenna, the radio frequency energy conversion module supplies power to the radio frequency transmission module, and a temperature signal acquired by the temperature sensor is wirelessly transmitted through the radio frequency transmission module and the antenna.

This invention relates to an error-check and error-correction code circuit for storages and a method for reading and writing data by it taking matrix G as a logic core including: a decoding process and a coding process and a method for writing in data by this method. Apart from a decoding process and an error correction process, it also includes a coding process, and finally puts forward an errorcheck and correction and coding circuit for realizing said two methods including a decoder, an error-correction circuit, a coding circuit, an interface circuit and related data transmission circuit so as to simplify layout of bottom circuit and speed up operation speed of circuits.

The invention relates to a self-supply circuit for a flyback power converter. A bus voltage supply module supplies power to a control chip after the bus is powered on. After the control chip is powered on, the primary winding of the transformer is controlled to work by the power supply control module, and the secondary auxiliary winding of the transformer obtains voltage from the coupling of the primary winding to supply power to the secondary winding of the transformer. The power supply module of the secondary winding of the transformer is charged to supply power to the control chip. The switching module turns off the power supply output of the bus voltage supply module to the control chip after the secondary winding power supply module of the transformer is fully charged. After the powersupply module of the secondary winding of the transform is charged, The bus voltage is cut off, and the auxiliary winding supplies power to the control chip alone. If the power supply module of the secondary winding of the transformer fails or the PWM driving output duty ratio of the control chip is small, and the power supply control module is abnormal, etc., the fault recovery can be carried out, and the control chip can not be powered down.

The invention belongs to computer hardware technology and relates to an implementation method of a circuit board configuration circuit. According to the invention, a programmable logic device is usedfor implementing functions of resetting, electric level conversion and signal driving and a resetting circuit, an electric level converting circuit and a signal driving circuit using dedicated chips are replaced. According to the invention, no dedicated chips are required, the chip variety is small and the reliability is high. By using the programmable logic device, layout wiring can be simplified. Through a re-programming method, the resetting output and interconnection relation of the configuration circuit can be adjusted. A problem of semi-stable state caused by resetting is solved. Dynamicswitching of a redundancy circuit is realized.

The invention discloses a goods picking system, a related method, a device and equipment. The goods picking system sends a positioning request for a target business object to a server through goods picking equipment; the server determines an identifier of a target roadway lamp and an identifier of a target storage location label, wherein the target roadway lamp and the target storage location label are corresponding to the target business object; lamp lighting instruction information aiming at the target roadway lamp and the target storage location label is sent to lamp control equipment; and the lamp control equipment turns on the target roadway lamp and the target storage location label lamp according to the instruction information. By adopting the processing mode, when a picking person needs to search for commodities in a physical store warehouse, the picking person can submit a commodity positioning request to the server, and the goods shelf storage location and the roadway where the corresponding commodities are located can be turned on; therefore, the commodity positioning speed can be effectively improved, the picking speed is improved, and an order is ensured to be performed on time.

The invention discloses a high-end storage PCIE interchanger and a management module thereof. The management module comprises a substrate and a CPU board card used for controlling and monitoring the PCIE interchanger, the CPU board card is connected with the substrate in a detachable manner, the substrate is provided with an external communication interface providing backboard PCIE signals, and the substrate is also provided with an external output network interface and an external output serial port for the CPU board card. When placement and routing are carried out to the management module of the high-end storage PCIE interchanger, placement and routing are carried out to the CPU board card and the substrate, the CPU board card and the substrate are modularized in design, and placement and routing are simpler. When the high-end storage PCIE interchanger is upgraded later, only the CPU board card needs to be upgraded again, placement and routing are carried out to the CPU board card again, then the upgraded new CPU board card is connected to the substrate, placement and routing of communication interfaces, output network interfaces and serial ports are avoided, the placement and routing difficulty level is further reduced, and the research and development cost is reduced at the same time.

The invention relates to a method and circuit for controlling output voltage of an isolated AC-DC (Alternating Current-Direct Current) power supply. The circuit can use a two-winding transformer (T2), wherein a PWM (Pulse Width Modulation) control chip (U2) in the circuit comprises an output voltage evaluation unit, a current comparison and logic control unit and a demagnetizing time detection unit, wherein the output voltage evaluation unit and the current comparison and logic control unit are electrically connected sequentially from input to output, and the demagnetizing time detection unit is located between the output voltage evaluation unit and an output terminal of the PWM control chip (U2) and is used for detecting the conducting time t1 and demagnetizing time t2 of the transformer. The method comprises the step of enabling V0 to reach a set value by using the relationship (represented by an equation shown in a drawing) among the output voltage V0 of the transformer, VAC, t1, t2 and the turns ratio n of the transformer. The method and the circuit have the advantages that the cost of a system is reduced, and the layout and wiring of the system are simplified.

The invention discloses a high-precision magnetic field detection and decoding circuit based on a CAN bus. Bipolar magnetic steel is designed and arranged in a rudder shaft, the magnetic steel rightlyfaces a magnetic coding chip, and the coding chip measures a rotating magnetic field; a special SSC interface is used for sending a measuring result to a main control chip MCU; and the MCU completesreceiving and decoding of the magnetic field to obtain a corresponding rotating angle of the rudder shaft. After the MCU completes calculation, digital signals are sent to a servo control circuit in real time through a CAN bus control module, and closed-loop control over a servo system is achieved. According to the high-precision magnetic field detection and decoding circuit based on the CAN bus,non-contact measurement of a system is achieved by adopting a non-contact measuring method based on magnetic field detection and decoding, and the working reliability of a product is improved. The difficulty of circuit design is greatly lowered based on a CAN bus communication mode, circuits can be implemented more easily in the distributing and wiring process, the space size of a circuit board can be effectively saved, and meanwhile the circuit design cost can be effectively saved.

The invention discloses a high-frequency and high-speed electronic circuit board based on a high thickness-radius ratio deep hole electroplating technology. The high-frequency and high-speed electronic circuit board comprises a master control board and a signal transmission module, wherein the master control board comprises a receiving chip and a driving chip and adopts a double-sided flexible circuit board, a polyester resin material is further arranged on an outer surface of the master control board, a printed circuit board with high reliability and relatively high flexibility is fabricated by taking the polyester resin material as a substrate, four holes are drilled in an upper right end of the master control board, an output end of the master control board is connected with a voltage regulation module and a rectification module, the voltage regulation module is connected with a pulse generation module through a receiving end signal detection module, a signal transmission module is connected with a signal detection module, and the signal detection module is connected with a DC-DC converter. The circuit board has high heat dissipation, light weight, miniaturization and thinness are achieved by reducing a size, so that a component device and a wire are integratedly connected.

The invention discloses a high-frequency and high-speed electronic circuit board based on a high thickness-radius ratio deep hole electroplating technology. The high-frequency and high-speed electronic circuit board comprises a master control board and a signal transmission module, wherein the master control board comprises a receiving chip and a driving chip and adopts a double-sided flexible circuit board, a polyester resin material is further arranged on an outer surface of the master control board, a printed circuit board with high reliability and relatively high flexibility is fabricated by taking the polyester resin material as a substrate, four holes are drilled in an upper right end of the master control board, an output end of the master control board is connected with a voltage regulation module and a rectification module, the voltage regulation module is connected with a pulse generation module through a receiving end signal detection module, a signal transmission module is connected with a signal detection module, and the signal detection module is connected with a DC-DC converter. The circuit board has high heat dissipation, light weight, miniaturization and thinness are achieved by reducing a size, so that a component device and a wire are integratedly connected.

The invention discloses a focal plane assembly capable of realizing same viewing field splicing, belonging to the technical field of aerospace optical remote sensors. The focal plane assembly comprises three imaging circuit boards, three photosensitive devices, two reflecting mirrors, two bosses and a structural frame, wherein the three photosensitive devices are respectively positioned on three imaging circuit boards and are distributed on three planes; reflecting mirrors are cross to realize twice reflection and once perpendicular incidence, thereby overcoming the detect that image elements are leaked when a big-shell photosensitive device is spliced by the traditional two-surface layout; and the physical structures of the photosensitive devices or the circuit board can be prevented from mutually interfering on the splicing direction, the photosensitive surfaces of the three photosensitive devices are connected end to end, and parts of regions of the junction are overlapped so as to realize seamless splicing. According to the focal plane assembly, three (which can be expanded to multiple pieces) photosensitive devices, especially three big-shell devices, can be subjected to seamless same viewing field splicing, the size requirement on an imaging circuit is lowered, the performance is improved, the cost is lowered, and the focal plane size is enlarged so as to enlarge the ground coverage width.

The invention provides a surge protection circuit integrated in a chip. The surge protection circuit integrated in the chip comprises a main bleeder circuit and a quick detection circuit. The main bleeder circuit comprises a first diode, a second diode, a second resistor and a first MOS (metal oxide semiconductor) tube. A cathode of the first diode is connected with a power end, an anode of the first diode is grounded through the second resistor, and a node between the first diode and the second resistor is a first node. A first connection end of the first MOS tube is connected with the power end, a second connection end of the first MOS tube is grounded, and a control end is connected with the first node. The quick detection circuit comprises a capacitor, a first resistor, a third diode and a second MOS tube. The capacitor is connected between the power end and the third diode, an anode of the third diode is grounded, and a node between the third diode and the capacitor is a second node. A first connection end of the second MOS tube is connected with the power end, a second connection end of the second MOS tube is connected with the first node, and a control end is connected with the second node. Compared with the prior art, the surge protection circuit integrated in the chip has the advantage that surge protection of an internal circuit of the chip can be realized.

The invention provides a partially-depleted silicon-on-insulator triode structure. The partially-depleted silicon-on-insulator triode structure comprises a buried oxygen layer, a collector electrode region, a base region, an ultra-shallow trench isolation region, a base electrode region and a collector electrode contact region, wherein the buried oxygen layer is arranged on a substrate, the collector electrode region is arranged on the buried oxygen layer, the base region is located on the collector electrode region, the ultra-shallow trench isolation region and the base electrode region are arranged on the two sides of the base region respectively, and the collector electrode contact region is arranged on the side, opposite to the base region, of the ultra-shallow trench isolation region; the doping concentration of the collector electrode contact region is larger than that of the collector electrode region, the collector electrode region is connected with the collector electrode contact region, and the collector electrode contact region, the ultra-shallow trench isolation region, the base region and the base electrode region are located on the surface of a silicon wafer. Moreover, the partially-depleted silicon-on-insulator triode structure further comprises a polycrystalline silicon emitting electrode arranged on the surface of the silicon wafer.

The invention discloses a layout and wiring method and device, equipment and a readable storage medium. According to the method and the device, for the functional module of which the data processing logic is matched with the star topology structure, the constraint modes with different constraint capabilities can be utilized to constrain each sub-module in the functional module to perform layout and wiring according to the star topology structure, so that each layout and wiring result is obtained; then, the layout wiring result meeting the preset index requirement is selected from all the layout wiring results to serve as the layout wiring scheme of the function module, layout wiring in the module can be simplified, the probability of occurrence of problems such as winding congestion, short circuit, time delay and function errors is reduced, line resources, chip power consumption and chip area are saved, and the production efficiency is improved. And a layout and wiring scheme meeting the preset index requirement can be selected, so that the performance, manufacturability and time sequence convergence effect of the chip can be improved. Correspondingly, the invention also provides a layout and wiring device, equipment and a readable storage medium, which also have the above technical effects.

The invention discloses a configuration method, device, processor and storage medium of electronic equipment. The method includes: determining a first register array in the electronic device, wherein the first register array is configured with a reset port; converting the first register array into a second register array, wherein the second register array is not configured with a reset port port; mapping the second register array as a memory; connecting the memory with an external circuit to obtain a configured electronic device, wherein the external circuit is provided with a third register array, and the third register array is configured with a reset port. The present invention solves the technical problem that the existing register array with a reset function cannot be mapped into a memory, thereby causing waste of chip resources of electronic equipment.

The invention relates to a power supply system and a power supply method in SDI mode. The system includes a control module and an SDI power supply module connected to the control module. The SDI power supply module detects the voltage and current signals input by the connected video input device and transmits them to the control module, and then the control module detects the voltage and current according to the detection module. The signal controls the working mode of the SDI power supply module; the SDI power supply module includes a power supply switch, a power switch, a first power supply, a second power supply and a first resistor, and one end of the power supply switch is respectively connected to the first power supply and the second power supply through the power supply switch , the other end of the power supply switch is connected to the first resistor, and the SDI power supply module realizes detection of voltage and current signals input by the video input device through the first resistor. The invention can reduce the wiring of the video monitoring, can realize the power supply of the camera and the signal transmission of the video by using a coaxial cable, improves the reliability of the system work and simplifies the layout and wiring of the system.

A SoPC chip self-reconfiguration soft configuration method, the SoPC chip self-reconfiguration soft configuration circuit technology is studied, and a SoPC chip self-reconfiguration soft configuration method is proposed, and the method of the invention fully utilizes the characteristics of the controllability of the configuration interface , connect the GPIO interface of the processor with the configuration interface of the FPGA chip, construct the physical data path and configuration link, realize the configuration timing and configuration data by controlling the signal output and collection of the GPIO interface, and change the interface level, and complete self-reconfiguration operate. Compared with the traditional reconfiguration configuration method, the method of the present invention can realize the autonomous reconfiguration operation of the system without adding an FPGA-specific configuration chip to the SoPC chip, effectively reducing the volume of the SoPC chip, and at the same time, the interior of the SoPC chip is used for control and realization. There are fewer signals for autonomous reconfiguration operations, which reduces design complexity.

The invention discloses a device for mixing hard disk control signals via a controller. The device comprises the controller and a hard disk backboard; at least a group of connection trough positions for connecting the controller; each group of connection troughs comprises a hard disk trough position for connecting a hard disk connector and an ID identification trough position for identifying the group of connection trough positions; connection pins adapted to the connection slot trough positions on the hard disk backboard are arranged on the controller; the connection pins comprise hard disk pins adapted to the hard disk trough positions and ID identification pins adapted to the ID identification trough positions; a management chip which is connected with the connection pins is arranged inthe controller; and at least one set of indicator codes which are same as the connection trough positions in the aspect of quantity and which are used for setting a hard disk corresponding to each control signal are burnt in the management chip. The device is capable of simplifying the Layout routing, decreasing the board layers and saving the cost.

The invention discloses an MIPI C-PHY signal generating method, device and system. The method comprises the following steps: 1) receiving a C-PHY signal starting parameter and image source data, and performing data management and flow control according to the starting parameter; 2) packaging a code stream in the starting parameter to form an LP signal group packet; 3) performing one-hot encoding on the data of the LP signal group packet, mapping an encoded LP signal to a 3-wire for transmission; 4) packaging the image source data, and distributing a packaged HS signal onto each lane; 5) encoding the HS signal, then outputting the encoded HS signal, and converting the parallel HS signal into a serial output of each wire; and 6) aliasing a high speed signal and a low speed signal to form a C-PHY signal source, and outputting the C-PHY signal source to a module. parallel 6lane is maximally supported, the data transmission speed of 17.1 Gbps per lane meets the throughput requirement of a C-phy module of any resolution on the market, the adaptability is high, the layout and wiring are simple, and the hardware cost is low, so that the MIPI C-PHY signal generating method, device and system are worthy of popularization and application.

The invention discloses a lawn lamp control circuit with three ports for control. The control circuit comprises a charging circuit, a light-operated circuit, a boosted circuit and an output feedback power supply circuit. The output feedback power supply circuit is used for achieving the purpose that stable currents are supplied for elements of the control circuit through electric energy generated after solar energy or wind energy is converted all the time under any state, and other external power sources are not needed for supplying power. In addition, after the output feedback power supply circuit is used for supplying power for the control circuit, one power supply port is eliminated, and therefore locating and wiring of the control circuit are simplified, and system cost is lowered.

The present invention discloses a MIPI C-PHY signal generation method, device and system. The method includes the steps of: 1) receiving C-PHY signal start parameters and image source data, and performing data management and flow control according to the start parameters; 2) Encapsulate the code stream in the startup parameters to form an LP signal package; 3) perform one-hot encoding on the data of the LP signal package, and map the encoded LP signal to 3-wire for transmission; 4) convert the image source Encapsulate the data, distribute the packaged HS signal to each lane; 5) encode the HS signal and then output it, convert the parallel HS signal into serial output of each wire line; 6) convert the high-speed signal and The low-speed signals are mixed to form a C-PHY signal source and output to the module. The present invention supports a maximum of 6 lanes in parallel, and the data transmission speed of each lane is 17.1Gbps, which meets the throughput requirements of C-phy modules with any resolution on the market. It has strong adaptability, simple layout and wiring, and low hardware cost. It is worthy of popularization and application. .

The invention provides a multi-concurrent RAM data transmission method and structure of an X-type link structure. The method comprises the following steps: mapping a plurality of physically independent sub-RAMs into a shared storage RAM; obtaining an interface corresponding to each core of the on-chip multi-core processor based on shared storage; arranging a multi-stage link transmission structurebetween the interface and the sub RAM, wherein each stage of link transmission structure is provided with a plurality of X-shaped structure routers; and forming a fixed transmission path between eachinterface and each sub RAM through the X-type structure router so as to send or respond to a data stream. According to the invention, the problem of difficult layout and wiring caused by too large area of the existing multi-concurrent RAM circuit and too complex arbitration circuit is solved, routing FIFO and arbitration circuit are not needed, so that the hardware resource overhead is small, only a small number of fan-in and fan-out x-type routers are provided, the layout and wiring are simplified, and the main frequency of the circuit is effectively improved.

The invention relates to a self-supply circuit for a flyback power converter. A bus voltage supply module supplies power to a control chip after the bus is powered on. After the control chip is powered on, the primary winding of the transformer is controlled to work by the power supply control module, and the secondary auxiliary winding of the transformer obtains voltage from the coupling of the primary winding to supply power to the secondary winding of the transformer. The power supply module of the secondary winding of the transformer is charged to supply power to the control chip. The switching module turns off the power supply output of the bus voltage supply module to the control chip after the secondary winding power supply module of the transformer is fully charged. After the powersupply module of the secondary winding of the transform is charged, The bus voltage is cut off, and the auxiliary winding supplies power to the control chip alone. If the power supply module of the secondary winding of the transformer fails or the PWM driving output duty ratio of the control chip is small, and the power supply control module is abnormal, etc., the fault recovery can be carried out, and the control chip can not be powered down.