The application discloses a CPU
firmware interactive
verification method and
system based on a TCL script transparent routing, relates to the field of
integrated circuit EDA
verification tools, and discloses that in existing SoC
verification, a TCL script cannot transparently
route a command to CPU
firmware in
simulation, thereby causing a local command and a
firmware command to be called in a split mode. The application intercepts a user command through an unknown hook of TCL and writes the user command into a
simulation global variable; a
SystemVerilog unified
distributor inquires a command type mark table; if the command is a local command, the local command is directly executed; if the command is a CPU command, the CPU command is sent to CPU firmware through a
shared memory mailbox; CPU firmware analyzes and executes the CPU command, returns a result to the mailbox, writes the result into a TCL
global variable through an SV layer, and presents the result to a user. The application enables the user to not distinguish a command execution subject, supports mixed parallel execution, four SV-CPU synchronization
modes and
timeout protection. The application significantly improves
simulation verification efficiency and
reusability of a SoC
chip containing a CPU core, and reduces a verification environment integration threshold.