6 results about "Composite number" patented technology

The invention provides a music time coding method for artificial neural network modeling. The method aims at the coding requirement of music beat time, molecules are decomposed according to a fixed denominator for multi-bit independent classification coding, and the method comprises the following steps: setting the fixed denominator as a composite number and decomposing the composite number into a prime factor combination; the molecules are mapped into vectors, the value range of each bit is determined by a cardinal number of a prime factor combination, and the vectors are converted into one-hot coding sub-vectors with redundant components removed. The technical scheme of the invention solves the problem that the traditional mean square error (MSE) ignores the internal correlation of scores and has high sparsity in the topology recognition task of an optical music recognition system (OMR), and compared with a traditional coding method adopting floating point numerical output and a mean square error loss function under the conditions of the same data set, model architecture and training hyper-parameters, the method provided by the invention has the advantages that the coding efficiency is greatly improved; according to the method, the comprehensive error index is reduced by about 21%, and the model precision and the training efficiency are improved.

The invention provides a security method and device based on homomorphic encryption, and belongs to the technical field of security. In the method, the modulus of a first bootstrap key in an outer product operation is improved from a prime number modulus Q to a composite number modulus, namely the product of the prime number modulus Q and a modulus P, so that the matrix dimension representing the first bootstrap key in the outer product operation can be reduced; therefore, the calculation overhead of outer product operation in the homomorphic calculation process can be reduced. Besides, the modulus of the first bootstrap key in the outer product operation is improved from a prime digital modulus Q to a composite digital modulus, that is, g () in an expression structure of the first bootstrap key can be replaced by P (), so that under the condition, the outer product operation does not need to decompose the first homomorphic message ciphertext gadget, and the calculation overhead is further reduced.

The technical concept of the present invention relates to an RSA accumulator-based lookup argument method for performing lookup argument on a composite number and duplicated element. According to an embodiment of the present disclosure, RSA accumulator-based lookup argument method performed by at least one processor may include obtaining a table vector including a plurality of table values, generating a plurality of prime number random values, generating a plurality of prime number table values respectively corresponding to the plurality of table values by using the plurality of prime number random values, generating a prime number table vector by using the plurality of prime number table values and the plurality of prime number random values, publishing the prime number table vector, and performing RSA accumulator-based lookup argument by using the prime number table vector to check whether an index value is included in the table vector.

The technical concept of the present invention relates to an RSA accumulator-based lookup argument method for performing lookup argument on a composite number and duplicated element. According to an embodiment of the present disclosure, RSA accumulator-based lookup argument method performed by at least one processor may include obtaining a table vector including a plurality of table values, generating a plurality of prime number random values, generating a plurality of prime number table values respectively corresponding to the plurality of table values by using the plurality of prime number random values, generating a prime number table vector by using the plurality of prime number table values and the plurality of prime number random values, publishing the prime number table vector, and performing RSA accumulator-based lookup argument by using the prime number table vector to check whether an index value is included in the table vector.

The application discloses a reconfigurable cryptographic accelerator based on a modulo-30 two-dimensional sieve table and an FPGA implementation method thereof, and belongs to the technical field of FPGA hardware acceleration and cryptographic chips. The application constructs an 8-column and multi-row two-dimensional sieve table structure by using a modulo-30 reduction residue system, and compresses a candidate prime number space by 73.3%; a modulo-30 address generation unit is adopted to generate a storage address by using a 3-bit state machine and a row counter, only shift and addition operations are needed, and division and modulus are completely replaced; a matrix deletion operation unit is used to realize parallel screening of multiple processing units, and address iteration and bit operation are used to complete composite marking; a reconfigurable multi-mode application module is used to dynamically distribute prime number streams to different functional modules such as prime number direct output, random number generation, key derivation, hash calculation and the like, and supports runtime mode switching. The application realizes high-speed, low-resource and deterministic prime number generation and multi-mode cryptographic acceleration on an FPGA, and can be applied to cryptographic chips, blockchain nodes, post-quantum cryptographic systems and secure terminal devices.

The application provides a task decomposition method, a task arrangement method, a device and related equipment, and relates to the technical field of data processing. The task decomposition method comprises the following steps: receiving an initial task file sent by a second device, wherein the initial task file comprises multiple initial tasks and the number corresponding to each initial task; in the case that multiple first tasks exist in the multiple initial tasks, decomposing the numbers corresponding to the multiple first tasks to obtain the first prime number corresponding to each first task, and the number of each first task is a composite number; classifying the multiple first tasks based on the first prime number to obtain multiple parallel tasks and / or multiple serial tasks, wherein the first prime numbers corresponding to the multiple parallel tasks are the prime numbers of a first set; adding the multiple parallel tasks to a first sub-list in a first task list, adding the multiple serial tasks to a second sub-list in the first task list, and adding a second task to a second task list. The application can improve the task arrangement effect.