23 results about "Ion beam etching" patented technology

The present disclosure relates to an ion beam etching (IBE) system including a plasma chamber configured to provide plasma, a screen grid, an extraction grid, an accelerator grid, and a decelerator grid. The screen grid receives a screen grid voltage to extract ions from the plasma within the plasma chamber to form an ion beam through a hole. The extraction grid receives an extraction grid voltage, where a voltage difference between the screen grid voltage and the extraction grid voltage determines an ion current density of the ion beam. The accelerator grid receives an accelerator grid voltage. A voltage difference between the extraction grid voltage and the accelerator grid voltage determines an ion beam energy for the ion beam. The IBE system can further includes a deflector system having a first deflector plate and a second deflector plate around a hole to control the direction of the ion beam.

This invention provides an apparatus and method for controlling the thickness of flexible thin film coatings using ion beam etching. The apparatus includes a coating unit, an online thickness detection unit, an ion beam etching unit, and a control unit, the first three being connected sequentially. The control unit is connected to all the aforementioned units. The ion beam etching unit includes an ion source, an accelerating electrode, and a stage. The flexible thin film passes sequentially through the coating unit, the online thickness detection unit, and the ion beam etching unit, undergoing etching between the accelerating electrode and the stage in the ion beam etching unit. This invention integrates ion beam etching technology into roll-to-roll coating processes. By selecting the structure of the ion beam etching unit and the ion beam etching parameters, the thickness of the coating on the flexible thin film can be precisely controlled, achieving coating thinning, improving the uniformity of film thickness, and increasing product yield. The apparatus has a simple structure, is easy to operate, reduces product scrap, lowers production costs, and has a wide range of applications.

This application provides a semiconductor structure and a method for trimming the same. A first structure to be trimmed is provided. The first structure to be trimmed includes a substrate layer, a first film layer, and a second film layer stacked sequentially. The second film layer includes multiple line structures, each with a first roughness. A third film layer is deposited on the first structure to be trimmed to obtain the second structure to be trimmed. The second structure to be trimmed is then subjected to ion beam etching to obtain a trimmed structure. In the trimmed structure, the line structures in the second film layer have a smaller second roughness. In this application, the deposited third film layer has different thicknesses at different locations. The first thickness of the third film layer on the top surface of the second film layer is greater than its second thickness on the side surface of the second film layer. This difference in thickness is used to compensate for differences in the etching rate of the second film layer. While improving the linewidth roughness or line edge roughness, this method ensures that the top of the second film layer is not excessively etched away, reducing top loss.

This application discloses a wafer-level pattern modification method and an ion beam etching apparatus, applicable to the semiconductor manufacturing field. In this method, a target ion beam voltage is first determined based on the hardness grade of the material to be etched on the wafer surface. An initial pattern is formed on the wafer surface by the material to be etched. Then, based on a first ion beam incident angle and the target ion beam voltage, the initial pattern is modified on one side in a first direction using the ion beam to obtain a first modified pattern. Therefore, only one photolithography step is needed before ion beam etching to form the initial pattern, avoiding low product yield caused by overlay errors. Through ion beam etching, the initial pattern formed by the material to be etched on the wafer surface can be modified on one side in a highly controllable manner in a first direction parallel to the wafer surface, reducing the distance between adjacent patterns and improving the success rate of forming the first modified pattern, thus increasing the yield of products requiring small CD patterns.

This invention provides a method for simulating the morphological evolution of blazed grating etching, including: pre-constructing an etching mask structure based on a pre-defined blazed grating structure; determining etching contour lines at different times and positions based on the morphological evolution of the mask structure during etching, and determining the motion properties of different contour lines; determining the linear equation of each contour line and the motion mode of each contour line; determining the motion direction of each contour line in combination with different etching processes; and determining and updating the position and linear equation of each contour line at different etching times based on the motion direction and motion rate of each contour line; and judging the simulated etching endpoint of the blazed grating etching morphology based on different etching processes. This invention can more accurately describe the influence of different processes and process parameters on the final etching result, perform in-depth processing of discrete technical data, and thus predict and control the ion beam etching process.

The present disclosure relates to a mass leveling system and method for a hemispherical resonator, the system comprising: an excitation module for exciting the hemispherical resonator to be leveled to generate vibration; a laser interferometer comprising at least two detection probes for collecting vibration information of at least two positions of the hemispherical resonator; an ion beam etching module for etching the hemispherical resonator using an ion beam; and a control module for determining the orientation of the vibration principal axis of the hemispherical resonator and the size of frequency splitting according to the vibration information of the at least two positions of the hemispherical resonator in the vibration decay process; and controlling the ion beam etching module to etch the hemispherical resonator using the ion beam according to the orientation of the vibration principal axis of the hemispherical resonator and the size of frequency splitting, so as to realize mass leveling of the hemispherical resonator. Thus, mass leveling with higher precision and high automation can be realized without reducing the quality factor of the hemispherical resonator.

The application provides a semiconductor structure and a preparation method thereof, and relates to the technical field of semiconductor preparation. The technical scheme provided by the application is that the photoresist pattern profile formed on the to-be-etched film layer is a structure with a reserved correction part, so that the target photoresist pattern of an area meeting the expected size and position can be formed after subsequent correction processing. When the photoresist pattern profile is corrected, the ion beam etching removal mode is adopted, so that the influence on the properties of the photoresist material is avoided. Moreover, the photoresist pattern profile is etched by adopting a bidirectional asymmetric correction etching mode, so that the flexibility of etching the photoresist pattern profile is improved. The technical scheme provided by the application obtains the required target photoresist pattern by correcting the photoresist pattern profile, improves the difference between the target photoresist pattern and the expected pattern, and ensures that the quality of the prepared semiconductor structure is high.

The application provides a high-robustness photoresist for physiological electrodes, a manufacturing method and an in-situ manufacturing method of physiological electrodes, and can prepare two layers of photoresists with an undercut structure by stacking two layers of photoresists on each other, wherein the two layers of photoresists only differ in the concentration of photosensitizers, the concentration difference is adjusted according to the required undercut profile, and the mass percentage components include 3-10% film-forming resin, 90-97% deionized water, 0.1-1% diazo photosensitizer and 0.1-1% surfactant. The surface of a flexible substrate is cleaned by using an ion beam etching technology; a photoresist with low photosensitizer content is spin-coated to obtain a defect-free low-interface-adhesion transferable photoresist film; the photoresist with high photosensitizer content is transferred to the flexible substrate loaded with the photoresist with low photosensitizer content; the flexible substrate loaded with the two layers of photoresists is attached to a hard master mask plate, and is exposed, so that the pattern of the hard master mask plate is transferred to the photoresists, a two-layer stacked photoresist pattern with an undercut structure is formed, high-fidelity replication of the photoetching mask plate structure is realized, and subsequent peeling is facilitated.

This invention discloses a method for fabricating a large-aperture convex grating with a high-depth-width blazed groove shape. The method includes: confirming the grating line density using dispersion theory; determining the grating's operating temperature under corresponding wavelength radiation backgrounds; determining the grating substrate material; performing a rough calculation of the blaze angle using scalar diffraction theory; performing a precise calculation of the blaze angle using the finite-difference time-domain method; determining the film material and thickness; designing the consistency of TE and TM diffraction efficiencies; analyzing the grating groove shape difference; confirming the grating groove shape parameters; electron beam exposure and development of the blazed groove shape; designing, exposing, and developing the exposure dose compensation; stitching together the large-aperture grating exposure areas; ion beam etching of the grating; and coating the grating with a metal reflective film. This fabrication method ensures the stability of the diffraction efficiency of the grating substrate and film materials under varying temperatures from room temperature to deep cryogenics, as well as the consistency of TE and TM diffraction efficiencies, thus guaranteeing the imaging quality and response stability of spectroscopic instruments.

This invention discloses a novel etch-free optical waveguide based on continuous bound states and a dispersion control method, belonging to the field of integrated optoelectronics. From top to bottom, it comprises a waveguide cladding, a low-emissivity planar layer, an optical waveguide layer, a buried oxide layer, and a substrate. The width and length of the optical waveguide layer, the buried oxide layer, and the substrate are all the same. The waveguide cladding is composed of several strip structures. The etch-free optical waveguide eliminates the need for complex etching processes, reducing manufacturing costs, minimizing process errors and defects, simplifying the manufacturing process, and exhibiting low-loss characteristics, which is beneficial for developing ultra-low-loss waveguide devices. The dispersion control method can achieve dispersion modulation of modes without altering the morphology of the optical waveguide using ion beam etching and photolithography, contributing to the development of high-performance on-chip nonlinear devices.

The present invention provides a write head having an asymmetrical side gap (SG) that offers a narrower side gap (SG) width while mitigating any limitations or constraints on write capability that may arise from reducing the side gap SG. [Solution] In the asymmetrical writing head 600, the main pole 602 is positioned offset with respect to the central axis A1 of the writing head such that it is closer to the first SS 606A portion than to the second side shield (SS) 606B portion. The asymmetrical design can be achieved using an ion-beam etching (IBE) or ion-beam deposition (IBD) process.

The application relates to a high-haze conductive film and a single-process preparation method thereof, which comprises the following steps: step S1, cleaning float high-transparency glass by adopting alkali liquor, acid liquor or an ion beam etching method; step S2, preparing an AZO seed crystal by adopting a magnetron sputtering method and using high-purity AZO target material in a certain concentration air atmosphere; step S3, closing the sputtering power supply, performing high-vacuum pumping, and removing oxygen existing in the cavity; step S4, performing film plating by adopting the magnetron sputtering method and using the high-purity AZO target material after pre-sputtering in an oxygen-free environment; and step S5, naturally cooling the film-plated glass to room temperature, so that a high-haze AZO conductive film is obtained. The application provides a simple and fast process method for producing and manufacturing the high-haze AZO conductive film, and controllable adjustment of the haze can be realized through simple adjustment of process parameters; and the application only adopts the film plating mode of the magnetron sputtering to realize construction of a microstructure, and is suitable for automatic continuous production.

The application relates to a method for modifying a narrow-band filter by an online ion beam etching, and belongs to the technical field of optical communication. The method realizes the modification of the over-thick error of a film layer through online ion beam etching, makes a film thickness monitoring signal return to before the error occurs, realizes the modification of the error, reduces the scrappage rate of products, improves the finished product rate of monitoring, and reduces the cost of filter plating. The light value reading is more reliable than the time power method, and can guarantee the over-etching amount.

This application discloses an ion source grid structure and its control system, as well as an ion beam etching system, relating to the field of semiconductor technology. The ion source grid structure comprises a voltage fine-tuning structure on at least one of a first grid and a second grid. The voltage fine-tuning structure includes a dielectric layer and a voltage fine-tuning gate. Vias on the voltage fine-tuning gate are connected to vias on the first grid and the second grid, thereby allowing a voltage difference relative to the first grid to be applied to the voltage fine-tuning gate on the first grid, changing the local electric field distribution of the ion beam pulled out by the first grid. And / or, a voltage difference relative to the second grid can be applied to the voltage fine-tuning gate on the second grid, changing the local electric field distribution of the ion beam accelerated by the second grid. This is equivalent to changing the voltage difference between the local first grid and the second grid, allowing for small-range adjustment of the extracted ion beam density, facilitating the extraction of a uniform ion beam and ensuring the uniformity and stability of the etching process.

The present application relates to a method and device for removing particles from an ion beam etching system, which comprises a metal grid added to the bottom of the reaction chamber of the ion beam etching system, the grid being connected to a DC power supply to generate a positive voltage, the voltage value of the applied positive voltage being adjusted within 100kv according to the size of the particles to be removed. The material of the metal grid c is a hard metal such as molybdenum or nickel, and the mesh size is less than 5mm. After the etching process is completed, the ion source of the ion beam etching system is disconnected, and the lower electrode is rotated to be perpendicular to the grid c; the neutralizer is turned on to generate a large number of electrons attached to the particles to be removed to make the particles negatively charged; the grid c applies a positive voltage through the DC power supply c, and the negatively charged particles move towards the grid c under the action of the electric field; the particles pass through the mesh of the grid c and are pumped out of the chamber by the molecular pump, so that the particles are quickly and effectively removed, the deposition of particles in the interior of the reaction chamber is prevented, and the production efficiency of the ion beam etching system is improved.

Embodiments described herein relate to a method of using an apparatus for forming waveguides. The method includes positioning a substrate at a first rotation angle, exposing the substrate to an ion beam, forming first partial trenches defined by adjacent angled device structures with the first device angle, rotating the substrate to a second rotation angle, exposing the substrate to the ion beam, etching the first partial trenches, and repeating the method from about 1 cycle to about 100 cycles to form a plurality of trenches defined by adjacent angled device structures. The first rotation angle is selected to form one or more angled device structures with a first device angle relative to a vector parallel to the substrate. The ion beam is configured to contact the substrate at a beam angle ϑ relative to a surface normal of the substrate.

The application discloses an etching method for semiconductor surface, comprising the following steps: placing the semiconductor to be etched in a vacuum chamber, and controlling the vacuum degree in the vacuum chamber to be stabilized at 3.5*10 ‑2 Pa~4.5*10 ‑2 Pa; introducing oxygen into the vacuum chamber, and controlling the vacuum degree in the vacuum chamber to be stabilized at 1.1*10 ‑2 Pa~1.2*10 ‑ 2 Pa; according to the introduced oxygen, performing first etching on the semiconductor surface by using an ion beam etching method; wherein the applied beam voltage is 1000V, the beam current density is greater than 0.008mA / m 3 , and the first etching time is in the range of 50min~60min; introducing argon into the vacuum chamber, and performing second etching on the semiconductor surface by using the ion beam etching method. The technical scheme can trim the film base before argon etching, effectively avoid irregular edges of the semiconductor surface after argon etching, and improve the performance of the semiconductor.

The application discloses a preparation method of a controllable-thickness BiSrCaCuO high-temperature superconducting single-crystal microwire, and belongs to the technical field of superconducting micro-nano electronic device preparation. The application obtains a fresh surface by cleaving a BSCCO single crystal through a Scotch tape under a high-vacuum environment and evaporates a gold film in situ, and after gold electrodes are prepared through photolithography and wet etching, secondary photolithography and argon ion beam etching are combined to define a line channel with a width of micrometer level to a preset depth; then, the sample is bonded and solidified with a second substrate through an Epoxy glue, and the substrate is separated to realize a turn-over transfer, and finally, residual bulk BSCCO single crystals are cleaved and removed to obtain a finished product. The application combines in-situ gold electrode technology, dry and wet etching technology and turn-over transfer and cleaving technology, realizes a good ohmic contact, and is precise in microwire thickness control, stable and repeatable in process, and provides a new way for the preparation of high-performance high-temperature superconducting devices.

This invention provides a method for forming continuous thin films based on ion beam sidewall modification and its application. The method includes: forming a steep sidewall structure on a substrate, having a sharp top edge away from the substrate and a sharp bottom edge at the connection point with the substrate; ion beam etching the steep sidewall structure to create an angle θ between the substrate surface and the ion beam incident direction, and rotating the substrate along its axis so that the ion beam etches the sharp top and bottom edges into rounded corners, obtaining a rounded transition structure; and depositing a thin film on the rounded transition structure using physical vapor deposition. This method is suitable for fabricating racetrack-shaped on-chip inductor core structures, enabling the formation of a fully enclosed magnetic structure on the inductor, which facilitates magnetic circuit closure, reduces magnetic leakage, and thus improves inductor performance. It solves the problem of discontinuous magnetic material films and magnetic leakage leading to decreased inductor performance when directly depositing magnetic material films on steep sidewall structures.

The method for forming a flexible diamond-like carbon film of the present invention includes: depositing a dielectric material layer on a substrate; performing ion beam etching on the dielectric material layer to form a nanopore structure on the dielectric material layer; and depositing diamond-like carbon on the nanopore structure to form a flexible diamond-like carbon film. This method is simple and efficient, capable of preparing flexible diamond-like carbon films with a compact structure and flexibility, whose surface can be decorated as needed. Furthermore, the manufacturing process is simple and low-cost, making it suitable for mass production.

A double-walled multi-structure quartz cylinder device belongs to the field of ion beam etching technology. Specifically, this device comprises a quartz cylinder outer wall, and at least one quartz cylinder inner liner is provided inside the quartz cylinder outer wall, the axes of the two are aligned, and a quartz cylinder inner liner support is connected between the quartz cylinder inner liner and the quartz cylinder outer wall. The bottoms of the quartz cylinder outer wall and the quartz cylinder inner liner are connected to a grid mesh, and most etching byproducts are sputtered onto the inner surface of the quartz cylinder inner liner through the pores of the grid mesh, while less etching byproducts adhere to the inner wall of the quartz cylinder outer wall, so the entire radio frequency circuit is less affected by contamination. In other words, the etching rate is less affected by contamination, extending the lifespan of the quartz cylinder device, reducing etching costs, and increasing the MTBC time of ion beam etching.

The application relates to the technical field of ion beam etching, and particularly provides an online-adjusted diaphragm assembly, an adjusting method and an etching device, which are used for controlling sputtering characteristics of an ion beam. The diaphragm assembly comprises a frame, a frame plate component symmetrically distributed along a beam flow central axis of the ion beam, and a through hole for passing the ion beam. A diaphragm component is arranged in the frame plate component, and the diaphragm component is provided with at least two groups. A piezoelectric component is arranged on the frame plate component and corresponds to the diaphragm component one by one. The piezoelectric component is used for driving the diaphragm component, so that the diaphragm component shields part of the through hole and adjusts the beam flow distribution of the ion beam. The piezoelectric component is used for controlling the diaphragm component, so that the diaphragm component can dynamically adjust the beam flow distribution of the ion beam passing through the through hole. Therefore, the uniformity of the ion beam etching can be regulated in the state that the equipment does not stop, so that the application has the processing stability and the real-time adjustability.

The application provides a focused ion beam suspended microstructure processing method, a system thereof and a suspended microstructure, and comprises the following steps: step S1: a sacrificial layer is arranged on the surface of a substrate; a thin film material is deposited on the sacrificial layer; step S2: the substrate after the deposition of the thin film material is placed into a focused ion beam device chamber, the middle part of a designed pattern is selected, and the pattern structure on the surface of the thin film material is processed by using a focused ion beam, and the etching depth is not less than the thickness of the thin film; step S3: a preset gas is introduced into the focused ion beam device chamber through a gas system, the surface of the pattern structure is etched, the etching time is controlled, and the suspended structure is obtained in combination with ion beam etching; and step S4: the remaining pattern on the surface of the suspended structure is processed to a required position, and a suspended edge structure and a suspended microstructure are obtained. The focused ion beam twice etching method is used for suspended microstructure processing, and the technical problems that the suspended edge is difficult to control and the edge structure is not easy to process in the prior art are solved.