194 results about "Ion beam etching" patented technology

The invention discloses a method for depositing a gold electrode on the surface of a BSCCO single crystal, and belongs to the technical field of superconducting device preparation, and the method comprises the following steps: S1, cleaning a sapphire substrate; s2, placing the sapphire substrate in a vacuum pipeline, fixing the PDMS film adhered with the BSCCO single crystal on the sapphire substrate, and cleaving the BSCCO single crystal in the vacuum pipeline; s3, depositing a layer of gold film on the surface of the BSCCO single crystal fixed on the sapphire substrate by magnetron sputtering; s4, photoetching and transferring a gold electrode pattern on the surface of the BSCCO single crystal; s5, carrying out ion beam etching to remove the gold film outside the photoetching pattern; s6, evaporating a silicon oxide film as a protective layer; and S7, removing the photoresist by using an organic solvent. According to the method disclosed by the invention, the necessary steps of depositing the gold electrode on the BSCCO single crystal are completed in a vacuum environment, so that the influence of an organic reagent, water and air on the structure of the BSCCO single crystal is effectively reduced.

The invention provides an ion beam etching system with an etching rate in-situ monitoring function and an etching method, the ion beam etching system is provided with an objective table which can deflect by 90 degrees and an electrical test detection element which can move close to or far away from the objective table, and by the etching method, an ion source is not closed, a sample is not taken out, and the etching rate can be accurately measured. The etching depth can be accurately monitored by measuring the surface resistance of the sample in situ, the etching rate can be reduced in time, and the method is more suitable for the tape-out process. According to the ion beam etching system and the etching method, sputter spectrum monitoring is replaced by sample surface resistance detection, so that the test sensitivity is higher, the system cost is lower, the etching precision in magnetic tunnel junction preparation is greatly improved, the sample is prevented from being excessively etched, the thickness of a sample layer can be kept consistent, the resistance distribution is uniform, and the quality of the magnetic tunnel junction is improved. And the high success rate preparation of the SOT-MRAM memory with large capacity and small size is realized.

The invention relates to a waveguide grating, in particular to a method for manufacturing a waveguide grating with continuous gradually-changing groove depth, which comprises the following steps of: accurately measuring and calibrating ion beam current density distribution of a used ion beam in a working plane; establishing a cooperative control model associated with a target groove depth curve, ion beam current density distribution and scanning speed, associating the etching depth with the ion beam total dose, and accurately controlling the ion beam total dose received by each point on the waveguide grating by dynamically regulating and controlling the scanning speed of the substrate relative to the ion beam, so as to realize accurate control of the etching depth. The accurate control on the groove depth distribution is realized; based on the cooperative control model, the scanning speed corresponding to the target groove depth curve is solved by combining the set target groove depth curve and the calibrated ion beam current density distribution; and performing ion beam etching based on the solved scanning speed, and finally forming a continuous gradual change groove depth accurately corresponding to the target groove depth curve on the waveguide grating. The method can effectively overcome the defect that the high-precision waveguide grating with the continuous gradually-changing groove depth is difficult to manufacture.

The invention discloses a preparation and coupling optimization method of a strip-shaped SOI waveguide adopting end face coupling, and belongs to the field of micro-nano fine structure processing and optical precision measurement. According to the method, through two-step photoetching and two-step etching, on one hand, the substrate section highly coincident with the waveguide end face can be etched on the waveguide end face, and on the other hand, it can be guaranteed that the etching broadening of the Si substrate etching channel cannot cause the hollow-out of the lower portion of the waveguide above SiO2. By using the direct-current magnetron sputtering Cr mask, the waveguide material can be prevented from being etched and damaged in the deep silicon etching process. Through the ion beam etching process, the end face of the waveguide and the etched side wall of the substrate are completely overlapped, so that part of light spots are prevented from being scattered by the Si substrate in the optical fiber coupling process, and the coupling efficiency of the waveguide is further improved. By combining the FDTD simulation result, the low-internal stress SiO2-Si3N4 antireflection film with the proper thickness is deposited on the waveguide end face through ICP-PECVD, light spots are prevented from being reflected on the waveguide end face, and the light spot coupling efficiency reaches the maximum.

The invention provides an inclined grating preparation method and device, and relates to the technical field of grating manufacturing. The method comprises the steps of performing ion beam etching on a hard mask film layer of a to-be-etched part based on a first inclination angle of an inclined table for placing the to-be-etched part to obtain a mask etching part; and performing reactive ion beam etching on the material layer of the mask etching piece based on the second inclination angle of the inclined table on which the mask etching piece is placed to obtain an inclined grating structure. The device comprises a controller used for determining a first inclination angle and a second inclination angle of an inclined table based on a design structure of a to-be-etched part; controlling an inclined table to move to a first inclination angle, and controlling first etching equipment to perform ion beam etching on the hard mask layer of the to-be-etched part to obtain a mask etching part; and controlling the tilting table to move to a second tilting angle, and controlling the second etching equipment to perform reactive ion beam etching on the material layer of the mask etching piece to obtain the tilting grating structure.

The present disclosure relates to an ion beam etching (IBE) system including a plasma chamber configured to provide plasma, a screen grid, an extraction grid, an accelerator grid, and a decelerator grid. The screen grid receives a screen grid voltage to extract ions from the plasma within the plasma chamber to form an ion beam through a hole. The extraction grid receives an extraction grid voltage, where a voltage difference between the screen grid voltage and the extraction grid voltage determines an ion current density of the ion beam. The accelerator grid receives an accelerator grid voltage. A voltage difference between the extraction grid voltage and the accelerator grid voltage determines an ion beam energy for the ion beam. The IBE system can further includes a deflector system having a first deflector plate and a second deflector plate around a hole to control the direction of the ion beam.

The ion beam etching method disclosed by the invention comprises the following steps: providing an ion beam etching machine, wherein the ion beam etching machine comprises an ion source for providing an ion beam and a supporting table for supporting a semiconductor material; positioning a semiconductor material on the support table; and controlling the ion beam to etch the semiconductor material at an incident angle of 0-45 degrees. According to the method, the shape and the size of the semiconductor material can be accurately controlled, and burrs and residues are not easy to generate on the semiconductor material, so that the manufacturing precision and the performance of a semiconductor device are improved.

The invention discloses a U-shaped groove grating ion beam etching method based on a mask shadow effect, and relates to the technical field of U-shaped groove etching, and the method comprises the steps: placing a substrate with a photoresist grating mask in an inclined manner, and enabling an ion beam to bombard the photoresist grating mask in an inclined incidence manner; through a shadow effect generated by a photoresist grating mask on an ion beam, the etching dose distribution of different areas on the surface of a substrate is regulated and controlled, so that the etching dose of the central area of the groove bottom is greater than that of the areas on the two sides, and the U-shaped groove with a smooth and gradually-changed bottom contour is directly etched and formed. By constructing the smooth transition U-shaped groove bottom structure, sharp edges and corners are thoroughly eliminated, and the phenomenon of electric field concentration is remarkably relieved, so that the damage risk under high-power laser irradiation is effectively reduced, the stability of the grating in an extreme environment is improved, and the service life of the grating in the extreme environment is prolonged.

An ion beam etching method includes preparing a substrate on which a plurality of magnetic random access memory (MRAM) stacks are provided, performing main etching using ion beam etching such that sidewalls of the plurality of MRAM stacks have a target angle of inclination, and removing a conductive etching by-product redeposited on the sidewalls of the plurality of MRAM stacks during the main etching by performing trim etching using ion beam etching, where the performing the main etching includes performing a first main etching using ion beam etching on the plurality of MRAM stacks at a first incidence angle with respect to an upper surface of the substrate, and after performing the first main etching, performing a second main etching using ion beam etching on the plurality of MRAM stacks at a second incidence angle that is smaller than the first incidence angle.

The utility model provides a rotating shaft device of a wafer carrying table of an ion beam etching machine, which comprises a carrying table plate, a rotating arm is fixedly arranged on the carrying table plate, the rotating arm is used for being connected with an external rotation driving structure, an output end of a first servo motor is connected with a speed reducer, magnetic fluid is fixed on a connecting sleeve, and the magnetic fluid is connected with a second servo motor. One end of a shaft sleeved with the magnetic fluid penetrates through one side wall of an etching chamber of the ion beam etching machine to be connected with the carrying table plate, the end, away from the etching chamber of the ion beam etching machine, of the connecting sleeve is fixedly connected with a mounting frame in a sleeved mode, and the other end of the shaft sleeved with the magnetic fluid is sequentially connected with the speed reducer and the mounting frame in a sleeved mode. A stop block set is arranged at the end of the shaft sleeved with the magnetic fluid and far away from the etching chamber of the ion beam etching machine, a plurality of buffer devices are arranged on the same side of the mounting frame and stop blocks, and the rotation angle of the shaft sleeved with the magnetic fluid is limited through cooperation of the buffer devices and the stop blocks. Therefore, the rotation angle of the carrying table plate is limited in an auxiliary mode.

The invention relates to a reactive ion beam etching method of a large-size diffractive optical element and a vacuum etching machine. The method comprises the following steps: in a reactive ion beam main etching stage, a main ion source emits a high-energy main etching reactive ion beam to scan and etch the whole surface of the large-size diffractive optical element; in a selective area reaction ion beam ashing stage, an auxiliary ion source is controlled to emit a low-energy ashing reaction ion beam, and scanning ashing processing is carried out on a central effective area of the large-size diffractive optical element; in the reaction ion beam edge removal stage, the auxiliary ion source is controlled to emit edge removal reaction ion beams with set process parameters, and edge thickening photoresist of the large-size diffractive optical element is removed; and taking out the large-size diffraction optical element finished product after etching is completed. According to the technical scheme, the production cost of reactive ion beam etching of the large-size diffractive optical element can be reduced, and the production efficiency can be improved.

The invention belongs to the technical field of metal material surface treatment, and discloses a composite preparation method of an ultrahigh-resolution-rate alpha + beta phase region thermal deformation high-strength titanium alloy EBSD sample, which comprises the following steps: mechanically grinding a to-be-tested surface of the alpha + beta phase region thermal deformation high-strength titanium alloy EBSD sample; performing electrolytic polishing in an electrolytic polishing solution which is prepared from perchloric acid and absolute ethyl alcohol and is naturally cooled to room temperature, and then performing four-stage short-time ion beam etching to obtain an ultrahigh-resolution-rate alpha + beta phase region thermal deformation high-strength titanium alloy EBSD sample; and ion beam etching parameters of each stage of the four-stage short-time ion beam etching are given. The technical problem that in the prior art, a preparation method of an alpha + beta phase region thermal deformation high-strength titanium alloy EBSD sample with the ultrahigh resolution rate (the resolution rate is 98% or above) does not exist is solved.

The present disclosure relates to an ion beam etching (IBE) system including a plasma chamber configured to provide plasma, a screen grid, an extraction grid, an accelerator grid, and a decelerator grid. The screen grid receives a screen grid voltage to extract ions from the plasma within the plasma chamber to form an ion beam through a hole. The extraction grid receives an extraction grid voltage, where a voltage difference between the screen grid voltage and the extraction grid voltage determines an ion current density of the ion beam. The accelerator grid receives an accelerator grid voltage. A voltage difference between the extraction grid voltage and the accelerator grid voltage determines an ion beam energy for the ion beam. The IBE system can further includes a deflector system having a first deflector plate and a second deflector plate around a hole to control the direction of the ion beam.

The utility model provides a wafer carrying table device of an ion beam etching machine, which comprises a carrying table plate, a sealing box is arranged at the lower part of the carrying table plate, a rotary driving assembly and a wafer lifting assembly are arranged in a space between the carrying table plate and the sealing box, the output end of the rotary driving assembly penetrates through an ejector pin compression ring connecting plate and is connected with a transition plate, and the output end of the wafer lifting assembly is connected with the ejector pin compression ring connecting plate. A carrier table water cooling plate and a carrier table water cooling plate sealing plate are arranged between the transition plate and the wafer carrier table, the carrier table water cooling plate is arranged at the lower part of the carrier table water cooling plate sealing plate, the lower surface of the carrier table water cooling plate is provided with a first air flow channel, the upper surface of the carrier table water cooling plate sealing plate is provided with a second air flow channel, and the first air flow channel is communicated with the second air flow channel. The first airflow channel and the second airflow channel are fixedly connected to form a complete airflow channel for low-temperature gas to pass through, a plurality of auxiliary airflow channels are also arranged at the wafer carrying table, one end of each auxiliary airflow channel is communicated with the first airflow channel, and the other end of each auxiliary airflow channel is directly positioned at the lower part of the wafer, so that the cooling effect of the wafer is better.

The invention relates to a micro-convex structure optical fiber image transmission array and a preparation method and application thereof. The method comprises the following steps: drawing a core material glass rod and a skin material glass tube into a primary monofilament; drawing the black absorption glass rod into a light absorption glass gap wire; drawing the skin glass rod into a skin glass gap wire; performing hexagonal densest arrangement on the primary monofilaments, sequentially inserting light absorption glass gap filaments and skin glass gap filaments into gaps of the primary monofilaments to obtain a primary composite rod, and drawing the primary composite rod into primary multifilaments; arranging the primary multifilaments in a hexagonal densest manner to form a secondary composite rod, and drawing the secondary composite rod into secondary multifilaments; performing hexagonal densest arrangement on the secondary multifilaments, performing fixed-length cutting, arranging the secondary multifilaments into plate sections, and performing hot melt pressing on the plate sections to form molten fiber rods; post-processing the fused fiber rod into an optical fiber image transmitting array; and carrying out ion beam etching on the optical fiber image transmission array in vacuum. According to the method, the convex structure on the surface of the output end of the optical fiber image transmitting array is prepared by using an ion beam bombardment etching process, and the uniformity of surface etching processing of the convex structure is improved.

The invention provides a diamond-like coating for the surface of a ceramic matrix and a preparation method thereof, and belongs to the technical field of sealing materials, the preparation method specifically comprises the following steps: S1, adopting a linear ion beam technology, taking argon as working gas, and performing etching treatment on the surface of the ceramic matrix by utilizing ionized argon ions to obtain a zigzag microstructure; s2, a linear ion beam chemical vapor deposition method is adopted, acetylene / methane serves as working gas, the hydrocarbon precursor is ionized on the surface of the ceramic matrix subjected to etching treatment to form an interface mixing layer, and then the diamond-like coating is deposited to obtain the diamond-like coating used for the surface of the ceramic matrix. Compared with the prior art, the ion beam etching process is adopted to form the microstructure and the interface mixing layer on the surface, the influence of interface mismatching of the substrate and the DLC coating is reduced, the film-substrate binding force is improved, the supporting capacity of the surface DLC coating is improved, and high bearing is achieved.

The invention relates to the technical field of vacuum etching, in particular to an ion beam etching method and device, a vacuum etching machine, computer equipment and a medium, and the method comprises the steps: obtaining the target geometrical shape and processing demand information of sample etching, and the processing demand information comprises the target etching depth, the incident angle range and the uniformity error information; obtaining target etching process parameters according to the processing demand information; wherein the target etching process parameters comprise a target incident angle, a target working distance and an etching uniformity parameter; planning a movement track of an ion source and / or a sample table according to the target geometrical shape, the target etching process parameters and a movement control function; controlling the ion source and / or the sample table to move according to the movement track in the scanning etching process; according to the technical scheme, high-uniformity etching processing can be realized.

The invention discloses an etching groove and through hole line edge roughness optimization method, which belongs to the technical field of integrated circuit manufacturing, and comprises the following steps of: exposing on a substrate with a hard mask layer through a photoetching process to obtain a photoresist pattern; etching the photoresist pattern through an ion beam etching process to reduce the surface roughness of the side wall of the photoresist pattern groove or through hole structure; forming a covering film layer on the substrate through a deposition process; exposing the upper surface of the photoresist through a first etching process; the photoresist is etched through a second etching process, and the part, located on the side wall of the photoresist, of the covering film layer is left to serve as a new mask plate; the substrate is etched downwards through a third etching process, and the pattern of the new mask plate is transferred to the hard mask layer in the substrate; and removing the unwanted surface structure to obtain the required semiconductor structure. According to the method, the roughness of the line edge can be greatly reduced, a flat surface is obtained, surface defects are few, meanwhile, the cost is reduced, the efficiency is improved, and the requirement for higher fineness is met.

The invention provides a method and equipment for preparing a sub-arc-second gradient substrate through ion beam etching. The method comprises the following steps: determining the relationship between the residence time and the etching depth when an ion beam is used for etching a substrate, so as to form a first model; determining the etching amount distribution of the substrate along the etching path of the ion beam according to the processing target of the substrate; determining the relationship between the speed and the acceleration of the ion beam and the time when the ion beam carries out etching along the etching path, so as to form a second model; determining residence time distribution according to the etching amount distribution and a first model; according to the residence time distribution and a second model, determining speed distribution and acceleration distribution of ion beam etching along time; and controlling the ion beam to etch the etching path according to the speed distribution and the acceleration distribution. According to the method, the processing formula of ion beam etching is formed through the speed distribution and the acceleration distribution, the target etching depth can be obtained through the residence time, and reliable processing of the sub-arc-second gradient substrate is realized.

The utility model provides an IBE ion beam etching device convenient to maintain, which comprises a cavity body, a target material is connected in the cavity body, a carrying table mechanism is arranged above the target material, the carrying table mechanism is connected with the cavity body through a rotary driving mechanism, a wafer substrate to be coated is arranged on the carrying table mechanism, one side of the cavity body is connected with a first access door, and the other side of the cavity body is connected with a second access door. The other side of the cavity body is connected with a second access door and located on the opposite side of the first access door, the first access door and the second access door are both hinged to the cavity body through hinges, a first installation opening is formed in the lower portion of the first access door, the first ion source is connected with the first installation opening, and a second installation opening is formed in the upper portion of the second access door. The second ion source is connected with the second mounting port, and when the first ion source or the second ion source breaks down, maintenance is carried out by opening the corresponding first access door or second access door; and by arranging the first access door and the second access door, the maintenance efficiency is greatly improved, and the maintenance is very convenient.

This invention provides an apparatus and method for controlling the thickness of flexible thin film coatings using ion beam etching. The apparatus includes a coating unit, an online thickness detection unit, an ion beam etching unit, and a control unit, the first three being connected sequentially. The control unit is connected to all the aforementioned units. The ion beam etching unit includes an ion source, an accelerating electrode, and a stage. The flexible thin film passes sequentially through the coating unit, the online thickness detection unit, and the ion beam etching unit, undergoing etching between the accelerating electrode and the stage in the ion beam etching unit. This invention integrates ion beam etching technology into roll-to-roll coating processes. By selecting the structure of the ion beam etching unit and the ion beam etching parameters, the thickness of the coating on the flexible thin film can be precisely controlled, achieving coating thinning, improving the uniformity of film thickness, and increasing product yield. The apparatus has a simple structure, is easy to operate, reduces product scrap, lowers production costs, and has a wide range of applications.

The invention belongs to the technical field of semiconductor processing, and particularly relates to a low-angle morphology ion beam etching method and application. Depositing a metal film to be etched on the surface of the wafer, then spin-coating a photoresist mask and carrying out exposure and development treatment to complete patterning of the photoresist mask; carrying out high-temperature hardening treatment, and enabling the photoresist mask to generate hot reflux through high temperature so as to reduce the angle of the photoresist mask; and obtaining the sidewall angle of the hardened photoresist mask, adjusting the ion beam etching incident angle, enabling the ion beam incident angle to be complementary with the sidewall angle of the photoresist mask, and carrying out etching until the etching is completed. According to the method, the steepness of the side wall of the ion beam etching groove can be controlled within 50 degrees, side wall deposition is avoided, and the reliability between metal layers of the multi-layer wiring process can be greatly improved.

The invention discloses a preparation method of a tellurium-cadmium-mercury ring hole array with a high aspect ratio. The preparation method comprises the following steps: depositing a passivation layer and a sacrificial layer on the surface of a tellurium-cadmium-mercury material, preparing graphical photoresist on the sacrificial layer, and preparing ring holes by adopting an ion beam etching process with periodically variable angles and energy. According to the method, the sacrificial layer and the thin photoresist hard and soft mask are combined, so that the thickness of the photoetching mask can be reduced, the emitting range of a backwash object is enlarged, and the etching shadow effect and the etching damage of the material surface are reduced; periodic variable angle and energy etching changes the sputtering direction of the etched sediment and reduces the deposition of residues in holes on one hand, and on the other hand, part of the sediment can be etched and removed through periodic angle change, energy in part of the time period in the period is increased, and larger kinetic energy is provided for sputtering particles. The emergent angle distribution can be optimized, the secondary sputtering probability of sediments is increased, and deposition is inhibited. The method is suitable for preparing the ring hole array with the ring hole diameter being smaller than or equal to 2 micrometers and the depth-to-width ratio being larger than or equal to 2.5: 1.

The present invention relates to the field of micro-nano optics, and discloses a method for processing a micro-nano optical array structure, comprising the following steps: Step 1, processing a plurality of openings on the surface of a hydrophobic flat plate; Step 2, placing the hydrophobic flat plate above a photoresist and bringing it into contact with the photoresist, and using the capillary phenomenon of the openings to form a spherical protrusion at each position corresponding to the openings on the surface of the photoresist; Step 3, curing the photoresist; Step 4, after the curing is completed, removing the hydrophobic flat plate; Step 5, performing an ion beam etching treatment using the photoresist. Compared with the traditional ultra-precision cutting processing method, the method for processing a micro-nano optical array structure provided by the present invention has a lower cost and a shorter processing time.

This application provides a semiconductor structure and a method for trimming the same. A first structure to be trimmed is provided. The first structure to be trimmed includes a substrate layer, a first film layer, and a second film layer stacked sequentially. The second film layer includes multiple line structures, each with a first roughness. A third film layer is deposited on the first structure to be trimmed to obtain the second structure to be trimmed. The second structure to be trimmed is then subjected to ion beam etching to obtain a trimmed structure. In the trimmed structure, the line structures in the second film layer have a smaller second roughness. In this application, the deposited third film layer has different thicknesses at different locations. The first thickness of the third film layer on the top surface of the second film layer is greater than its second thickness on the side surface of the second film layer. This difference in thickness is used to compensate for differences in the etching rate of the second film layer. While improving the linewidth roughness or line edge roughness, this method ensures that the top of the second film layer is not excessively etched away, reducing top loss.

The present invention discloses an etching method for an MRAM magnetic tunnel junction, comprising: Step 1, a main etching step with an etching amount of t1 is carried out by using ion beam etching and / or reactive ion etching: the direction angle of the ion beam is 10° to 60°, and the bias voltage of the reactive ion etching is 400 - 1000 V; Step 2, a cleaning step with an etching amount of t2: the bias voltage of the reactive ion etching used is 50 V - 400 V, and the pulse duty ratio is 5% - 50%. t1:t2 ≥ 0.5. After the cleaning step is completed, the etching morphology on the bottom electrode or the bottom dielectric layer is a square groove; Step 3, in-situ protection: a film is deposited for in-situ protection. The present invention combines RIE and IBE etching. Through the arrangement of the etching sequence and the selection of the etching parameters, while significantly improving the etching effect of small-size dense magnetic tunnel junctions, it is also applicable to the etching of non-dense magnetic tunnel junctions. Thus, the problems of low selectivity and low steepness during the etching of dense patterns are solved. Further, the square etching groove can greatly improve the TMR and service life of the MTJ junction and eliminate bottom deposition.

The invention relates to an ion beam etching device suitable for a large-size wafer and a vacuum etching machine. Comprising a vacuum cavity, an ion source arranged on the vacuum cavity, a sample carrying table and a gas injection device arranged in the vacuum cavity, wherein the ion source is used for outputting an ion beam, and the sample carrying table is used for carrying a large-size wafer; the gas injection device is arranged in a partitioned manner corresponding to the bearing area of the sample carrying table; the gas injection devices are respectively connected to a gas source through a gas mass flow valve; the gas source comprises inert gas and / or reactive gas; the gas mass flow valve is connected to a mass flow controller; the mass flow controller is used for carrying out independent flow regulation on the inert gas and / or reactive gas jetted in the gas jetting device of each partition according to flow control parameters, and dynamically regulating the atmosphere concentration on the surface of the large-size wafer so as to finely adjust the reaction rate; according to the technical scheme, the rate difference of different areas of the wafer can be compensated, and the etching uniformity of the large-size wafer is improved.

The invention discloses lithium niobate with high anisotropy and a smooth side wall and a preparation method of the lithium niobate, and belongs to the technical field of semiconductor processes. The preparation method comprises the following steps: by adopting typical reaction etching, the advantage of higher selectivity during reaction ion beam etching is reserved; adding a sacrificial mask SOH to isolate the top and sidewalls of the lithium niobate layer having the initial tapered profile; by increasing the thickness of the top metal hard mask, the mask budget of the top metal hard mask in subsequent etching is improved; and finally, etching the side wall comprising the redeposition layer and the conical lithium niobate structure with the metal seeds by adopting an ion beam, and finally cooperatively realizing a vertical side wall shape and a smooth side wall surface through zero-angle etching treatment, so as to obtain the lithium niobate with high anisotropy and a smooth side wall. According to the method, the separation of the top area and the side wall area of the lithium niobate is realized, the side wall roughness problem after the heavy deposition layer is removed is repaired, and the lithium niobate with high anisotropy and smooth side wall is obtained.

The invention provides a semiconductor structure and a forming method thereof. The forming method of the semiconductor structure comprises the following steps: forming a composite dielectric layer on a semiconductor substrate; etching the dielectric layer and the semiconductor substrate until a deep groove is formed, wherein the side wall of the deep groove is provided with a plurality of sharp corners and concave parts which are alternately arranged; an ion beam etching process is adopted, the incidence angle of etching ions is adjusted, so that the etching ions act on different areas of the side wall of the deep groove respectively, part of or all the sharp corners are removed, and the average distance between the sharp corners of the side wall of the deep groove and the concave part is decreased; and removing the composite dielectric layer. According to the method, the breakdown voltage of the deep groove silicon capacitor can be uniformly distributed, and the reliability of the device is improved.

The invention provides a method for controlling the morphology of dry etching, and the method comprises the steps: (1) depositing at least one film layer to be etched on the surface of a substrate wafer, then carrying out the spin coating of a photoresist mask, carrying out the exposure and development processing, completing the patterning of the photoresist mask, and obtaining a wafer to be etched; (2) fixing a wafer to be etched on a carrying table, and then carrying out ion beam etching with preset energy and preset angle to obtain grooves with holes with different angles, different depths and different sizes; the preset angle is realized by controlling the incident angle of at least one ion beam and / or the inclination angle of the carrying platform. According to the invention, ion beam etching is carried out based on the patterned photoresist mask to form the etching area, and grating structures with different depths, different sizes and different angles are formed in different etching areas by controlling the energy, the angle and the like of the ion beam, so that etching morphology control is realized; and the method is of great significance to periodic arrangement of different depths and different angles on some optical devices.