2 results about "Feature complete" patented technology

The invention discloses an ST language debugging method based on LLVM debugging information and a GDB / MI interface, and relates to the technical field of language development, and the method comprises the steps: carrying out the lexical analysis, grammatical analysis and semantic analysis of an ST source code through an ST language front-end analyzer, and generating a middle presentation layer of an LLVM; encoding the debugging metadata into a debugging information segment in a debugging information recording format, and compiling the debugging information segment and other machine codes into an executable file; the ST debugger starts the GDB through the process control interface and loads the executable file, and the debugging information segment is analyzed through the GDB; the ST debugger sends the debugging command to the GDB through the MI interface, and the GDB debugs the executable file after receiving the debugging command; and the ST debugger receives the feedback information to perform MI interface response analysis. The universal debugging method supports source-level debugging of a universal debugger on a program, improves debugging availability and expansibility, and is irrelevant to a platform and complete in function.

The present application relates to the technical field of digital twinning, in particular to a low-code device information digital twinning model creation method, which builds a model framework by dragging and dropping predefined input, output and logic processing components from a component library to a canvas, flexibly configures component parameters using a context attribute panel, and establishes data flow between component ports using intuitive graphical connection operations, and performs real-time data type checking to ensure the correctness of the connection. Finally, by configuring the address binding of I / O components with external controllers or data sources, and supporting real-time data monitoring and input forced assignment during the simulation stage, a device information model is constructed that is complete in function and can directly interact with the real control system for data verification. The traditional code writing work is transformed into visual configuration and connection operation, greatly reducing the technical threshold and development workload, enabling domain experts to quickly build, modify and debug models without deep programming background.