61results about How to "Extended input voltage range" patented technology

A differential circuit and an amplifier circuit for reducing an amplitude difference deviation, performing a full-range drive, and consuming less power are disclosed. The circuit includes a first pair of p-type transistors and a second pair of n-type transistors. A first current source and a first switch are connected in parallel between the sources of the first pair of transistors, which are tied together, and a power supply VDD. A second current source and a second switch are connected in parallel between the sources of the second pair of transistors, which are tied together, and a power supply VSS. The circuit further includes connection changeover means that performs the changeover of first and second pairs between a differential pair that receives differential input voltages and a current mirror pair that is the load of the differential pair. When one of the two pairs is the differential pair, the other is the current mirror pair. In a differential amplifier circuit, there is provided an added transistor connected in parallel to a transistor, which is one transistor of a differential pair transistors, whose control terminal is a non-inverting input terminal. The added transistor has a control terminal for receiving a control voltage which is set so that, when an input voltage applied to the non-inverting input terminal is in a range in which the transistor whose control terminal is the non-inverting input terminal is turned off, the added transistor is turned on.

A switching voltage regulator has a first switch, a second switch, and an inductor, which are coupled together to a switch node. A switch control system applies a drive signal for controlling the first and the second switches. A duty cycle detecting circuit detects a duty cycle of the drive signal. When the duty cycle is larger than a predetermined threshold, the duty cycle detecting circuit generates an over-threshold signal. When the duty cycle is smaller than the predetermined threshold, the duty cycle detecting circuit generates an under-threshold signal. In response to the over-threshold signal and the under-threshold signal, an oscillating signal adjusting circuit generates an adjusting current. An oscillating signal generating circuit generates and applies an oscillating signal to the switch control system. The oscillating signal has a period adjusted by the adjusting current.

The invention relates to a method for operating a switched mode power supply as an isolating transformer. According to said method, magnetic energy is stored in the core of a transformer during a storage stage via a primary coil that is connected to an intermediate circuit current and the stored magnetic energy is delivered to a load in a subsequent discharge phase, for the most part by means of a secondary coil, a small part of said magnetic energy being discharged on the primary side. The energy that is discharged on the primary side charges a capacitor in such a way that the capacitor current is always held above the secondary current multiplied by the transmittance ratio of the transformer.

An inverting amplifier which drives headphones via an output capacitor includes: an operational amplifier, an input resistor having a first terminal via which an audio signal to be amplified is received, and a second terminal connected to an inverting input terminal of the operational amplifier; and a feedback resistor having a first terminal connected to an inverting input terminal of the operational amplifier, and a second terminal connected to the output terminal. A reference voltage source generates a bias voltage Vb, and supplies it to the non-inverting input terminal. A discharging path includes a discharging resistor and a first switch arranged in series between an output terminal of the reference voltage source and an fixed voltage terminal. A second switch is arranged between the output terminal of the operational amplifier and a node on the discharging path where the electric potential is higher than it is at the discharging resistor.

A tunable voltage-controlled pseudo-resistor structure, comprising: a symmetric PMOS transistor circuit and an auto-tuning circuit connected in series. Input of the auto-tuning circuit is connected to a central position V_f of the PMOS transistor circuit having its output V_g, with its purpose of keeping V_g−V_f at a constant value. The PMOS transistor circuit may produce body effect through various different bulk voltages. Through the auto-tuning circuit, V_g and V_f are kept constant to make current of transistor to produce compensation effect, such that regardless of V_a>V_b or V_a<V_b, a large resistance is maintained. Through utilizing the tunable voltage-controlled pseudo-resistor structure, constant resistance can be maintained under high input voltage, hereby reducing drifting of common-mode voltage, in achieving a superior resistance effect.

There is provided an apparatus and method for controlling a switch of a flyback converter for a solar generating system. The apparatus for controlling a switch of a flyback converter for a solar generating system includes: an MPPT controller generating a current command value for a maximum power point tracker of a solar cell module, based on input voltage, input current, and output voltage of the flyback converter; a current controller generating a current control signal for tracking the current command value; an output current command value generator generating the phase and magnitude command value of the output current, based on the phase of the output voltage and the current control signal; and a switch controller controlling the main switch of the flyback converter, based on the phase and magnitude command value of the output current, thereby simplifying a circuit while solving disadvantages of a discontinuous conduction mode and a boundary conduction mode.

The invention discloses a LDO (Low Dropout Regulator) with a wide input voltage range and a high power supply rejection ratio and belongs to the technical field of power electronics. The LDO comprisesan error amplifier, a power module, a pre-step-down module, a high voltage resistant module and a power supply rejection ratio enhancement module, wherein the pre-step-down circuit module is utilizedfor preprocessing an input voltage of the LDO to obtain a low power supply voltage used for supplying power to a low-voltage circuit part; power is supplied to the error amplifier and the high voltage resistant module so as to obtain a high power supply rejection ratio by utilizing the low power supply voltage, and the input voltage range of the LDO is widened by virtue of the high voltage resistant module; meanwhile, by utilizing the power supply rejection ratio enhancement module inside the LDO circuit, the power supply rejection ratio of the LDO at a high frequency end is further improved;finally the input voltage of the LDO is processed by utilizing the power module, a feedback voltage is obtained to control a positive input end of the error amplifier so as to obtain enough loop gainfor improving the output accuracy of the LDO, and the output voltage of the power module is a final output voltage of the LDO. The LDO disclosed by the invention is wide in input range, small in chipoccupied area and high in power supply rejection ratio.

In an A/D conversion device, one level shift circuit shifts an input voltage to the low potential side by Vt1, and another level shift circuit shifts the input voltage to the high potential side by Vt2. A multiplexer selects either of the shifted voltages to an A/D converter. In a correction mode, a correction data holding circuit holds values of reference voltages that are also A/D converted after being passed through the one level shift circuit and values of reference voltages that are A/D converted by being passed through the other level shift circuit, as correction values. A correction control circuit corrects the A/D converted value using the correction values.

A DC/DC converter is provided for operation within a narrow voltage range during normal conditions, while allowing for a wider input voltage range for short periods of time. A first switch is coupled across first and second input terminals, and a capacitor is coupled in parallel with the first switch and across the input terminals. A second switch is coupled in series with the first input terminal and between the first switch and the capacitor. Operation of the switches is regulated in accordance with a bypass mode of operation when received input power is within a defined range, and a boost mode of operation when received input power is less than a threshold value, wherein the received input power is boosted to a bulk output power within the defined range. Boost operations may in various embodiments be provided via, for example, a critical conduction scheme or continuous conduction scheme.

The invention provides an interface circuit. The interface circuit comprises an input circuit. The input circuit comprises a clamping circuit unit, an input buffer unit and a first output driving unitcoupled to the clamping circuit unit and the input buffer unit. The clamping circuit unit is suitable for clamping a port voltage of the first output driving unit within a corresponding device voltage withstand range when the port power voltage of the interface circuit is larger than a preset auxiliary power supply voltage. According to the scheme above, the input voltage range of the input circuit in the interface circuit can be improved.

A method for extending the linear range of operation of an amplifier includes monitoring a transistor voltage of a transistor of an amplifier. The transistor is coupled to a variable current source applying a bias current to the transistor. The method continues by monitoring an output voltage of the amplifier and by determining whether the transistor voltage is within a predetermined range of the output voltage. If the transistor voltage is not within a predetermined range of the output voltage, the method continues by decreasing the bias current applied to the transistor. If the transistor voltage is within a predetermined range of the output voltage and if the bias current has not previously been decreased, the method continues by increasing the bias current applied to the transistor.

The invention relates to a high-precision fast-integration type AD (Analog-Digital) converter based on a single chip microcomputer, comprising an integrated signal control circuit, an integrator, a level comparison circuit and a single chip microcomputer. The integrated signal control circuit comprises resistors R1, R2, R3 and R4 and analog electronic switches K1, K2, K3 and K4; the integrator comprises an operational amplifier and a capacitor C; and the voltage comparison circuit comprises three high-speed comparators, i.e. a low voltage comparator, a high voltage comparator, a zero-crossingcomparator; and UNK, SC, FC and RC signals output by the single chip microcomputer are respectively connected with the controlled end of the analog electronic switches K1, K2, K3 and K4 and control the on-off of the analog electronic switches. The converter is directly controlled by the single chip microcomputer, and an external counter and a programmable logic device are omitted, thus, the circuit is simplified, the cost is reduced, and the converter is more easily combined with an AD application system.

A differential amplifier includes a pair of input transistors, a pair of load transistors, a pair of impedance devices, a pair of auxiliary input transistors, and a pair of shield transistors is provided. The input transistors provide two input terminals. The load transistors provide two output terminals and two first terminals connected to first voltage. The impedance devices are coupled between the output terminals in series. The auxiliary input transistors have two control terminals respectively connected to the input terminals, two first terminals, and two second terminals. The input transistors and the auxiliary input transistors have reverse conductive type. The shield transistors has a pair of control terminals, a pair of first terminals respectively connected to the second terminals of the auxiliary input transistors and coupled to a second voltage through a pair of current sources, and a pair of second terminals respectively connected to the output terminals.