32 results about "Computational RAM" patented technology

The invention relates to the technical field of signal processing, and discloses a multichannel data acquisition system and method based on an FPGA (Field Programmable Gate Array), an acquisition module drives a global counter by using a global synchronous clock, writes acquired data into an annular buffer area with a physical address and a counter value in a linear mapping relationship, and establishes implicit time index storage. When a trigger event occurs, the system broadcasts the locked global trigger timestamp, and the acquisition module backtracks and reads historical data according to the global trigger timestamp, and packages the historical data into a sparse matrix type data packet in combination with the channel validity mask. And after receiving the data packet, the data processing module directly calculates a memory mapping address by using global time information in the data packet, and writes a data load into a corresponding position of the waveform reconstruction buffer area. According to the method, through strict binding of the physical address and the absolute time, independent time label redundancy is eliminated, high-precision synchronization of distributed multiple channels is ensured, and out-of-order automatic in-situ recombination and efficient waveform reconstruction of data of a receiving end are achieved.

The invention relates to the technical field of edge computing resource management, in particular to an edge server load evaluation method based on analytic hierarchy process and performance loss. According to the method, firstly, edge servers are divided into a common type, a computing type, a memory type and an I / O type according to heterogeneous types; aiming at each type of edge server, constructing a judgment matrix by adopting an analytic hierarchy process and solving a feature vector so as to calculate load weight coefficients of CPU (Central Processing Unit), memory and disk I / O (Input / Output) resources; calculating a real-time load based on the weight coefficient, wherein the real-time load is the weighted sum of the resource utilization rates; the performance loss is further calculated according to the nonlinear relation between the real-time load and the total load ratio; and finally, restraining the real-time load through the load threshold value, and evaluating the performance state of the server in combination with the performance loss. According to the method, the accuracy and reliability of load evaluation of the heterogeneous edge server are effectively improved, the resource utilization rate is optimized, overload of the server is avoided, and the system stability is enhanced.

The invention discloses a high-concurrency virtual service transfer scheduling method and system based on a cloud edge collaborative architecture, and relates to the technical field of cloud computing and edge computing collaboration, and the method comprises the steps: constructing a service gene analysis model at an edge node, responding to a virtual service access request, extracting the resource consumption characteristics of a service flow in real time, and calculating a service separation potential energy index. The virtual business is dynamically decoupled into a connection anchoring phase and a computing power free phase based on the index; establishing a load inertia monitoring mechanism, modeling resource consumption of edge nodes into a kinematics system, collecting speed and acceleration of load change in real time, calculating system pressure momentum, and generating a graded unloading instruction when the momentum exceeds a preset critical collapse threshold value; starting a convergent differential injection mechanism, pre-constructing a logic shadow at a cloud end, and calculating a convergence ratio of a memory dirty page generation rate to a network transmission rate in real time; the method has the advantages of being high in practicability, having the pre-judgment capacity and being capable of achieving lossless switching.

A predictive analytics apparatus, engine, system and method capable of providing real time analytics in a manufacturing system that may include a data input capable of receiving raw data output from at least one machine operable to effect the manufacturing system embodiments, and a processor to execute code from a computing memory. The code may comprise an adaptor to push the received raw data to a database to processed data; an extractor to extract the processed data from the database; predictive analytics to receive the extracted processed data and apply thereto a predictive model comprised of target data for the at least one machine, and to provide feedback to the at least one machine to modify performance of the at least one machine based on the application of the predictive model; and a visualizer capable to provide at least a visualization of the feedback and the performance.

The application relates to the technical field of data processing, and discloses a large file export optimization method and system based on real-time memory monitoring. The method comprises the following steps: monitoring a memory state in real time and calculating a memory growth rate; taking the growth rate as an independent risk dimension, and giving a warning when the rate exceeds a threshold value and the memory usage rate does not reach a threshold value; performing adjustment in response to the warning, including dynamically updating the throughput control of the data shard size, and triggering the degradation mode to reduce the export field to the data precision control of the core field; and attaching an instruction page to the export file during degradation. Through trend prediction and dynamic control, the application reduces the risk of memory overflow and guarantees core data export.

This invention belongs to the technical field of multi-scale particle transport simulation, and discloses a kinetic solution method and system for multi-scale particle transport simulation. The method includes: a particle kinetic model based on discrete velocity form; selecting discrete points in velocity space; calculating the distribution function along the direction of the discrete points in velocity space at the center of the grid according to a compact scheme; accumulating the contribution values ​​of the distribution function to macroscopic physical quantities; scanning the downstream grid sequentially based on the direction of the discrete points in velocity space; changing the discrete points in velocity space and repeating the operation until the contribution values ​​of the grid at all discrete points in velocity space are accumulated, and obtaining the final macroscopic physical quantities; outputting the calculation results of macroscopic physical quantities when the convergence condition is met. This invention discloses a kinetic solution method and system for multi-scale particle transport simulation that balances computational memory, accuracy, and efficiency, and is particularly suitable for multi-scale particle transport simulation with a large number of discrete points in velocity space and strong heterogeneity.

Embodiments of the present disclosure provide a data processing method, a distributed system, an electronic device and a storage medium. The method is applied to a distributed system comprising a master node and a plurality of slave nodes, and comprises: the master node determining task information allocated to each slave node according to a hierarchical attribute of a target model and a computing power state of the plurality of slave nodes, wherein the task information is used to specify a model layer processed by the corresponding slave node; each slave node performing weight quantization processing of the corresponding model layer based on the allocated task information to obtain complete quantized weights of the target model. The method realizes full-link collaborative optimization from computing, memory to storage, significantly improves the execution efficiency of weight quantization tasks and the utilization rate of hardware resources, and provides technical support for efficient deployment of large-scale models.

The invention provides a system architecture for cross-data center large model training and a resource allocation method and system, and belongs to the technical field of cross-wide area distributed large model training. According to the method, large-scale model cooperative training across multiple data centers can be realized, and the bottleneck that the computing power of a single data center is limited is broken through. Through unified modeling and scheduling of calculation, memory and network resources, task loads can be intelligently allocated according to hardware performance and network bandwidth of different data centers, and efficient collaborative utilization of computing power resources is realized. The training task of the super-large-scale model can be rapidly completed in the heterogeneous computing power environment, and the training time is remarkably shortened. The provided flexible parallelism degree allocation method can be adaptive to different task and resource conditions, the proportion of data parallelism, model parallelism and pipeline parallelism is automatically adjusted, the parallelism efficiency is improved, and the communication overhead is reduced. A training time estimation function is integrated, the overall time delay and resource requirements can be predicted before task execution, and a basis is provided for scheduling decision making.

The application discloses a kind of 6G network multidimensional resource AI model dynamic deployment optimization methods based on category theory, belongs to intelligent collaborative optimization technical field;Method is: the cross-layer consistency dependency of end-to-end AI reasoning service is formalized by functor form;Establish the joint optimization model with long-term average end-to-end delay minimization as target, while being constrained by multidimensional resource and service quality;Convert long-term random optimization problem into time-slot online decision problem;Get AI model dynamic deployment and task scheduling result.The application realizes cross-layer consistency description to task scheduling and model deployment through category theory unified modeling and functor composite mechanism, reduces the inconsistency and redundant constraint caused by hierarchical modeling, improves the structured degree and explainability of joint decision;Under the constraint of multidimensional resources such as calculation, memory, storage and bandwidth, dynamic adaptive optimization is realized, node resource over-limit and load imbalance are effectively avoided, and congestion and queuing delay are reduced.

This disclosure provides a method, apparatus, and system for determining memory access latency. The method includes: determining the start time of multiple memory access commands based on a single timer; for any one of the memory access commands, in response to detecting the completion of the memory access command, determining the latest value of a timer overflow flag corresponding to the memory access command, wherein the latest value of the timer overflow flag indicates the number of times the timer has reached its maximum value from the start time of the memory access command until its completion; and determining the access latency duration corresponding to the memory access command based on the latest value of the timer overflow flag. This method can accurately calculate the access latency duration corresponding to memory access commands while reducing hardware resource consumption, thereby achieving efficient and accurate memory access latency monitoring.

Data storage device comprising an integrated circuit further comprising a control unit (100) and a storage array (400) of charge-based memory cells, wherein: the storage array (400) comprises a first subsection (410) that can be operated as a storage unit and a second subsection (420) that can be operated as a dosimeter; the control unit (100) is capable of providing a reference current (Iref) and To perform memory access operations in order to access memory with reference to the reference stream (Iref); and the control unit (100) is further capable of analyzing a statistical distribution of read streams (Iread) using memory access operations in the second subsection (420), the analysis comprising the following: counting logical reading errors of the Memory access operations and calibration of the reference current (Iref) depending on a number of counted logical read errors, which is also an indicator of total ionization dose (TID).

The invention is suitable for the technical field of cooperative control, and provides a decoupling type multi-host energy efficiency cooperative control system, which comprises a resource abstraction and dynamic reconstruction module used for performing hardware-level decoupling on computing, memory, storage and accelerator resources of heterogeneous computing nodes, and constructing a dynamic resource pool supporting on-demand combination; the multi-dimensional perception and digital twinborn modeling module is used for collecting power consumption data, performance data, thermodynamic data and business load data of the physical infrastructure in real time and constructing a system-level real-time energy efficiency digital twinborn model; the quantum heuristic collaborative decision module adopts an optimization algorithm based on a quantum annealing principle; the self-adaptive closed-loop execution module is used for converting the joint optimization strategy into a control instruction of underlying hardware and adjusting the running state of the system in real time through a feedback mechanism; and a self-optimized intelligent closed loop is formed by means of real-time feedback, so that a traditional static and isolated energy efficiency management normal form is overturned fundamentally.

The application relates to the computer technical field and discloses a memory dynamic adjustment method and system, an electronic device and a storage medium, which comprise the following steps: collecting resource performance indexes of a virtual machine and a host computer, forming historical standardized time sequence data, performing normalization processing to obtain standardized time sequence data, filtering abnormal data points exceeding a preset mutation threshold, if it is identified that the virtual machine is in a non-steady-state operation, suspending a prediction process, inputting a double-scale time sequence convolution network model, outputting a future short-term memory usage rate sequence through a short-term prediction branch, outputting a memory change trend label through a long-term trend branch, calculating a memory pressure entropy value based on the future short-term memory usage rate sequence, presetting a multistage constraint rule, generating a memory adjustment instruction, correspondingly triggering a hot plug operation according to the memory adjustment instruction, and executing a rollback mechanism when an adjustment exception is detected. The application can meet the actual needs of efficient, intelligent and self-adaptive dynamic adjustment of virtual machine memory resources.

This application relates to a matrix multiplication approximation calculation method based on a multi-hash voting mechanism. The method includes: a source computing node in the inference system obtains the token activation value matrix of the data to be inferred, which is to be sent to the target computing node where the target expert resides; the source and target computing nodes perform hash compression and voting operations on the token activation value matrix and the expert weight matrix respectively based on multiple preset hash functions to generate corresponding sketch sets; during the All-to-All communication process at the MoE layer, the source computing node sends the sketch set of the token activation value matrix to the target computing node; the target computing node performs approximate calculations based on the rows selected from the intersection of the two sketch sets to obtain the inference result. This method improves the inference efficiency of the inference system by introducing multiple independent hash functions for collaborative sampling and voting, thereby reducing computation, memory usage, network load, and GPU idle waiting time.

The invention discloses a distributed large language model reasoning adaptive load balancing method based on MAPE-K. The method comprises the following steps: S1, multi-dimensional performance monitoring; s2, carrying out multi-factor load analysis; s3, self-adaptive routing planning is carried out; and S4, load balancing execution. According to the method, performance problems can be automatically found without manual intervention, an optimization scheme is formulated, adjustment is implemented, and the method has self-adaption and self-optimization capabilities; the node state is comprehensively evaluated from calculation, memory, queue and tail delay, different types of performance bottlenecks can be accurately distinguished, and a reliable basis is provided for formulating a targeted optimization strategy; intelligent matching is carried out according to request features and node capabilities, appropriate workloads are allocated to appropriate nodes, and resource waste and performance degradation caused by one-step static allocation are avoided; historical experience is accumulated through the knowledge base and used for optimizing future decisions, and the load balancing capacity of the system is continuously improved along with the increase of running time.

The present application relates to a kind of remote sensing image change detection method based on sparse change self-attention mechanism, for computing, memory efficient high-precision unified change detection.The present application combines the principle of deep learning, probability graph theory, proposes a unified probability change modeling theory framework, the joint distribution of random variable in change process is conditionally decomposed, according to different prior assumptions, different factors can be decomposed, these factors are the theoretical representation of the architecture of deep change detection model, further parameterize these decomposition factors using the proposed sparse change self-attention module, so as to obtain specific task adaptive, computationally efficient deep change detection model architecture.The present application can solve the problem that existing architecture design lacks theoretical basis and has high computational complexity, and can realize unified processing of various change detection tasks and rapid change detection of large-scale remote sensing image pairs.

The invention provides a computing and memory chip packaging structure and device and a resource pooling system. The memory chip packaging structure comprises: a packaging substrate; the optical interconnection module comprises a photoelectric signal conversion module and a first power receiving and generating chip; a first photonic integrated circuit chip disposed on the package substrate; and a memory chip module disposed on the first photonic integrated circuit chip and including a first electrical interconnection interface. The first power receiving and generating chip comprises a second electrical interconnection interface which is electrically connected with the first electrical interconnection interface through the first photon integrated circuit chip. The first power receiving and generating chip converts a first electric signal from the memory chip module into a second electric signal and converts a third electric signal from the photoelectric signal conversion module into a fourth electric signal sent to the memory chip module. The photoelectric signal conversion module converts the second electric signal into a first optical signal output to the outside and converts a second optical signal received from the outside into a third electric signal.

The invention discloses a training deduction decoupling and asynchronous overlapping reinforcement learning method and system for a small language model, which is characterized in that a training deduction decoupling and iteration internal asynchronous scheduling method is adopted, and the parallel execution of reasoning and training is realized without changing the semantics and convergence properties of the original GRPO algorithm, so that the learning efficiency is improved. According to training deduction decoupling, reasoning Worker and training Worker are deployed on different GPU resource groups, and physical separation of Actor reasoning and training in the spatial dimension is achieved; the asynchronous scheduling in iteration realizes time overlapping of reasoning and training; the system is composed of a reasoning execution module, a Reference model calculation module, a reward generation module, a training module and the like and a parameter buffer area located in a CPU, and all the modules are unified and coordinated through a scheduling layer. Compared with the prior art, the method has the advantages that a localized, high-throughput and stable reinforcement learning training process is realized under the limited hardware condition by a user, and the system bottlenecks of communication amplification, resource coupling, computing-memory load imbalance and the like generally existing in a training system after SLM reinforcement learning are effectively solved.

The invention discloses a cache synchronization type data storage method for vehicle-mounted equipment, which comprises the following steps of: executing data storage by software equipped on the vehicle-mounted equipment: after a system is powered on, synchronously creating a first data file and a data cache region, and storing real-time data in a double-path parallel manner; a data cache region calculates the size of a memory space according to a data transmission rate, a file switching gap and the like, determines the queue length in combination with a redundancy ratio, and dynamically updates data according to a'first-in first-out 'principle. And when the data file reaches the storage upper limit, closing the old data file, additionally creating a new data file, migrating the data in the cache region to the new data file, and continuing to circularly store the data. According to the method, seamless connection of data storage is realized through double frameworks of file storage and data caching and file switching priority caching write-in logic, so that the risk of data loss is completely eradicated, the instantaneity, coherence and reliability of data storage are improved, and the requirements of continuous generation of vehicle-mounted scene data and strict requirements on integrity are met.

The embodiment of the invention provides a method, a device and equipment for determining memory leak time. The method comprises the following steps: inputting a memory feature matrix corresponding to memory feature data into a target model to obtain a target probability; and under the condition that the target probability is greater than a preset target threshold value, determining the memory leakage time according to the growth rate of the value of the memory feature data in the preset time period and a preset memory alarm threshold value. The target probability of the memory feature data is calculated through the target model, and under the condition that the target probability is larger than the preset target threshold value, the memory leakage time is determined by calculating the growth rate of the value of the memory feature data in the preset time period and the preset memory alarm threshold value, so that early warning of memory leakage is realized, and the memory leakage time is shortened. Therefore, the risk of memory leakage is reduced, and the utilization rate of the memory is improved. And moreover, the utilization rate of the memory is improved, and the memory which is ineffectively occupied by the system within the memory leakage time is reduced, so that the probability of jamming of the system due to excessive memory occupation can be reduced.

The embodiment of the invention provides a data processing method, a distributed system, electronic equipment and a storage medium. The method is applied to a distributed system comprising a master node and a plurality of slave nodes, and comprises the following steps: the master node determines task information allocated to each slave node according to hierarchical attributes of a target model and computing power states of the plurality of slave nodes, and the task information is used for specifying a model layer processed by the corresponding slave node; and each slave node executes weight quantization processing of the corresponding model layer based on the distributed task information to obtain a complete quantization weight of the target model. According to the method, full-link collaborative optimization from calculation, memory to storage is realized, the execution efficiency of a weight quantification task and the utilization rate of hardware resources are remarkably improved, and technical support is provided for efficient deployment of a large-scale model.

This invention relates to the field of network communication and discloses a bandwidth resource allocation method, apparatus, device, and storage medium. The bandwidth resource allocation method provided in this invention includes: obtaining a first bandwidth efficiency of the current network interface card (NIC); calculating memory bandwidth utilization when the first bandwidth efficiency is less than a first bandwidth efficiency threshold but greater than a second bandwidth efficiency threshold; performing first-level memory pooling optimization on the current physical machine node when the memory bandwidth utilization is greater than the memory utilization threshold, and calculating the optimized memory bandwidth utilization; if the optimized memory bandwidth utilization is still greater than the memory utilization threshold, then performing next-level memory pooling optimization on the current node again, until the optimized memory bandwidth utilization is less than the memory utilization threshold. The bandwidth resource allocation method provided in this invention can balance the memory bandwidth and NIC bandwidth requirements under high load scenarios, achieving accurate identification and hierarchical optimization of memory bandwidth bottlenecks.

Provided in the present disclosure are a computing chip packaging structure, a memory chip packaging structure, a memory apparatus, a computing apparatus, and a resource pooling system. The memory chip package structure comprises: a packaging substrate; an optical interconnection module, which comprises an optoelectronic signal conversion module and a first transceiver chip; a first photonic integrated circuit chip, which is arranged on the packaging substrate; and a memory chip module, which is arranged on the first photonic integrated circuit chip and comprises a first electrical interconnection interface, wherein the first transceiver chip comprises a second electrical interconnection interface, which is electrically connected to the first electrical interconnection interface by means of the first photonic integrated circuit chip; the first transceiver chip converts a first electrical signal, which is from the memory chip module, into a second electrical signal, and converts a third electrical signal, which is from the optoelectronic signal conversion module, into a fourth electrical signal sent to the memory chip module; and the optoelectronic signal conversion module converts the second electrical signal into a first optical signal outputted to the outside, and converts a second optical signal, which is received from the outside, into the third electrical signal.

The invention provides a model performance test method and system based on autonomous controllable computing power, and the method comprises the steps: collecting calculation, memory and power consumption performance data through a micro-benchmark test, and generating a low-dimensional resource fingerprint vector through preprocessing, and taking the vector as a computing power feature representation basis; analyzing a model calculation graph to extract key layer parameters, generating a bottleneck identification score in combination with a resource fingerprint, and automatically generating a lightweight structure replacement candidate set; constructing graph neural network coding structure features, fusing resource fingerprints and fitness scores to predict reasoning delay, power consumption and accuracy loss, and screening high-credibility candidate structures; deploying the candidate structure to a target platform to collect actual measurement performance data, and optimizing the prediction model through incremental learning to form a dynamic self-learning closed loop; and selecting an optimal structure based on the optimized prediction model, completing model format conversion, quantitative pruning and compiling deployment, and realizing deep adaptation of the platform. According to the method, rapid evaluation, accurate optimization and stable operation of the model structure in a dynamic computing power environment are realized.

The present application provides a kind of based on M-HODLR solving electromagnetic scattering method of metal medium composite structure, to solve the problem of large memory consumption and low accuracy of electromagnetic scattering result when solving electromagnetic scattering of metal medium composite structure.The implementation steps of the present application are: the surface of metal medium composite structure is completely meshed;Define the base function on each mesh element after meshing and sort the base function;Fill the total impedance matrix;Total impedance matrix is blocked using M-HODLR method;Each sub-matrix block after blocking is compressed using enhanced ACA method;Solve the matrix equation of the generated metal medium composite structure and calculate the electromagnetic scattering result.The present application has the advantages of significantly reducing the calculation memory, reducing the solving time and the high accuracy of the electromagnetic scattering result of the metal medium composite structure calculated.

Certain aspects of the present disclosure provide techniques for aspects of the present disclosure, aspects of the present disclosure relate to wireless communications, and more particularly to techniques for determining a minimum list size to be used in a list decoding operation for reducing resource consumption (e.g., computations, memory, and power) at a decoder. A method includes receiving a codeword including a plurality of channel bits encoded with an error correction code, the plurality of channel bits including at least a plurality of information bits; determining a payload size of the codeword; determining a channel capacity metric for the plurality of channel bits; determining a minimum list size for the list decoding operation based at least on the payload size and the channel capacity metric; and performing a list decoding operation on the codeword based on the minimum list size to obtain a plurality of information bits.

A computational memory device and a method using the computational memory device are provided. The computational memory device includes memory banks configured to store weight data of a neural network model and a weight memory block configured to provide at least some of the weight data from memory banks in response to a weight request, a computational memory block physically stacked on the weight memory block such faces of the respective blocks face each other, the computational memory block configured to perform a multiply-accumulate (MAC) operation between the at least some of the weight data and at least some of input data by using a bit cell array including bit cells, and a communication interface configured to perform communication between the weight memory block and the computational memory block.

[0094] Techniques are described for using computing devices to perform automated operations for analyzing visual data of images acquired at a building to determine building information that includes building dimensions. The automated determination of building dimensions and other building information may include determining estimated camera height for one or more camera devices while acquiring the images based on identified visible structural building objects of defined types, using the determined image scale information to further determine resulting building dimensions, and associating the building dimension data with a floor plan generated from analysis of the images. Information about such determined buildings may be used in various automated manners, including for controlling device navigation (e.g., autonomous vehicles), for display on client devices in corresponding graphical user interfaces, for further analysis to identify shared and / or aggregate characteristics, etc. 85 20 24 20 07 92 08 F eb 2 02 4 2 0 2 4 2 0 0 7 9 2 0 8 F e b 2 0 2 4 8 5 1 / 19 19 1 19 4- 2 19 6- 3 19 6- 1 19 5- 1 21 0A 21 0B 21 0K 21 0D21 0C 21 0 F 21 0J 19 0- 2 19 2 19 4- 1 19 5- 2 19 6- 419 3 18 5 11 5 21 5- AB 21 5- AC 21 5- BC 11 5 11 5 19 5- 3 19 0- 3 19 5- 5 19 6- 6 19 6- 5 19 6- 7 19 6- 8 10 9 19 6- 2 19 0- 1 19 8 21 0L 21 0- O 21 0N 11 5 21 0G11 5 21 0I up 26 3b 26 3a up 18 9 19 6- 9 19 5- 4 18 8 18 4 18 5 / 18 4 21 0H 21 0P 21 0M 19 0- 4 19 0- 5 21 0E 26 3c 11 5 19 0- 7 ca m er a de vi ce (s ) 18 4 Fi g. 1 18 7 18 6 19 0- 6 Bu ild ing O bje ct- Ba se d S ca le De ter mi na tio n M an ag er (B OB SD M) Sy ste m 14 0 ne tw or k( s) 17 0 Im ag e C ap tur e & A na lys is (IC A) an d / o r M ap pin g I nfo rm ati on Ge ne ra tio n M an ag er (M IG M) S ys tem (s) 16 0 se rv er c om pu tin g sy st em (s ) 18 0 sy st em us er c lie nt co m pu tin g de vi ce s 10 5 bu ild ing flo or pl an s / ot he r ma pp ing in for ma tio n 1 55 ca ptu re d b uil din g i nfo rm ati on (im ag es , e tc. ) 1 65 m ob ile im ag e ac qu is iti on d ev ic e 18 5 pr oc es so r( s) 1 32 m em or y / st or ag e 15 2 IC A a pp lic at io n 15 4 im ag in g sy st em 1 35 br ow se r 16 2 di sp la y sy st em 1 49 co nt ro l s ys te m 1 47 se ns or m od ul es 1 48 gy ro sc op e 14 8a ac ce le ro m et er 1 48 b co m pa ss 1 48 c bu ild in g in fo rm at io n ac ce ss us er c lie nt co m pu tin g de vi ce s 17 5 tar ge t o bje cts an d a dd itio na l e lem en ts ide nti fie d i n i ma ge s’ vis ua l d ata 14 2 bu ild ing im ag es 14 1 G P S s en so r( s) 1 34 I / O & c om m un ic at io n co m po ne nt s 14 3 24 1 de pt h se ns or (s ) 13 6 de ter mi ne d i ma ge sc ale (s) 14 3 de ter mi ne d o bje ct / bu ild ing di me ns ion s 1 44 server computing system(s) 180 system mobile image acquisition device 185 user client Building Object-Based Scale Determination Manager (BOBSDM) computing memory / storage 152 depth System 140 devices sensor(s) 136 target objects and additional elements 105 ICA application 154 identified in images' visual data 142 building images 141 GPS sensor(s) 134 browser 162 determined image scale(s) 143 processor(s) 132 network(s) sensor modules 148 determined object / building dimensions 144 170 imaging system 135 gyroscope 148a accelerometer 148b display system 149 building Image Capture & Analysis (ICA) and / or Mapping Information information compass 148c control system 147 Generation Manager (MIGM) System(s) 160 access captured building information building floor plans / other user client I / O & communication components 143 (images, etc.) 165 mapping information 155 computing devices 175 camera device(s) 184 195-1 196-1 -196-7 187 198 194-1 192 196-8 210 195-2 F 210J 210K 210B 196- 115 215-BC 2 193 2 210L 196-9 18 263b 185 115 115 5 195-5 184 115 184 189 115 210P 210C 115 190-4 190-2 210G 109 241 215-AB N WA DE 215-AC 194-2 190-7 263a -190-3 210E 210M 210A 190-1 263c 186 210D 2101 191 195-4. 190-5 196-6 210N Fig. 1 195-3 190-6 188 196-4 196-3 196-5 210H 210-0 20 24 20 07 92 08 F eb 2 02 4 2 0 2 4 2 0 0 7 9 2 0 8 F e b 2 0 2 4 server computing system(s) 180 mobile image acquisition device 185 u s e r c l i e n t Building Object-Based Scale Determination Manager (BOBSDM) memory / storage 152 S y s t e m 1 4 0 target objects and additional elements identified in images' visual data 142b u i l d i n g i m a g e s 1 4 1 determined image scale(s) 143 n e t w o r k ( s ) determined object / building dimensions 144 Image Capture & Analysis (ICA) and / or Mapping Information i n f o r m a t i o n Generation Manager (MIGM) System(s) 160 captured building information building floor plans / other u s e r c l i e n t ( i m a g e s , e t c . ) 1 6 5 mapping information 155 d e v i c e s 1 7 5 1 9 6 - 8 F 2 5 Nu p u p

A capacitive charge-coupling mode analog compute in-memory (CIM) bitcell array is configured to generate an analog output voltage corresponding to a multiply-accumulate (MAC) operation result using a multibit weight. The analog output voltage is inputted to a dual-mode activation module which is selectively operable either in a Deep Neural Network (DNN) mode and a Spiking Neural Network (SNN) mode. The activation module comprises a sample and hold (S&H) circuit, a comparator, a digital-to-analog converter (DAC) which can be reconfigured in accordance with the selected one of the DNN mode and the SNN mode.

The invention discloses a heterogeneous calculation task mapping method based on reinforcement learning, and particularly relates to the technical field of reinforcement learning, the method detects the CPU utilization rate and the task queue length in real time, dynamically screens hardware actions, calculates a memory bandwidth demand difference value, then implements double filtering, selects high-success-rate low-delay actions during resource conflicts, and finally performs task mapping. And identifying a key path and preferentially distributing low-delay hardware by an operation task dependency chain parameter, dynamically adjusting a weight based on a key path ratio, scaling an action space scale in combination with a load change rate, and finally selecting a highest reward estimated value to complete mapping. According to the method, response delay is remarkably reduced through a multi-stage cooperation mechanism, task accumulation is effectively controlled, key path execution time is compressed, burst load adaptive capacity is enhanced, resource utilization efficiency is improved, and stable and efficient task scheduling is achieved in a heterogeneous computing environment.