93 results about "Parallel transmission lines" patented technology

The lane skew alignment device of the present invention facilitates the use of the SFI-5 standard interface in an FPGA without the need to rely on feedback signals from a remote device. The delay between lanes is determined using a D-Flip Flop or other type of phase comparator. To minimize the components needed to physically implement the solution a cross-point switch is used to select one of the parallel lanes at a time to be compared to a reference lane, over which the same test signal is transmitted.

A transmission line capacitor includes at least two side-by-side capacitor portions spaced apart between a separating portion all contained in a single monolithic body. Such transmission line capacitors provide specific capacitor functionality for parallel transmission lines in a printed circuit board environment, while also maintaining a desired impedance value between the transmission paths. The transmission line capacitors offer both biasing functionality for blocking undesired DC voltages as well as AC coupling functionality for passing AC voltage signals with preserved data integrity. A first embodiment may be formed with a dielectric material having a relatively low dielectric constant, allowing high capacitor “height” with fixed spacing between distinct capacitive structures. Another embodiment may be formed with a relative high K dielectric and then slotted with an air gap between capacitive structures. Yet another embodiment may be formed with a relatively high K dielectric material, and with a relatively low K material provided in between capacitive structures. A still further embodiment concerns a transmission line capacitor design formed with high K and low K dielectric materials punched into a monolithic thin-film device.

The present invention relates to the technical field of relay protection and particularly relates to a longitudinal zero sequence direction protection method of a one-tower double-circuit parallel transmission line. The method comprises a step of collecting the electrical quantity of two ends of a transmission line when the transmission line has a fault, a step of judging whether one end of the transmission line has negative sequence current or not, a step of judging whether the zero sequence direction of one end of the transmission line is positive or not if the one end of the transmission line has the negative sequence current, a step of judging whether the zero sequence directions of two ends of the transmission line is positive or not if the zero sequence direction of one end of the transmission line is positive, a step of judging that the fault is an internal region fault, and acting longitudinal zero sequence protection, otherwise, judging that the fault is an external region fault, and not acting longitudinal zero sequence protection. Through employing different zero sequence direction judgment methods for the different fault types in the transmission line, the accuracy of the longitudinal zero sequence direction protection is improved, the problem that the longitudinal zero sequence direction protection of the other non-failed line acts wrongly if one transmission line is failed in the one-tower double-circuit parallel transmission line is solved, and the reliability and the security of the transmission line are improved.

A current mode transfer logic system suitable for driving transmission lines is disclosed. In one embodiment a twisted pair transmission line is terminated in its characteristic line impedance. A signal is formed of two unequal currents, preferably of different polarities as well as magnitudes, that are driven down the two lines. The unequal currents are selectively switched between the two lines creating a logic signal of a differential current drive of unequal current magnitudes. The unequal currents are received and shunted from the distal end of each line via diode connected MOS transistors. The MOS transistors are biased to present a low impedance, but an impedance higher than the terminating resistor. The currents are amplified and converted to useable CMOS voltage levels. In another embodiment the twisted pair is replaced by two parallel transmission lines which are terminated in one resistor, equal to the sum of the characteristic impedances of each line. The terminating resistor is connected between the distal signal carrying conductors of each transmission line. The shields or return paths for each line are tied together at the distal and at the proximate (drive) ends of the line.

The invention relates to a parallel radio interference calculation and optimization method for a high voltage AC/DC line. According the relevant information of an existing actual high voltage AC/DC parallel transmission line, including the AC line voltage level, the number of circuits, the DC circuit voltage level, the line structure and the like, a two-dimensional hybrid radio interference calculation model is established; for input model parameters, considering the interaction between AC and DC, an empirical formula method and an excitation function method are used to calculate the radio interference under the mutual influence of AC and DC lines, and geometrical superposition is performed to obtain a hybrid radio interference value of the transmission line; at the same time, and throughthe calculation of hybrid radio interference for different line heights and parallel distances, the optimization method for radio interference is selected. According to the parallel radio interferencecalculation and optimization method, the radio interference intensity of the high-voltage AC/DC parallel transmission line is reduced, and the purpose of optimizing the electromagnetic environment ofthe high-voltage AC/DC parallel line is achieved.

The invention aims at providing a method for analyzing crosstalk of transmission lines in any layout, and the transmission lines are not parallel and are crossed. The method specifically comprises the following steps that firstly, the type of transmission line layout is judged, if the transmission lines are not parallel, a third step is executed, and if the transmission lines are crossed, a second step is executed; secondly, a coupled region and an uncoupled region of the crossed transmission lines are judged, if it is judged as the coupled region, the third step is executed, and if it is judged as the uncoupled region, cross coupling influences are not taken into consideration; thirdly, nodes are introduced to connecting points of dispersing segments and are named as ideal nodes, and scattering parameters of all the nodes and transmission functions of all the dispersing segments are solved; fourthly, the results obtained in the third step are substituted into a BLT equation, voltages of all the nodes can be obtained, and then the crosstalk among the lines is obtained.

A power amplifier is provided having an input for receiving a signal to be amplified that is associated with a fundamental frequency. An amplifier circuit of the power amplifier includes an active device for amplifying the input signal and an output for providing the amplified signal to a load. A load network is electrically interposed between the amplifier circuit and the output and includes fundamental frequency matching circuitry which presents an optimal resistance at the fundamental frequency. The load network further includes a parallel transmission line arrangement having, at the fundamental frequency, a one-eighth wavelength short-circuited stub and a one-eighth wavelength open-circuit stub. The fundamental frequency matching circuitry and the parallel transmission line arrangement cooperate such that the load network operatively presents an optimal resistance at the fundamental frequency, an open-circuit at a second harmonic frequency and a short-circuit at a third harmonic frequency.

The invention relates to the field of communication, in particular to a power divider, an electronic device, a radio frequency front-end device and a power dividing method. The power divider comprises an input port (P1), a first output port (P2) and a second output port (P3), wherein at least two segments of which the characteristic impedances decrease in sequence are connected in series between the input port (P1) and the first and second output ports (P2, P3); each segment comprises transmission lines which are connected in parallel; each parallel transmission line in every segment is connected through a concentrated resistor at the tail end of each segment which is positioned on one side of the first output port (P2) and one side of the second output port (P3); and the resistance of each concentrated resistor increases in sequence from the input port (P1) to the first and second output ports (P2,P3). Due to the adoption of the power divider, the electronic device, the radio frequency device and the power dividing method, ultra-wideband equal power dividing can be realized in a planar circuit mode.

The invention, which relates to the antenna design field of the communication technology, provides a segmentation-line-based high-isolation bipolarized MIMO loop antenna. On the basis of a same annular structure, two kinds of orthogonal radiating modes are obtained by different exciting points and structures, thereby realizing an electro-magnetic dipole with concurrent orthogonality and an orthogonal directional diagram. When feeding is carried out by using coplanar parallel transmission lines at a first port 100, the loop antenna based on segmented periodic structure with equivalent capacitance loading will generate ring currents with uniform amplitudes and same directions, wherein the radiation characteristic of the loop antenna is equivalent to that of a magnetic dipole. An equiamplitude and inverted excitation current is inputted at a second port 101 by using a T type microstrip feeder structure; and the radiation characteristic of the loop antenna is equivalent to that of an electric dipole. The bipolarized antenna has high isolation and does not need any extra coupling reducing structure. Moreover, the bipolarized MIMO loop antenna having a single-layer planar structure has advantages of having simple and compact structure and being easy to process and realize.

The invention discloses a double-circuit parallel transmission line single phase grounding fault point transition resistance value measuring method, which comprises the following steps of calculating zero-sequence current of an II circuit transmission line of a double-circuit parallel transmission line, and accurately calculating a single phase grounding fault point transition resistance value according to the linear relationship between voltage drop and fault distance from a protection installation part of a I circuit transmission line of the double-circuit parallel transmission line to a single phase grounding fault point. The method considers the influences of zero sequence mutual inductance between lines and single phase grounding fault point voltage, overcomes the influences of transition resistance, load current and zero sequence mutual inductance between the lines on single phase grounding fault point transition resistance value measuring accuracy, and has higher measurement accuracy.

The invention discloses an ultra small-electric size electromagnetic resonant unit, a left-handed medium formed by the same and an application. The resonance unit includes a substrate and two parallel 1/2 wavelength open-circuited transmission lines arranged on the substrate; the two parallel transmission lines are spirally arranged in a coiled manner; the two parallel transmission lines can be excited by an electric field and a magnetic field simultaneously under electromagnetic waves so as to generate electric resonance and magnetic resonance; a plurality of resonant units can be connected together along the same line through coupled inductors so as to be arranged to form a resonant group; a plurality of resonant groups are arrayed at intervals in parallel at the same plane so as to form a resonant layer; and a plurality of resonant layers are stacked along a vertical direction so as to form the left-handed medium. The resonant unit of the invention can form a superbly uniform artificial medium, and the defect of low uniformity of a traditional continuous medium such as Teflon can be eliminated, and therefore, the artificial medium can be applied in practice, and the original characteristics of the artificial medium can be maintained. The resonant unit can be widely applied to the field of various kinds of artificial media.

The invention discloses a microwave dual-frequency impedance-matching network which consists of parallel transmission lines and a stub line. According to the dual-frequency impedance-matching network, the real impedance matching can be realized nearby two frequency points aiming at specific frequency-related complex impedance. The dual-frequency impedance-matching network disclosed by the invention is arranged between a radio frequency source and a load and consists of a parallel transmission line structure and a stub line in cascade, wherein the parallel transmission line structure comprises two transmission lines which are parallel to each other, and the dual-frequency impedance matching between the radio frequency source and the load is realized by the network. According to the dual-frequency impedance-matching network, the three transmission lines can be arranged side by side, so that the circuit is compact, the line arrangement space is greatly reduced, and the overall length of the circuit is shorter. The dual-frequency impedance-matching network is reasonable in design, has higher design freedom and adaptability, can adapt to various different load conditions and is wide in application range, and the frequency ratio of two applicative frequency points is high.

The invention relates to an implement method for a plane micro-strip linear high-distribution ratio unequal power divider. Excessively high characteristic impedance is lowered by introducing the method of an improvement factor C, and a 'T'-shaped structure is used for replacing a quarter-wave transmission line with excessively low characteristic impedance, so that the line width of each microstrip line is in a reasonable range, and the difficulty in manufacturing the high-distribution ratio unequal power divider with a traditional plane microstrip line is solved. Moreover, compared with the prior art utilizing a double sided parallel strip line (DSPSL) or a non-ideal plane structure (DGS), the implement method has advantages in manufacturing cost and difficulty and circuit dimension.

Provided is a linear polarization array antenna device for vehicle that is low-cost and has a high gain, by forming an array antenna and a transmission line by conductor patterns on a substrate. The present invention is provided with: a dipole antenna array in which a plurality of dipole antennas formed by the conductor patterns provided on a dielectric substrate are arranged; and two parallel transmission lines formed by the conductor patterns provided on the dielectric substrate, wherein power is supplied to the dipole antennas via the transmission lines. The two parallel transmission lines have a structure in which a pair of conductor patterns face each other across the dielectric substrate interposed between the pair of the conductor patterns.

A continuously-arranged sensor system is provided that can eliminate a shift in timing between a determination signal of each sensor unit and sensor information relating to the determination signal. The continuously-arranged sensor system includes a network unit and a plurality of sensor units, which are connected by a serial transmission line and a parallel transmission line. In accordance with a command sent from the network unit, each sensor unit transmits the determination signal and the sensor information, provided at the same time as the determination signal, to the network unit via the serial transmission line. Therefore, the network unit can obtain the determination signal and the sensor information exhibited at the same time.

The invention discloses a double-circuit line different phase overline grounding fault single-terminal location method, which comprises the following steps of calculating a zero-sequence current phase angle of an II circuit transmission line of a double-circuit parallel transmission line; calculating zero-sequence current of the II circuit transmission line of the double-circuit parallel transmission line; calculating grounding fault point voltage of a I circuit transmission line of the double-circuit parallel transmission line; calculating the line distance from a protection setting range of the I circuit transmission line of the double-circuit parallel transmission line to a grounding fault point; then utilizing a protection setting range to minus the line distance from the protection setting range of the I circuit transmission line of the double-circuit parallel transmission line to the grounding fault point, and obtaining a fault distance from a protection installation part of the I circuit transmission line of the double-circuit parallel transmission line to the grounding fault point. The method considers the influences of zero mutual inductance between lines, eliminates the influences of zero mutual inductance between the lines on double-circuit parallel transmission line different phase overline grounding fault single-terminal location accuracy.