5results about How to "Reduce verification workload" patented technology

The embodiment of the invention provides a verification method, computing equipment and a verification system. The verification method comprises the following steps: acquiring operation information of a to-be-verified processing unit; carrying out convergence anomaly analysis on the operation information, and determining a convergence anomaly operator in the to-be-verified processing unit; based on the operator type of the convergence anomaly operator, a target verification tool corresponding to the operator type is called to verify the convergence anomaly operator, a verification result is obtained, the target verification tool is constructed based on a convergence constraint corresponding to the operator type, and the convergence constraint is used for constraining the complexity of verifying the convergence anomaly operator. The verification quality is effectively improved, and the convergence speed of the verification process can be accelerated by optimizing the verification complexity of the convergence anomaly operator, so that the verification period is shortened, and the verification efficiency is improved. In addition, the innovation scheme provided by the embodiment of the invention can be used for the RISC-V processor.

The invention discloses an SA-CNN-BiLSTM-based intelligent substation virtual loop automatic generation method, which comprises the following steps: in an SCD file, extracting IED equipment information of historical IED equipment and virtual terminal information contained in the historical IED equipment, and storing the IED equipment information and the virtual terminal information in a historical SCD database; forming a semantic similarity model; and based on the semantic similarity model, finding a final historical IED equipment association pair corresponding to the to-be-designed IED equipment association pair, and instantiating the to-be-designed IED equipment association pair based on the final historical IED equipment association pair. According to the method, the virtual terminator information contained in the historical SCD file is rapidly extracted in a DOM mode and stored in the database in a classified mode, and the query and matching speed is remarkably increased. The semantic similarity model can effectively extract semantic features and endow the semantic features with higher weights, the semantic recognition success rate is high, and the method has a good effect in intelligent substation virtual connection automatic design.

The invention discloses a media data verification method, system and device, equipment and a medium, and relates to the technical field of data transmission. The method comprises the steps that fingerprint information corresponding to multiple audio and video frames in media data to be transmitted is calculated through a fingerprint extraction assembly, and multiple pieces of fingerprint information are obtained; target fingerprint information meeting a preset standard is selected from the multiple pieces of fingerprint information; determining a verification data packet for verifying the media data to be transmitted based on the target fingerprint information; and in the data transmission process of the to-be-transmitted media data, verifying the to-be-transmitted media data based on the verification data packet through the fingerprint verification component, and determining whether the to-be-transmitted media data is tampered or not. According to the technical scheme provided by the invention, the verification workload of audios and videos can be reduced, and the bandwidth of a data transmission link can also be reduced.

The application discloses a kind of for EFlash BIST function verification method, comprising the following steps: S1, in register transfer level (RTL) top layer instantiation an EFlash BIST sequence generation module, waiting for chip power-on reset to enter working state, the test mode control pin of general input and output interface of chip is set high, and chip enters test mode;S2, generate excitation sequence through EFlash BIST sequence generation module and input excitation sequence to BIST interface through general input and output interface, after BIST controller converts excitation sequence into access operation to FLASH module, execute current operation and return operation result data to EFlash BIST sequence generation module to carry out next round operation.The application can ensure the correctness and reliability of BIST controller function and part FLASH particle function, improve the overall verification efficiency of chip.

The present application belongs to the technical field of information security, and particularly relates to a multi-seal stamping system based on a block chain smart contract. The present application realizes the cooperation of multiple units and multiple seals, initiatively adds a multi-seal approval mode on the platform side, covers the blank of such a scene in the market, and realizes that units that join the platform can join the seal approval flow; the present application proposes a set of localized or platformized seal verification logic based on a smart contract relying on specific hardware equipment, and does not need to rely on a verification code to perform manual verification on a webpage, thereby truly reducing the verification workload and realizing that the device can only be automatically verified locally before being started.