This invention provides an integral firing
neuron circuit and its operation method, relating to the field of
semiconductor device technology. A pulse application circuit is coupled to the electrodes of a VCMA-MRAM device to apply a sequence of
voltage pulses. This causes the resistance of the VCMA-MRAM device to switch between multiple resistance states in response to the
voltage pulse sequence, sequentially simulating the
neuron's integration phase, firing phase, and
refractory period reset phase. An output detection circuit is coupled to the VCMA-MRAM device to detect
voltage changes generated when the device's resistance changes, and generates neural pulse signals based on these voltage changes. This circuit, through VCMA-MRAM
device simulation and precise voltage-driven control, simplifies the circuit, avoids physical interference caused by current-driven operation, improves the fit with biological characteristics, and provides a simple, reliable, and energy-efficient hardware implementation scheme for integral firing neurons.