4results about How to "Reduce loop area" patented technology

The invention provides a driving circuit, a motor driving chip, a motor control device and electric equipment. The driving circuit comprises a power device unit and a power device driving circuit, wherein the power device unit comprises a first silicon-based power device, a first silicon carbide power device, a second silicon-based power device and a second silicon carbide power device; the power device driving circuit is used for driving the first silicon carbide power device to be switched on in a switch-on stage and a switch-off stage of the power device unit and driving the first silicon-based power device to be switched on in the switch-on stage of the power device unit when the power device unit is used as an output loop of a power signal; and when the power device unit is used as an input loop of a power signal, the second silicon carbide power device is driven to be switched on in the switching-on stage and the switching-off stage of the power device unit, and the second silicon-based power device is driven to be switched on in the switching-on stage of the power device unit. The driving circuit can reduce the switching loss of the power device and prolong the service life of the power device.

The invention provides a packaging structure of a semiconductor device and the semiconductor device. The packaging structure comprises a substrate; the power module comprises a plurality of power sub-modules, each power sub-module comprises a positive electrode layer, a negative electrode layer, a decoupling structure, an upper bridge arm structure and a lower bridge arm structure, the positive electrode layer is located on one side of the negative electrode layer, the decoupling structure is electrically connected with the positive electrode layer and the negative electrode layer, the upper bridge arm structure is located on the positive electrode layer, and the lower bridge arm structure is located on the negative electrode layer. The lower bridge arm structure is located on one side of the cathode layer deviating from the anode layer; the positive bus is electrically connected with the positive layer, the negative bus is electrically connected with the negative layer, and the decoupling structure is electrically connected with the positive bus and the negative bus in parallel. When the upper bridge arm structure is switched on and off in a high-frequency state, high-frequency current can be generated, the current and a semiconductor chip nearby the decoupling structure with low impedance can form a very short loop, the area of the current loop is greatly reduced, and equivalent parasitic inductance in the high-frequency loop is reduced.

The invention discloses a high-integration carrier plate and a manufacturing method thereof, the carrier plate is used for a power module, the carrier plate comprises at least one hollow area, an inductance element is arranged in the hollow area, the inductance element comprises a magnetic core and a winding penetrating through the magnetic core, and the winding penetrates through the magnetic core. A side wall metal piece is arranged on at least one part of the side wall of the hollow area, at least one side wall metal piece is used for being electrically connected with an electrostatic potential end of the power supply module, and the inductance element is fixedly connected with the side wall of the hollow area through an insulated bonding medium layer. The inductance element is embedded in the printed circuit layer substrate, a smaller Vin-GND loop is achieved through wiring of the printed circuit layer substrate frame, and parasitic parameters are reduced.

This utility model relates to the field of circuit equipment technology and discloses a busbar copper bus structure for improving parasitic inductance. It includes an improved busbar copper bus and a non-improved busbar copper bus. The improved busbar copper bus has a copper busbar substrate in the middle, a bent portion fixedly connected to the top of the substrate, a connecting portion fixedly connected to the top of the bent portion, and wiring extension plates fixedly connected to the lower sides of both sides of the substrate. A bent plate is fixedly connected to the other end of each wiring extension plate, and a wiring plate is fixedly connected to the other end of each bent plate. This busbar copper bus structure for improving parasitic inductance has a short distance of 17.5mm from the positive terminal of the positive busbar copper bus to the positive capacitor terminal, resulting in a shorter current path and better overall performance. It achieves the following technical effects: 1. Reduced parasitic inductance; 2. Improved dynamic response; 3. Optimized current sharing and thermal performance; 4. Suppression of electromagnetic interference (EMI); 5. Maximized capacitor efficiency.