64results about How to "Shorten the current path" patented technology

The invention discloses a low voltage differential signal driver provided with common-mode feedback. The driver comprises a common-mode feedback circuit (10) and a driving circuit (20), wherein the common-mode feedback circuit (10) is used for stabilizing common-mode voltage of outputted low voltage differential signals, and the driving circuit (20) is sued used for generating the low voltage differential signals. The low voltage differential signal driver provided with common-mode feedback utilizes the mode of cancelling extraction of large resistance of common mode points, and achieves the low voltage differential signaling (LVDS) driver provided with the common-mode feedback. The driver is simple in biasing circuit, is improved in performances including power consumption, area and the like, and solves the problems that existing LVDS drivers are complicated in biasing circuit, large in power consumption and large in occupied area of the large resistance of the extracted common mode points.

A thin stacked semiconductor device suitable for high speed operation. A plurality of specified circuits are formed on one surface of a semiconductor substrate while being arranged, and wiring and insulating layers being connected electrically with the circuits are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode, forward end of the through-type electrode is projected by etching one surface of the semiconductor substrate, a second insulating layer is formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, bump electrodes are formed on both electrodes and then the semiconductor substrate is divided to form a semiconductor device. A plurality of semiconductor devices thus obtained are stacked and secured at the bump electrodes thus manufacturing a stacked semiconductor device.

The invention discloses a lead-acid storage battery and an electric car using such a lead-acid storage battery, and aims at providing a lead-acid storage battery capable of effectively shortening a current path between bus bars and reducing internal resistance, heat value, and temperature and current collection property fluctuation among single batteries, and an electric car. The lead-acid storage battery comprises a plurality of single batteries arranged side by side, each single battery comprises a single battery jar and a polar group, the polar group is composed of a plurality of positive plates and a plurality of negative plates which are arranged alternatively in a manner of being separated by separators, positive lugs on the positive plates of the same polar group are connected through a positive bus bar, and negative lugs on the negative plates of the same polar group are connected through a negative bus bar; the positive bus bar and the negative bus bar of the single battery are directly connected with the negative bus bar and the positive bus bar in the single battery jar adjacent to the single battery through metal connectors, the single batteries are connected in series, and the positive bus bars, the negative bus bars and the metal connectors are located at the same height.

The invention provides a semiconductor device with a separated planar field plate structure and a manufacturing method thereof. The method comprises: step 1, providing a semiconductor substrate, forming a source, a drain and a gate on the semiconductor substrate, and forming a drift region in the semiconductor substrate between the gate and the drain; step 2, forming a first dielectric layer to cover the surface of the semiconductor substrate, the source, the drain and the gate; and step 3, forming a first field plate layer on the first dielectric layer, at least part of the first field platelayer being located above the drift region and close to the gate. According to the manufacturing method, the steps of depositing the dielectric layer and forming the field plate layer are alternatelyperformed to form a separated planar field plate structure comprising one, two or more field plate layers to achieve the advantage of compatibility between process platforms. The formed separated planar field plate structure shortens the current path of the drift region and improves the performance of the device.

The invention discloses a circuit module and the manufacture method of the circuit module applied to be connected with a first contact zone of a system circuit board. The circuit module at least includes a printed wiring board and at least one electronic component arranged on the surface of the electronic component. The printed wiring board is provided with a base board and a circuit pattern; wherein, the base board is provided with at least a surface and a plurality of sides. The circuit pattern is formed on the base board and at least one side of the base board is also provided with a plurality of second contact zones. The a plurality of second contact zones are connected with the circuit pattern and corresponding to the first contact zone of the system circuit board. The invention omits the using of a connector and is contacted with a welding cushion on the system circuit board by the edge of the printed wiring board and thus the invention can save cost and shorten the circuit route thereby reducing the energy consumption of power transmission. Besides, the manufacture mode of the edge jointing zone of the printed wiring board is accomplished by making use of the widely-known plated through hole technique and cutting technique. The method is very easy and can save manufacture time.

The invention discloses an electromagnetic compatibility device for a spark light source of a photoelectric direct-reading spectrometer.The electromagnetic compatibility device comprises a low voltage controlling module, a high voltage generating module, a power module and a voltage isolating module; both the low voltage controlling module and the power module are arranged in a spark light source box; both the high voltage generating module and the voltage isolating module are arranged in a Faraday cage; the Faraday cage is integrated with an exciting platform; a connecting wire for the low voltage controlling module and the high pressure generating module between the Faraday cage and the spark light source box and a connecting wire for the voltage isolating module and the power module are arranged in a shielding mechanism; the exciting platform is connected with the power module through a return cable; the spark light source box and the return cable are grounded; the power module, the low voltage controlling module, the high voltage generating module and the exciting platform are connected with a reference ground in a power supply. According to the electromagnetic compatibility device for a spark light source of a photoelectric direct-reading spectrometer, a current path of a high voltage loop is reduced and electromagnetic interference amplitude is reduced, thereby foundationally solving electromagnetic interference.

The invention discloses a SiC Schottky power diode. The SiC Schottky power diode comprises an N-type 4H-SiC substrate, a P-type 4H-SiC isolation layer and an N-type 4H-SiC epitaxial layer from bottom to top, and the thickness of the epitaxial layer is less than 6 microns; cathode ohmic contact metal is included and positioned on two sides of the upper surface of the epitaxial layer, and an N + injection region is arranged on the epitaxial layer below the cathode ohmic contact metal; an inverted trapezoidal anode groove is included and p + injection protection regions are arranged on the epitaxial layer around the four inner corners of the inverted trapezoidal anode groove; a passivation layer is included, the first part of the passivation layer is deposited on the upper surface, which is not etched and not covered by the cathode ohmic contact metal, of the epitaxial layer, and the second part of the passivation layer is deposited in the middle of the bottom of the inverted trapezoidal anode groove; and the inverted trapezoidal anode groove, the first portion of the passivation layer, and the second portion of the passivation layer cover the anode Schottky contact metal. According to the invention, the productization of the 4H-SiC Schottky power diode with the high voltage of more than 3000V is realized.

The invention provides a chip and a method of forming the same. The chip includes: a substrate including a storage region and a peripheral region; a storage array formed in the storage region; at least one anti-fuse device formed in the peripheral region and used for repairing a storage defect caused by a failure storage unit in the storage array, wherein the anti-fuse device comprises a gate structure located on the surface of the substrate, and the gate structure comprises a gate dielectric layer located on the surface of the substrate and a gate located on the surface of the gate dielectriclayer; and a doped region arranged in the substrate on one side of the gate structure parallel to the surface direction of the substrate, wherein at least part of the edge of the doped region is aligned with the edge of the gate or is positioned below the gate, and the anti-fuse device is easier to be broken down.

The invention discloses a trench LDMOS transistor with a convex buried oxide layer. The buried oxide layer is located above the substrate layer; a silicon film layer is positioned above the buried oxide layer; the silicon film layer comprises a silicon body, a source region, a drain region, an oxidation trench, a convex extended buried oxide region and a drift region; the oxidation trench is located at the top of the silicon film layer and located between the silicon body and the drain region; the convex extended buried oxide region is positioned at the bottom of the silicon film layer; a device top layer is arranged above the silicon film layer and comprises a source electrode, a gate oxide layer, a gate electrode, an extended oxide layer and a drain electrode; the gate oxide layer is located above the channel and completely covers the channel; the gate electrode is located right above the gate oxide layer and completely covers the gate oxide layer; the extended oxide layer is positioned above the silicon film layer and is in contact with one side, far from the source electrode, of the gate oxide layer; and the drain electrode completely covers the drain region and is in contact with one side, far from the gate oxide layer, of the extended oxide layer. According to the invention, the electric field distribution is improved through the coupling between the oxidation trench and the convex extended buried oxide region, and the conduction resistance and the quality factor are more excellent.

A light-emitting device according to the invention comprises: a substrate; a first conductive type semiconductor layer disposed on the substrate; a mesa disposed on the first conductive type semiconductor layer and including a second conductive type semiconductor layer and an active layer; a first contact electrode contacting the exposed first conductive type semiconductor layer around the mesa; a second contact electrode contacting the second conductive type semiconductor layer on the mesa; a passivation layer covering the first contact electrode, the mesa, and the second contact electrode and having openings; and first and second bump electrodes electrically connected to the first and second contact electrodes through the openings of the passivation layer, wherein the mesa has a plurality of depressions when viewed from above, the first contact electrode is separated from the mesa at a predetermined distance and formed to surround the mesa and contacts the first conductive type semiconductor layer in the pluraity of depressions, and the first and second bump electrodes cover the openings of the passivation layer and a part of the passivation layer.

The present invention provides an insulated gate bipolar thyristor module and an electrode power terminal, wherein the electrode power terminal includes a first electrode and a second electrode, and the first electrode and the second electrode are composed of a multilayer board, The multi-layer board includes N-layer electrode boards, and an insulating board is arranged between two adjacent layers of electrode boards, wherein the M-layer electrode boards are electrically connected through at least one first through hole to form the first electrode, and Each of the first through holes is electrically insulated from every electrode plate except the M layer of electrode plates, and at least one layer of electrode plates other than the M layer of electrode plates constitutes the second electrode. Since the multilayer electrode plates are electrically connected through the first through holes, the alternate arrangement of the multilayer electrode plates can be realized, which can increase the area where the electrodes face each other in parallel and reduce parasitic inductance. The parasitic inductance generated by the IGBT module based on the electrode power terminal is also low.