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7 results about "Neural network topology" patented technology

Definition. Topology of a neural network refers to the way the Neurons are connected, and it is an important factor in network functioning and learning. A common topology in unsupervised learning is a direct mapping of inputs to a collection of units that represents categories (e.g., Self-organizing maps ).

Analog hardware realization of neural networks using libraries of i / o interfaces and power management units

ActiveUS12651152B2Neural learning methodsNeural network topologyAlgorithm
Systems and methods are provided for analog hardware realization of neural networks. The method incudes obtaining a neural network topology and weights of a trained neural network. The method also includes transforming the neural network topology into an equivalent analog network of analog components. The method also includes computing a weight matrix for the equivalent analog network based on the weights of the trained neural network. Each element of the weight matrix represents a respective connection between analog components of the equivalent analog network. The method also includes generating a schematic model for implementing the equivalent analog network based on the weight matrix, including selecting component parameter values for the analog components.
Owner:POLYN TECHNOLOGY LIMITED

Systems and methods involving technical implementations and constructs, software-defined neural networks and associated machine brains that enable implementation of machine cognitive functions including machine consciousness and / or other features

PCT designated stageWO2026107525A2Neural architecturesPhysical realisationNeural network topologyEngineering
Systems and methods herein disclose technology, architectures) and constructs of artificial (machine) brains having the feature of separated hardware and software wherein their full functionality is defined by software only. Implementations not only replicate all known functions of a human brain including consciousness but also establish universal, novel construction and characteristics of software-defined brains realizing any possible, known or yet unknown functionality of an intelligent computer. Additional aspects disclose classes of different Neural Network (NN) topologies, based on the universal representation of a software-defined nerons an d / or software-defined neural networks to implement any kind of known or yet unkno w n neural network via software implementations embodied on any universal hardware, which enable subjective and objective phenomena utilized for processing machine consciousness and machine subconsciousness. Various illustrative functional complexes are set forth via the disclosure of a. new class of neural networks, namely the Heterogeneous Hierarchical Model (HHM).
Owner:GESEK GEORG

Mapping method for neural network computing in heterogeneous environment

PendingCN122242603AResource allocationPhysical realisationNeural network topologyPerformance recovery
This invention relates to the field of neural network computing technology and discloses a mapping method for neural network computing in a heterogeneous environment. The method includes: parsing the neural network computation graph to extract the topological convergence degree of operator nodes and the asynchronous dwell integral of tensors; monitoring the transient operational deviation rate of computing resource units to generate a performance degradation gradient; filtering operator nodes whose convergence degree and integral exceed limits, and using the inactive period formed by the synchronization time difference of predecessor branches as a timing mask to map the filtered operator nodes to computing resource units in the performance recovery period. This invention utilizes the inherent asynchronous waiting gap of the neural network topology to mask the hardware physical temperature control recovery period, eliminates the local memory backpressure caused by asynchronous tensor stacking, and makes the global performance of heterogeneous computing resources approach the sum of the theoretical physical peak values ​​of the hardware.
Owner:XIAN HANGYU CHUANGTONG EQUIP MFG CO LTD

SEMICONDUCTOR DEVICE AND COMPUTER-IMPLEMENTED METHOD FOR DETERMINISTIC GOVERNANCE, STRUCTURAL INTEGRITY AUDIT (SIAEC), SEMANTIC-METRIC CONTROL (SIAEC), AND TOPOLOGICAL FORENSIC EXPLICABILITY OF NEURAL NETWORKS

UndeterminedES3073249A1PathPingDevice material
A semiconductor device (SoC) (1) and computer-implemented method for deterministic artificial intelligence supervision. It incorporates a secure port (8) in an inert state to ensure subordination by injecting a base truth. An AECM module (3) audits the integrity of physical memory using hash trees on the hot path, repairing tensors on the fly with no latency. An AECM module (4) vetoes semantic hallucinations by calculating spatial divergences in hardware and consolidating neuroplasticity in parallel search associative memories (4a) without retraining software. A forensic module (5) extracts the causal triad and cross-references it with a logical topological map, recording the exact node and layer responsible for the failure in immutable storage to provide full explainability.

Intelligent logistics robot picking method and system based on visual perception

PendingCN122176690ABiological modelsSortingNeural network topologyLogistics management
This invention relates to the field of logistics robot technology, and in particular to a visual perception-based intelligent logistics robot picking method and system. The method involves mapping and affine transformation to obtain an ideal grasping area space for the target goods, using information gain to explore the perspective of the ideal grasping area space, and obtaining the next optimal perspective for dynamic grasping planning of the intelligent logistics robot. Weights are normalized and relaxed for training the candidate operation set, constructing a neural network topology search architecture space, and using a differentiable structure to search the neural network topology search architecture space to generate a grasping convolutional neural network. This invention enables precise picking control of target goods identification, detection, labeling, and grasping by intelligent logistics robots, thereby improving the picking performance and accuracy of intelligent logistics robots.
Owner:ZHEJIANG ZHONGYANG STORAGE TECH CO LTD

Systems and methods involving technical implementations and constructs, software-defined neural networks and associated machine brains that enable implementation of machine cognitive functions including machine consciousness and / or other features

PCT designated stageWO2026107525A3Neural architecturesNeural learning methodsNeural network topologyEngineering
Systems and methods herein disclose technology, architectures) and constructs of artificial (machine) brains having the feature of separated hardware and software wherein their full functionality is defined by software only. Implementations not only replicate all known functions of a human brain including consciousness but also establish universal, novel construction and characteristics of software-defined brains realizing any possible, known or yet unknown functionality of an intelligent computer. Additional aspects disclose classes of different Neural Network (NN) topologies, based on the universal representation of a software-defined nerons an d / or software-defined neural networks to implement any kind of known or yet unkno w n neural network via software implementations embodied on any universal hardware, which enable subjective and objective phenomena utilized for processing machine consciousness and machine subconsciousness. Various illustrative functional complexes are set forth via the disclosure of a. new class of neural networks, namely the Heterogeneous Hierarchical Model (HHM).
Owner:GESEK GEORG