53 results about "Voltage dependence" patented technology

A radio frequency switch circuit includes: an antenna terminal; a first and second RF terminal; a first through transistor placed between the antenna terminal and the first RF terminal; a second through transistor placed between the antenna terminal and the second RF terminal; a first shunt transistor placed between ground and the first RF terminal; a second shunt transistor placed between the ground and the second RF terminal; and a distortion compensation circuit including a reverse parallel connected MOS capacitor whose capacitance around 0 volts has voltage dependence that is convex to the minus direction, the distortion compensation circuit being operable to compensate for voltage dependence of off-capacitance around 0 volts of the first and second through transistor and the first and second shunt transistor that is convex to the plus direction. Electrical connection between the antenna terminal and the first and second RF terminal is switchable.

Associative plasticity rules are described to control the strength of inputs to an artificial neuron. Inputs to a neuron consist of both synaptic inputs and non-synaptic, voltage-regulated inputs. The neuron's output is voltage. Hebbian and anti-Hebbian-type plasticity rules are implemented to select amongst a spectrum of voltage-regulated inputs, differing in their voltage-dependence and kinetic properties. An anti-Hebbian-type rule selects inputs that predict and counteract deviations in membrane voltage, thereby generating an output that corresponds to a prediction error. A Hebbian-type rule selects inputs that predict and amplify deviations in membrane voltage, thereby contributing to pattern generation. In further embodiments, Hebbian and anti-Hebbian-type plasticity rules are also applied to synaptic inputs. In other embodiments, reward information is incorporated into Hebbian-type plasticity rules. It is envisioned that by following these plasticity rules, single neurons as well as networks may predict and maximize future reward.

A semiconductor capacitor device has two pairs of first and second MIM capacitors on a semiconductor substrate. The paired first and second MIM capacitors include respective capacitor dielectric films having different compositions. Also, the paired first and second MIM capacitors are connected in inverse parallel fashion, with an upper electrode of the first MIM capacitor being connected with a lower electrode of the second MIM capacitor and with a lower electrode of the first MIM capacitor being connected with an upper electrode of the second MIM capacitor. Furthermore, the two first MIM capacitors are electrically connected in inverse parallel with each other, and the two second MIM capacitors are also electrically connected in inverse parallel with each other. This arrangement facilitates mutual counteraction of the voltage dependences of the two pairs of first and second MIM capacitors so as to make the voltage dependence of the capacitance of the capacitor device small.

To eliminate the substrate voltage dependences of the respective resistance values of resistor elements, in the resistor elements coupled in series to each other over respective substrate regions, the ends of the resistor elements are coupled to the corresponding substrate regions by respective bias wires such that respective average potentials between the substrate regions of the resistor elements and the corresponding resistor elements have opposite polarities, and equal magnitudes.

According to a disclosed embodiment, a composite MIM capacitor comprises a lower electrode of a lower MIM capacitor situated in a lower interconnect metal layer of a semiconductor die. The composite MIM capacitor further comprises an upper electrode of the lower MIM capacitor situated within a lower interlayer dielectric, where the lower interlayer dielectric separates the lower interconnect metal layer from an upper interconnect metal layer. A lower electrode of the upper MIM capacitor is situated in the upper interconnect metal layer. An upper electrode of the upper MIM capacitor is situated within the upper interlayer dielectric which is, in turn, situated over the upper interconnect metal layer. The upper electrode of the lower MIM capacitor is connected to the lower electrode of the upper MIM capacitor while the lower electrode of the lower MIM capacitor is connected to the upper electrode of the upper MIM capacitor.

SOI MOSFETs are used for the transistors for switching of an antenna switch and yet harmonic distortion is significantly reduced. Capacitance elements are respectively added to either the respective drains or gates of the transistors comprising the through MOSFET group of reception branch of the antenna switch. This makes the voltage amplitude between source and gate and that between drain and gate different from each other. As a result, the voltage dependence of source-drain parasitic capacitance becomes asymmetric with respect to the polarity of voltage. This asymmetry property produces signal distortion having similar asymmetry property. Therefore, the following can be implemented by setting it so that it has the same amplitude as that of second-harmonic waves arising from the voltage dependence of substrate capacitance and a phase opposite to that of the same: second-order harmonic distortion can be canceled out and thus second-order harmonic distortion can be reduced.

A delay circuit does not lead to excessive increase in the delay time even if the source voltage drops, and enables to control the delay time from increasing. The delay circuit is designed to delay a logic signal SIN having two logic levels consisting of a low level and a high level, such that the delay times are different for the high and low levels, and the circuit chooses either the low level or the high level and targets a logic level having a shorter delay time. That is, n-MOS transistors N11, N12 and p-MOS transistors P11, P12 are provided as MOS capacitors, so as to change from the off-state to the on-state during the transition period of a signal that appears on each node disposed on a delay path of logic signals. Such a circuit design enables to control source-voltage dependence of delay time so that, even if the source voltage drops, delay times are not increased excessively.

A conductive member of a paper feed roller for use in an electrophotographic apparatus is provided which retains electrical conductivity in an adequate range, is effectively prevented from deteriorating in durability, and is reduced in the voltage dependence of electrical resistance and in resistance unevenness. This conductive member enables satisfactory print quality to be obtained over long. The conductive member comprises:a conductive elastic layer formed from one or more elastic materials selected from the group consisting of rubbers, resins, and thermoplastic elastomers; and a coating layer formed by applying a surface-treating liquid to the outer surface of the conductive elastic layer and then thermally curing the coating. The surface-treating liquid comprises:a medium containing, dispersed and / or dissolved therein, either a polyisocyanate compound or a combination of a polyol compound and an isocyanate compound; and carbon nanotubes dispersed in the medium.

A current source, adapted to generate a current proportional to absolute temperature has a greatly reduced supply voltage dependence and is still able to operate at low operating voltages. This is achieved by the incorporation of a compensation resistor through which a start-up current is passed.

In a successive approximation ADC, resolution is limited because a distortion occurs in an A / D conversion result due to a voltage dependence of a sampling capacitance. An A / D converter includes a sampling capacitor part in which capacitors equal in capacitance value to each other are connected inversely, a successive approximation A / D conversion part that conducts A / D conversion on the sampling charge, a digital correction part that corrects capacitance variation of internal DAC capacitors in the successive approximation A / D conversion part, and a digital correction part that digitally corrects a third-order or more factor of a voltage dependence of the sampling charge.

A Time-Average-Frequency direct period synthesizer is used to improve crystal-less frequency generator's frequency stability. It includes (a) a temperature sensor circuit to compensate temperature-induced frequency instability; (b) a voltage sensor circuit to compensate voltage-induced frequency instability; (c) a calibration circuit to correct manufacture-related frequency error; (d) a frequency control word update circuit to receive the temperature- and voltage-related frequency adjustments, and the calibration-related adjustment, to generate the corresponding frequency control word in a predetermined schedule; (f) a Time-Average-Frequency direct period synthesizer to receive said frequency control word in the predetermined schedule and produce a clock signal with a frequency that is stable and accurate by counteracting the frequency variation caused by crystal-less oscillators' temperature and voltage dependence and correcting the frequency error introduced in manufacture process. Methods of correcting crystal-less oscillators' frequency error and compensating its frequency variation are also disclosed.

A conductive sponge-forming liquid silicone rubber composition comprises: (A) an alkenyl group-containing polydiorganosiloxane; (B) a polyorganosiloxane having at least two silicon-bonded hydrogen atoms in a molecule; (C) a conductive filler; (D) a mixture of water and an inorganic thickener; (E) an emulsifier; (F) a hydrosilylation reaction catalyst; and (G) a curing retarder. A conductive silicone sponge can be obtained by crosslinking and curing the conductive sponge-forming liquid silicone rubber. The conductive silicone rubber sponge generally has fine, uniform continuous porosity and electrical resistance with low voltage dependence.

An operational amplifier circuit includes an input differential circuit and a trim circuit for sensing the operational amplifier's input common mode voltage and generating an offset correction voltage in response thereto. The trim circuit reduces the amplifier's offset voltage dependence on input common mode voltage, and hence improves the common mode rejection ratio of the operational amplifier circuit.

A polyamic acid solution and / or a polyamic acid gel film is subjected to at least one treatment selected from among addition of a semiconductive inorganic filler, addition of an electroconductivity-imparting agent, and formation of a conducting film; and then the polyamic acid contained in the resulting solution or film is subjected to imidation. The semiconductive polyimide film thus produced is well controlled in surface resistance and volume resistance with reduction in the voltage dependences of both resistances, has excellent mechanical characteristics, and realizes a high elongation.

The present invention relates to an electrically controllable / tunable microwave device comprising a ferroelectric substrate with a variable dielectric permitivity and conducting electrodes, arranged on said substrate, and the capacitance of which depends on applied voltage C / V), the microwave device comprises at least two sections or parts of the substrate / electrodes for each of which different electrical field strengths are generated upon voltage application. Said generated electrical field strengths are controlled by means of the design of the device and / or the voltage application such that the slope (dC(dV) of the voltage dependence of the capacitance (C(V) of the microwave device can be controlled.

A bias circuit 22 in a power amplifier 1 is provided with a VBE-controlled voltage source circuit 20 and a Nagata current mirror circuit 21. The Nagata current mirror circuit 21 includes a transistor Tr5 and a transistor Tr6. The transistor Tr5 has its emitter grounded, its base connected to a control input terminal 17 via a resistor R3, and its collector connected to that base via a resistor R4. The transistor Tr6 has its emitter grounded, its base connected to the collector of the transistor Tr5, and its collector connected to the base of the transistor Tr3. The arrangement is capable of compensating both the temperature characteristics of the gain of the power amplifier 1 and the control input voltage characteristics of the gain of the power amplifier 1. In other words, the arrangement is capable of reducing the temperature dependence and control input voltage dependence of the gain of the power amplifier 1.

The invention discloses a preparation method of an electronic device with artificial synapsis at two ends based on organic / inorganic hybrid perovskite, and belongs to the field of the electronic device. The preparation method comprises the following steps: pre-treating a high-doped silicon substrate, spinning-coating a configured perovskite solution on a substrate, performing annealing treatment to obtain a perovskite thin film with good crystallinity; and then evaporating a metal top electrode to obtain the electronic device with perovskite artificial synapsis at two ends. Since the top electrode simulates the biological synapsis cephacoria, a perovskite active layer simulates the synaptic cleft, and a bottom electrode simulates synapsis caudacoria, the perovskite artificial synapsis hascomparatively high sensitivity (100mA), and the dual-pulse facilitation, the peak voltage dependence plasticity, peak persistent dependence plasticity and peak frequency dependence plasticity are realized. The preparation method disclosed by the invention not only can effectively simplify the basic structures of the perovskite artificial synapsis at two ends, the sensitivity is improved, the energy consumption is reduced, and the preparation method has significance for the development of the neuromorphic engineering and the human-like robot.

A CR oscillation circuit comprises first and second logic elements, a capacitive element, and a resistive element. The first logic element is connected between a first node and a second node. The second logic element is connected between the second node and a third node. The capacitive element is connected between the first node and the second node. The resistive element is connected between the first node and the third node. The capacitive element includes a well, a diffusion layer, a gate electrode and a gate oxide film. The capacitive element has a voltage-dependence characteristic such that its capacitance value varies according to the variation in a supply voltage. The capacitance value of the capacitive element decreases when the on-resistance of the first and second logic elements increases according to the variation in the supply voltage.

SOI MOSFETs are used for the transistors for switching of an antenna switch and yet harmonic distortion is significantly reduced. Capacitance elements are respectively added to either the respective drains or gates of the transistors comprising the through MOSFET group of reception branch of the antenna switch. This makes the voltage amplitude between source and gate and that between drain and gate different from each other. As a result, the voltage dependence of source-drain parasitic capacitance becomes asymmetric with respect to the polarity of voltage. This asymmetry property produces signal distortion having similar asymmetry property. Therefore, the following can be implemented by setting it so that it has the same amplitude as that of second-harmonic waves arising from the voltage dependence of substrate capacitance and a phase opposite to that of the same: second-order harmonic distortion can be canceled out and thus second-order harmonic distortion can be reduced.

The invention relates to a temperature-sensitive print head which comprises an external wiring portion. The external wiring portion is provided with power grounding terminals and a signal grounding terminal, a heating resistor layer capable of generating Joule heat is configured on an insulating substrate along a recording width direction, circuit patterns are formed on the surface of the insulating substrate, an insulating protective film layer is covered on the heating resistor layer, a conducting layer is partially or completely covered on a heating resistor covered by the protective film layer, and is connected with an electrostatic grounding terminal arranged on the external wiring portion by a leading-out circuit pattern, and the external wiring portion is provided with the grounding terminals which keep electrically connected with the electrostatic grounding terminal via impedance or by piezoresistors with voltage dependences. The temperature-sensitive print head has the advantages that accumulated charges on the conducting layer are reduced, and can be outwardly released via the circuit patterns configured on the insulating substrate and the external terminals, and static electricity or electrostatic damage to the temperature-sensitive print head due to surge is prevented.

A conductive member of a paper feed roller for use in an electrophotographic apparatus is provided which retains electrical conductivity in an adequate range, is effectively prevented from deteriorating in durability, and is reduced in the voltage dependence of electrical resistance and in resistance unevenness. This conductive member enables satisfactory print quality to be obtained over long. The conductive member comprises: a conductive elastic layer formed from one or more elastic materials selected from the group consisting of rubbers, resins, and thermoplastic elastomers; and a coating layer formed by applying a surface-treating liquid to the outer surface of the conductive elastic layer and then thermally curing the coating. The surface-treating liquid comprises: a medium containing, dispersed and / or dissolved therein, either a polyisocyanate compound or a combination of a polyol compound and an isocyanate compound; and carbon nanotubes dispersed in the medium.

A system and method for generating a low supply voltage and a high supply voltage from an input voltage, wherein the dependency of the high supply voltage magnitude on the magnitude of the input voltage is removed and the resulting high supply voltage magnitude is a multiple of the low supply voltage magnitude. The low supply voltage and the high voltage may be implemented in a power converter of a communication system comprising a plurality of subscriber line interface circuits (SLICs).