13 results about "Voltage dependence" patented technology

The invention relates to the technical field of single molecule devices, in particular to a probability bit device based on single tetraligand molecule dipole moment and a preparation method, a single tetraligand dipole molecule is assembled between a graphene point electrode pair, the single tetraligand dipole molecule has good randomness or uncertainty characteristics, and the probability bit device can be used for preparing a probabilistic bit device based on the single tetraligand molecule dipole moment. The states of the molecules can be read through conductance, and probability bits of a single molecule scale are realized; according to the invention, the linear mapping relation between the bistable time ratio and the bias voltage parameter is established by using the voltage dependence of molecular dipole inversion, the random generation mode of the traditional probability bit is broken through, the molecular configuration dynamic state is used as the core regulation dimension, and the characteristics of high-sensitivity field response and long-time coherence are integrated. And an efficient and extensible hardware carrier is provided for quantum-classical hybrid calculation. The preparation method provided by the invention is simple in process, mild in reaction condition and beneficial to large-scale production.

The semiconductor drive device includes a third turn-off gate resistor that is electrically connected to the third gate electrode of each of the first semiconductor device and the second semiconductor device, and that is inserted into a third turn-off interconnect configured to apply a potential for turning off the third gate electrode. AndRCGsoff≤Vth⁢3min⁡(CCGsgc)⁢dvdt(1)where, in each of the first semiconductor device and the second semiconductor device, a threshold voltage of the third gate electrode being Vth3, a resistance value of the third turn-off gate resistor being RCGsoff, a minimum value of a capacitance between the third gate electrode and the collector electrode in a voltage dependence characteristic being min (CCGsgc), and a time displacement of a voltage at a time of turning on being dv / dt.

Power converter (105), comprising: a switching circuit (200) for selectively providing an input voltage (130) to a switching node (275) at a switching frequency based on a modulated control signal (135) to establish a charge cycle and a discharge cycle to produce a low supply voltage (145) having a magnitude of the low supply voltage (145) at a first output node (260) of the power converter (105), the switching circuit (200) comprising a first capacitor (222) coupled between the first output node (260) of the power converter (105) and a ground node (220); a compensation circuit (224) for the input voltage (130) coupled to the switching node (275), wherein the switching circuit (200) further comprises a first diode (225) coupled between the compensation circuit (224) for the input voltage (130) and the first output node (260) of the power converter (105), wherein the compensation circuit (224) for the input voltage (130) comprises a second capacitor (228) coupled between the switching node (275) and the first diode (225), and a second diode (226) coupled between the second capacitor (228) and the ground node (220), and wherein the switching frequency of the switching circuit (200) is such that a bias voltage on the second capacitor (228) does not have a sufficient time during the discharge cycle of the switching circuit (200) to discharge so as to maintain an offset across the second capacitor (228) equal to the input voltage (130),thereby balancing the input voltage (130) selectively provided to the switching node (275) by the switching circuit (200) such that a voltage fluctuation at the switching node (275) fluctuates by a value that is independent of an amplitude of the input voltage (130); and , a boost circuit (205) coupled to the switching node (275) and to the switching circuit (200), the boost circuit (205) operable to generate a high supply voltage (140) having a magnitude of the high supply voltage (140) at a second output node (250) of the power converter (105), the magnitude of the high supply voltage (140) being a multiple of the magnitude of the low supply voltage (145).

A measuring device (1) and a method for determining the spectral irradiation sensitivity SR (lambda) (17) and the voltage dependent current behavior I (U) of a photovoltaic unit (3) under standard solar conditions are described. The measuring device comprises an illumination source (5), a contact device (7), a controller (9) and an evaluation device (11). The illumination source is capable of selectively emitting light (13) having a variable spectral distribution (15) or a standardized solar spectrum. The controller is capable of controlling the illumination source to emit a standardized solar spectrum in a first mode of operation and successively emit light having N different spectral distributions in a second mode of operation. The evaluation device is configured, in a first operating mode, to determine a voltage-dependent current characteristic I (U) of the photovoltaic unit (3) under the action of a normalized solar spectrum from the measured PV current Imeas, and, in a second operating mode, to determine a voltage-dependent current characteristic I (U) of the photovoltaic unit (3) under the action of a normalized solar spectrum from a plurality of currents Imeas respectively measured when irradiated with N different spectral distributions (15). N (n = 1... N) and determining the spectral irradiation sensitivity SR (lambda) of the photovoltaic unit taking into account a previously known spectral irradiance E (lambda), n (lambda) (n = 1... N) for each of the N spectral distributions.

The present disclosure relates to a molecular memory device comprising a molecular memory unit that includes a first conducting layer, a second conducting layer, and an organic layer interposed between the two conducting layers. The organic layer comprises a compound selected from Formula I, Formula II, their salts, stereoisomers, solvates, or combinations thereof. These compounds exhibit multiple redox states and voltage-dependent geometric isomerism, enabling enhanced electronic switching behavior and multilevel data storage capabilities. The organic materials are sensitive to external stimuli such as voltage, light irradiation, and pH variations, allowing multifunctional integration of sensing, memory, and computing functionalities within a single device architecture. This present disclosure provides a scalable, energy-efficient, and cost-effective platform for advanced memory and neuromorphic computing applications.

The present invention provides a DA conversion device and the like that use the range of low voltage dependency of a MOS capacitor to make it possible to reduce nonlinearity of an output voltage. A charge scaling type DA conversion device comprising a high-order bit side capacitor array and a low-order bit side capacitor array that are connected via an attenuation capacitor comprises a control circuit that applies a voltage, to a plurality of capacitors of the high-order bit side capacitor array and a plurality of capacitors of the low-order bit side capacitor array, so that all of the capacitors have a positive bias voltage or a negative bias voltage at the times of reset and conversion of the DA conversion device, wherein at least one of a reference voltage of the low-order bit side capacitor array and a reset voltage is set to a value different from a reference voltage of the high-order bit side capacitor array.

The present disclosure relates to managing capacitor voltage dependence. A system for reducing voltage dependence effects of a first capacitor caused by a first voltage can include a first capacitor that can include a first physical separation between a first capacitor terminal conductor of the first capacitor and a second capacitor terminal conductor of the first capacitor. The system can also include a second capacitor that can include a second physical separation between a first capacitor terminal conductor of the second capacitor and a second capacitor terminal conductor of the second capacitor, wherein the second physical separation is different than the first physical separation. The system can also include a compensation circuit that can be arranged to receive and at least partially offset voltage dependent signal contributions from each of the first and second capacitors for output to a signal processing circuit.

The pixel circuit operates by operating the drive transistor in the triode region to output a large drive current for high current display applications. In order to keep the drive transistor operating in the triode region in a stable manner, the source-drain voltage dependence of the output current of the drive transistor is compensated by a bias transistor, which keeps the drain voltage of the drive transistor constant at a target drain voltage. The bias transistor is controlled by an operational amplifier (Opamp) running a negative feedback loop to ensure that a fixed target voltage appears at the drain of the drive transistor. To configure the negative feedback loop, the op amp output terminal is connected to the gate of the bias transistor, the negative terminal is connected to the drain of the drive transistor, and the positive terminal is connected to a voltage source line that provides the target voltage.

A battery cell monitoring device is provided for use with a battery cell after initial charging when the battery cell is electrically coupled to the device and is experiencing aging in a controlled environment. The device repeatedly obtains voltage measurements of the battery cell at a sampling rate, calculates a rate of change in voltage based on the voltage measurements relative to the sampling rate, and evaluating the obtained voltage measurement and the calculated rate of change using a model which contains at least one voltage-dependent function and is defined for the battery cell according to a manufacturing specification of the battery cell, to determine whether the battery cell deviates from the manufacturing specification or reaches a predetermined aging stage that removes the battery cell from the controlled environment. Upon determining that the battery cell deviates from the manufacturing specification or reaches the predetermined ripening stage, the device generates a corresponding alert.

The present invention relates to the field of single-molecule device technology, and in particular to a probabilistic bit device based on a single tetraligand molecular dipole moment and a preparation method thereof. A single tetraligand dipole molecule is assembled between a pair of graphene dot electrodes. The single tetraligand dipole molecule has good randomness or uncertainty characteristics, and the state of the molecule can be read by conductance, thereby realizing a probabilistic bit at the single-molecule scale. The present application utilizes the voltage dependence of molecular dipole reversal to establish a linear mapping relationship between the bistable time proportion and the bias parameter, breaking through the random generation mode of traditional probabilistic bits. The dynamics of molecular configuration is used as the core control dimension, and the device has both high-sensitivity field response and long-term coherence characteristics, providing an efficient and scalable hardware carrier for quantum-classical hybrid computing. The preparation method provided by the present invention has a simple process, mild reaction conditions, and is conducive to large-scale production.

The application discloses a long short-term memory neural network circuit based on spintronics and a control method, which comprises an input circuit, a weight circuit and an activation function circuit. The input circuit utilizes a magnetic domain wall-magnetic tunnel junction device to realize time integration of the current time input and the previous time state by analog control of the magnetic domain wall position. The weight circuit comprises a cross array composed of multi-state magnetic domain wall-magnetic tunnel junction devices, wherein the synaptic weight is non-volatile stored as a discrete magnetic domain wall position defined by a photolithography notch. The weight circuit performs a matrix vector multiplication operation in the analog domain. The activation function circuit comprises a random magnetic tunnel junction device, which provides a nonlinear activation function by utilizing the voltage-dependent probability flipping characteristics of the random magnetic tunnel junction device. The application does not need a memristor and a conventional CMOS logic to realize the core LSTM operation, thereby significantly reducing the hardware area, power consumption and delay.

A method of manufacturing a display device includes: the measurement step of sweeping a voltage to light-emitting elements and measuring a current value that flows in the light-emitting elements in response to a voltage value applied; the computation step of computing a first derivative value of the current value with respect to the voltage value, the first derivative value representing voltage dependence of a first derivative of the current value; the peak determination step of determining a peak of the first derivative value; the processing step of processing the light-emitting elements based on a result of the peak determination step; and the attaching step of attaching a housing to the substrate.

To provide a DA conversion device or the like capable of reducing a non-linearity of an output voltage by using a range in which voltage dependency of a MOS capacitor is low.SOLUTION: A charge scaling type DA conversion device comprising an upper bit side capacitor array and a lower bit side capacitor array connected via a damping capacitor includes a control circuit for applying a positive bias voltage or a negative bias voltage to all of a plurality of capacitors of an upper bit side capacitor array and a plurality of capacitors of a lower bit side capacitor array at a time of resetting and conversion of a DA conversion device. At least one of a reference voltage of the lower bit side capacitor array and a reset voltage is set to a value different from the reference voltage of the upper bit side capacitor array.SELECTED DRAWING: Figure 1