58results about How to "Avoid electric field concentration" patented technology

A semiconductor device includes: a first semiconductor region of a first conductivity type disposed on the side of a first electrode; and a second semiconductor region having first pillar regions of the first conductivity type and second pillar regions of a second conductivity type, the first pillar regions and the second pillar regions being provided in paired state and alternately, in a device portion and a terminal portion surrounding the device portion, along a surface on the side of a second electrode disposed on the opposite side of the first semiconductor region from the first electrode. The semiconductor device further includes a lateral RESURF (reduced surface field) region of the second conductivity type disposed at a surface portion, on the opposite side from the first semiconductor region, of the second semiconductor region in the terminal portion.

The present application relates to technology for improving a withstand voltage of a semiconductor device. The semiconductor device includes a termination area that surrounds a cell area. The cell area is provided with a plurality of main trenches. The termination area is provided with one or more termination trenches surrounding the cell area. A termination trench is disposed at an innermost circumference of one or more termination trenches. A body region is disposed on a surface of a drift region. Each main trench reaches the drift region. A gate electrode is provided within each main trench. The termination trench reaches the drift region. Sidewalls and a bottom surface of the termination trench are covered with a insulating layer. A surface of the insulating layer covering the bottom surface of the termination trench is covered with a buried electrode. A gate potential is applied to the buried electrode.

It is an object of the present invention to provide a light emitting element with reduced inconvenience due to dust or the like and a manufacturing method thereof. One feature of the invention is a light emitting element having a first layer provided so as to be in contact with a first electrode, and a second layer provided so as to be in contact with the first layer, between the first electrode and a second electrode. A light emitting layer exists between the second layer and the second electrode. The first electrode, the second electrode, the first layer, the second layer, and the light emitting layer are stacked so that the first layer is formed in advance compared with the second layer. Here, the first layer is a layer containing an organic compound. Especially, an organic compound having conductivity is preferable among organic compounds. Alternatively, the second layer is a layer containing an inorganic compound. In particular, an inorganic compound having hole transport property is preferable among inorganic compounds.

In a semiconductor device of the present invention, a protection diode for protecting a device is formed on an epitaxial layer formed on a substrate. A Schottky barrier metal layer is formed on a surface of the epitaxial layer and a P-type diffusion layer is formed at a lower portion of an end portion of the Schottky barrier metal layer. Then, a P-type diffusion layer is formed to be connected to a P-type diffusion layer and is extended to a cathode region. A metal layer to which an anode electrode is applied is formed above the P-type diffusion layer, thereby making it possible to obtain a field plate effect. This structure reduces a large change in a curvature of a depletion layer, thereby improving a withstand voltage characteristic of the protection diode.

A silicon carbide semiconductor device includes: a semiconductor substrate having a silicon carbide substrate, a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer; a trench penetrating the second and the third semiconductor layers to reach the first semiconductor layer; a channel layer on a sidewall and a bottom of the trench; an oxide film on the channel layer; a gate electrode on the oxide film; a first electrode connecting to the third semiconductor layer; and a second electrode connecting to the silicon carbide substrate. A position of a boundary between the first semiconductor layer and the second semiconductor layer is disposed lower than an utmost lowest position of the oxide film.

Disclosed herein is a semiconductor device including: a semiconductor substrate; a gate insulating film formed on surfaces of the semiconductor substrate including an internal surface of a hole formed in the semiconductor substrate and formed by radical oxidation or plasma oxidation; and a gate electrode formed as buried in the hole. The gate insulating film and the gate electrode form a vertical MOS.

The invention discloses an anti-static, anti-corrosion, waterproof and stretching-resistant insulated cable. The anti-static, anti-corrosion, waterproof and stretching-resistant insulated cable comprises a cable body. The cable body comprises cable cores, a cable core protective layer, an insulating layer, a shielding layer and an outer jacket. The cross section of the cable core protective layer is of a circular structure, and the multiple evenly-arranged cable cores are arranged in the cable core protective layer and separated through PVC plastic connecting rods; a plurality of current guide cores are arranged outside the cable core protective layer and are tangent with the cable core protective layer; the insulating layer is arranged outside the cable core protective layer; waterproof fillers are arranged in a gap between the insulating layer and the cable core protective layer; the shielding layer is tightly extruded on the insulating layer and internally provided with the multiple evenly-arranged current guide cores; a breakdown resistant layer, a steel core protective layer and a waterproof layer are sequentially extruded on the shielding layer from inside to outside; an armor layer is extruded outside the waterproof layer, the outer jacket is arranged outside the armor layer, and a graphite layer is arranged between the armor layer and the outer jacket. The anti-static, anti-corrosion, waterproof and stretching-resistant insulated cable has the advantages of being reasonable in structural design, high in anti-static capacity, good in anti-corrosion performance and the like.

A semiconductor apparatus including a trench gate transistor having at least an active region surrounded by a device isolation insulating film; a trench provided by bringing both ends thereof into contact with the device isolation insulating film in the active region; a gate electrode formed in the trench via a gate insulating film; and a diffusion layer formed close to the trench; on a semiconductor substrate, and also includes an opening portion positioned on one surface of the semiconductor substrate; a pair of first inner walls positioned in a side of the device isolation insulating film and connected with the opening portion; a pair of second inner walls positioned in a side of the active region and connected with the opening portion; and a bottom portion positioned opposite to the opening portion and connected with the first inner walls and the second inner walls, wherein a cross sectional outline of the second inner wall is substantially linear, and a burr generated inside the trench is removed or reduced.

To effectively perform lightning protection in a blade for wind power generation and to prevent the blade from being damaged when arresting lightning. The lightning protection structure of the blade for wind power generation includes a conductive lightning receptor 1 attached to a part of the blade for wind power generation, and a ceramic member 10 interposed between at least surface-layer portions of the lightning receptor 1 and the blade 5. Therefore, an electric field is likely to concentrate at an interface between the ceramic member 10 having excellent heat resistance and the lightning receptor 1, so that it is possible to effectively prevent the blade 5 from being damaged due to a concentration of the electric field at the interface of the blade 5 attached with the lightning receptor 1 when arresting the lightning.

A concentric polygonal metal-oxide-semiconductor field-effect transistor is designed to avoid overlap between corners of the central drain diffusion and inner corners of the surrounding annular gate electrode. For example, the gate electrode may be reduced to separate straight segments by eliminating the corner portions. Alternatively, the drain diffusion may have a cross shape, and the outer annular source diffusion may be reduced to straight segments facing the ends of the cross, or the source and drain diffusions and gate electrodes may all be reduced to separate straight segments. By avoiding electric field concentration in the corner regions, these designs provide enhanced protection from electrostatic discharge.

To effectively perform lightning protection in a blade for wind power generation and to prevent the blade from being damaged when arresting lightning. The lightning protection structure of the blade for wind power generation includes a conductive lightning receptor 1 attached to a part of the blade for wind power generation, and a ceramic member 10 interposed between at least surface-layer portions of the lightning receptor 1 and the blade 5. Therefore, an electric field is likely to concentrate at an interface between the ceramic member 10 having excellent heat resistance and the lightning receptor 1, so that it is possible to effectively prevent the blade 5 from being damaged due to a concentration of the electric field at the interface of the blade 5 attached with the lightning receptor 1 when arresting the lightning.

In a semiconductor device of the present invention, a protection diode for protecting a device is formed on an epitaxial layer formed on a substrate. A Schottky barrier metal layer is formed on a surface of the epitaxial layer and a P-type diffusion layer is formed at a lower portion of an end portion of the Schottky barrier metal layer. Then, a P-type diffusion layer is formed to be connected to a P-type diffusion layer and is extended to a cathode region. A metal layer to which an anode electrode is applied is formed above the P-type diffusion layer, thereby making it possible to obtain a field plate effect. This structure reduces a large change in a curvature of a depletion layer, thereby improving a withstand voltage characteristic of the protection diode.

A semiconductor device that includes an insulating substrate, a plurality of semiconductor layers arranged to be isolated from one another on the insulating substrate, and a semiconductor element independently provided on the semiconductor layers. Further, a trench may extend from the main surface to the substrate and have an inner wall covered with an insulating film. At least one of an edge on the side of the substrate and an edge on the side opposite thereof of the semiconductor layer has a rounded surface. Further, an angle between a line tangent to a surface having a smallest radius of curvature of the rounded surface of the edge and the main surface ranges from 30° to 60° at a section of the edge.

A method of manufacturing an SiC semiconductor device according to the present invention includes the steps of (a) by using a single mask, etching regions of an SiC semiconductor layer which serve as an impurities implantation region and a mark region, to form recesses, (b) by using the same mask as in the step (a), performing ion-implantation in the recesses of the regions which serve as the impurities implantation region and the mark region, at least from an oblique direction relative to a surface of the SiC semiconductor layer and (c) positioning another mask based on the recess of the region which serves as the impurities implantation region or the mark region, and performing well implantation in a region containing the impurities implantation region.

The invention provides a revolving body surface high boss electrolytic machining tool electrode assembly and an electrolytic machining method, and belongs to the technical field of electrolytic machining. The method is characterized in that the tool electrode assembly comprises a tool cathode, a first insulating cavity and a second insulating cavity; and the tool cathode is of a revolving body structure, the surface of the tool cathode is provided with a hollowed-out groove structure, and an opening of the groove structure is of a protruding guide circle structure; the outer side of the firstinsulating cavity is fixedly attached to the inner wall of the protruding guide circular structure, the side wall of the groove structure and the inner side plane of the tool cathode, and the other end of the first insulating cavity is of a tubular structure; the outer side corner of the second insulating cavity is in an arc transition, and the second insulating cavity is fixed in the first insulating cavity through a bottom mounting seat and forms an electrolyte flow channel with the first insulating cavity. According to the method, the electrolyte flowing from the side surface through a first electrolyte inlet can provide a stable flow field for the processing region at the revolving surface, and the electrolyte flowing from the inner side of the groove structure through a second electrolyte inlet can ensure the uniformity of the flow field of the machining region at the side wall of the boss, so that the electrolytic machining stability of the high boss on the surface of the revolving body is ensured.

Some aspects of the invention include a trench gate structure including a p base layer, an n+ emitter region, a trench, a gate oxide film, and a doped polysilicon gate electrode is provided in an active region. A p-type extension region formed by extending the p base layer to an edge termination structure region can be provided in the circumference of a plurality of trenches. One or more annular outer trenches which are formed at the same time as the plurality of trenches are provided in the p-type extension region. The annular outer trenches can surround all of the trenches. A second gap between the annular outer trench and the outermost trench or between adjacent annular outer trenches is less than a first gap between adjacent trenches.

A concentric polygonal metal-oxide-semiconductor field-effect transistor is designed to avoid overlap between corners of the central drain diffusion and inner corners of the surrounding annular gate electrode. For example, the gate electrode may be reduced to separate straight segments by eliminating the corner portions. Alternatively, the drain diffusion may have a cross shape, and the outer annular source diffusion may be reduced to straight segments facing the ends of the cross, or the source and drain diffusions and gate electrodes may all be reduced to separate straight segments. By avoiding electric field concentration in the corner regions, these designs provide enhanced protection from electrostatic discharge.

A spark plug includes a tubular metallic shell; a tubular insulator in the tubular metallic shell located at a front end of the metallic shell and having an axial hole extending in the axial direction; and a center electrode inserted into the axial hole. The center electrode has a space-forming portion which forms, in cooperation with a wall surface of the axial hole, an annular space open frontward in the axial direction, and a main body portion extending rearward from the rear end of the space-forming portion. The thickness of the insulator is 0.6 mm or less as measured on a cross section and contains the front end of the metallic shell. The axial distance between the boundary portion and the front end of the metallic shell is 0.4 mm or greater, where the boundary portion is formed between the space-forming portion and the main body portion.

A metal fitting integration type stress-relief cone is provided with a stress-relief cone which includes a cylindrical rubber-like elastic body on an outer circumference of a cable core and a metal fitting which surrounds the cable core and is integral with a low-voltage side of the stress-relief cone. The stress-relief cone is provided with a cylindrical semi-conducting body part at the low-voltage side and has a bell-mouthed electric-field stress-control part in an end of a high-voltage side, an insulating body part on the high-voltage side with a low-voltage side end concentric with the semi-conducting body part and a cylindrical insulation protective layer which is arranged continuously at the end of the low-voltage side of the insulating body part and is integral with the outer circumference of the semi-conducting body part

A radiation detector using gas amplification includes: a first electrode pattern which is formed on a first surface of an insulating member and has a plurality of circular openings; and a second electrode pattern which is formed on a second surface of the insulating member opposite to the first surface thereof and has convex portions of which respective forefronts are exposed to centers of the openings of the first electrode pattern; wherein a predetermined electric potential is set between the first electrode pattern and the second electrode pattern; wherein edges of the first electrode pattern exposing to the openings are shaped in respective continuous first curved surfaces by covering the edges thereof with a first solder material.

The invention discloses a preparation method for a semiconductor device with improved surge current resistance. The semiconductor device is an improved TMBS diode. According to the semiconductor device, metal Cr is utilized to act as an etching mask film to form a deep groove structure on the surface of a SiC drift layer. Wet etching is performed so that line width of the Cr mask film is narrowed, two sides of a mesa which is not etched are exposed to act as an injection mask film to perform Al-ion injection on the surface of the SiC drift layer, and P-type injection regions are formed on the two sides of the mesa. A PN-junction is formed by the injection regions and an N-type drift region. The PN-junction participates in conduction under the condition of high current. The conductance modulation effect is formed by utilizing minority-carrier injection so that the semiconductor device is enabled to have surge current resistance. Besides, a P-injection region can be formed on the bottom part of a groove simultaneously. The bottom part of the groove can be protected by the P-region under the reverse blocking state of the device, the situation that electric field concentration is formed on a non-ideal etching surface can be avoided, early breakdown can be prevented and thus reliability of the device can be enhanced.

A silicon carbide MOSFET device is disclosed. The silicon carbide MOSFET device includes a gate oxide layer which is constituted by a first gate oxide layer and a second gate oxide layer. A thickness of the second gate oxide layer is larger than a thickness of the first gate oxide layer. Through dividing the gate oxide layer into two parts with different thicknesses, i.e., enabling the gate oxide layer to have a staircase shape, an electric field strength of the gate oxide layer can be effectively reduced, while a threshold voltage and a gate control property of the device are not affected. An on-resistance of the device can be reduced through increasing a width of a JFET region. A method for manufacturing the silicon carbide MOSFET device is further disclosed.

The invention provides a cable connector device, and the device comprises a central connector and two terminal connectors. Two ends of the central connector are correspondingly connected with the twoterminal connectors in a detachable manner. The central connector comprises a connector, two connection sleeves, and two self-locking mechanisms. Two ends of the connector are respectively connected with the two connection sleeves, and the two self-locking mechanisms are respectively disposed on the two connection sleeves, and are used for locking and unlocking the two central connectors. Each terminal connector comprises an insulating part and a terminal housing, wherein the terminal housing is disposed outside the insulating part, and the insulating part is provided with a plugging connection terminal. There is the first distance between each terminal housing and the corresponding plugging connection terminal, and the outer wall, close to one side of the corresponding plugging connectionterminal, of each terminal housing is provided with at least one positioning groove cooperating with the corresponding self-locking mechanism. According to the invention, the device can achieve the quick locking and separation of the central connector and the terminal connectors through the self-locking mechanisms, and improves the cable connection efficiency.

Provided is a shower plate which can completely prevent generation of plasma reverse flow or ignition of plasma excitation gas at a vertical hole section for more efficient plasma excitation. A shower plate (105) is arranged in a processing chamber (102) in a plasma processing apparatus, and discharges plasma excitation gas for generating plasma in the processing chamber (102). A porous gas communicating body (114) having pores communicating in a gas communicating direction is mounted on a vertical hole (112) to be a discharge path for the plasma excitation gas. The pore diameter of an overflow path in a gas communicating path formed by the communicating pores of the porous gas communicating body (114) is 10[mu]m or less.

The invention discloses a machining method of a semiconductor chip, relating to a splitting process without mechanical damage, and provides a machining method of the semiconductor chip, which has the advantages of high efficiency and no mechanical damage and provides a friendly linkage measure. The machining method comprises the following steps of: 1, setting an electrode layer; 2, once acid-etching; and 3, secondarily acid-etching. According to the machining method, an electrode window is firstly formed, and then a metal electrode layer is coated and planted on the electrode window on the surface of a wafer. The metal electrode does not basically react with acid in processes of two times of acid etching. A strong chemical reaction exists between strong acid and a wafer body made of silicon, the wafer body can be rapidly etched, and further the wafer is split according to a designed shape, and finally, hexagonal, circular and other-shaped chips which are difficult to obtain by adopting common means are finally machined.

A 26 / 35kV or 27.5kV silicon rubber cold contraction type through joint comprises an insulation layer. An outer shielding layer is arranged on an outer surface of the insulation layer, a balance pipe is composited on a middle inner wall of the insulation layer, a stress cone is arranged on inner walls at two ends of the insulation layer respectively, two ends of the balance pipe are provided with a two-cone structure respectively, each two-cone structure comprises an inner cone expanding outwards and an outer cone, and the inner cone and the outer cone are connected transitionally through a section of circular pipe with the diameter larger than the inner diameter of the balance pipe. The structure of the balance pipe is modified to optimize electric field distribution, so that electric field concentration at the ends and tangential positions along an interface of the balance pipe is avoided, electric field intensity is effectively reduced, electric field is balanced, a semi-conducting layer in a cable is rationally and effectively restored, electrical performance of the through joint is improved, accident rate is lowered, and stable operation of an electrical system is guaranteed in the long term.

Disclosed is a method of forming an isolation film in a semiconductor device. In the process of forming a stack structure of a pad oxide film and a pad nitride film that expose a semiconductor substrate in an isolation region, protrusions of a tail profile are formed at the bottom sidewalls of the pad nitride film and the pad oxide film adjacent to the surface of the substrate, and top corners of a trench are made rounded using the protrusions as an anti-etch film when the substrate is etched, Therefore, it is possible to prevent concentration of an electric field on the top corners of the trench and prohibit generation of the leakage current. Accordingly, reliability of the process and electrical characteristics of the device could be improved.

A method for forming a triple gate of a semiconductor device is provided. The method includes: forming a buffer layer and a hard mask over a substrate; etching the hard mask and the buffer layer to form a hard mask pattern and a buffer pattern; forming first and second trenches spaced apart within the substrate by partially etching the substrate by a vapor etching process using the hard mask pattern as an etching barrier layer; forming a buried insulation layer to fill the first and second trenches; removing the hard mask pattern and the buffer pattern; forming a gate insulation layer over the substrate between the first trench and the second trench; forming a conductive layer to cover the gate insulation layer; and etching the conductive layer to form a gate electrode.