34results about How to "Avoid etch residue" patented technology

The invention discloses an array substrate, a preparation method thereof and a display panel, which are used for preventing a semiconductor region of an active layer of a thin film transistor from being illuminated, improving the working stability of the thin film transistor, avoiding uneven display pictures and improving the display effect. The array substrate comprises a substrate body, a shading layer located on the substrate body, a buffer layer located on the shading layer, an active layer located on the buffer layer and a shading part. The buffer layer is provided with a groove. The active layer includes a semiconductor region, and a first conductive region and a second conductive region connected to the semiconductor region. The semiconductor region and the shading part fill the groove. The orthographic projection of the shading part on the substrate is annular, the side surface of the semiconductor region is completely surrounded by the shading part, and the first conductor region and the second conductor region are located above the shading part and the semiconductor region. The orthographic projection of the shading layer on the substrate covers the orthographic projection of the semiconductor region on the substrate.

The embodiment of the invention discloses a touch display panel, a manufacturing method thereof and a display device. The touch display panel comprises a touch function layer, wherein the touch function layer comprises a touch electrode layer, and the touch electrode layer comprises at least one metal layer used for forming touch electrodes; the touch function layer further comprises insulating layers in one-to-one correspondence with the metal layers, wherein the insulating layers are adjacent film layers on the sides, close to the display function layer, of the corresponding metal layers, atleast one insulating layer is an insulating layer of a laminated structure, and the insulating layer of the laminated structure comprises an organic insulating layer and an inorganic insulating layerwhich are arranged in a laminated mode in the direction from the display function layer to the corresponding metal layer; the thickness of the inorganic insulating layers can be correspondingly reduced, so the flexibility of the touch display panel can be improved; moreover, etching residues caused by metal oxide generated by water vapor reaction in the metal layer and the organic insulating layer can be avoided, and etching residues caused by metal ions entering the organic insulating layer when the metal layer is formed can also be avoided, so that short circuit is avoided.

The invention provides a thin film transistor and a manufacturing method thereof. The method comprises the following steps: forming a grid electrode, a grid insulation layer, a semiconductor layer and a doped semiconductor layer on a base plate; nitriding by using plasma, so that Si-N weak bonding on the surface of the doped semiconductor layer; depositing a second metal layer; and etching to form a source electrode and a drain electrode and exposing the semiconductor layer between the source electrode and the drain electrode. The Si-N weak bonding is formed on the doped semiconductor layer before the second metal layer is deposited, so silicon atoms between the second metal layer and the doped semiconductor layer are prevented from forming bonding, contact resistance is reduced, and etching residue caused by reduced etching speed is avoided.

The invention relates to the technical field of graphene manufacture, in particular to a device and a method for protecting a graphene film in etching and transfer. The device comprises a first fixture and a second fixture, the first fixture is of a square frame structure comprising first fixture columns, the second fixture is of a square frame structure comprising four second fixture columns, the square size of the first fixture is as same as that of the second fixture, the first fixture is arranged above the second fixture and connected with the second fixture through movable fasteners, and a fixture gap is reserved between the first fixture and the second fixture. The device and the method have the advantages that a graphene sheet is clamped before etching by the aid of a transfer device comprising the first fixture and the second fixture, the graphene sheet can be conveniently transferred and can also be protected in etching, and damage to the graphene film due to the fact that the graphene sheet touches the bottom of an etchant trough is avoided.

The invention discloses a display panel and a manufacturing method thereof. The display panel comprises an array substrate, a plurality of reflecting electrodes, a plurality of isolation units, an anode layer and a light-emitting function layer. The plurality of reflecting electrodes are positioned on the array substrate and are distributed in an array manner; one isolation unit is arranged between any two adjacent reflecting electrodes; the anode layer comprises a first anode located on each reflecting electrode and a second anode located on the side, away from the array substrate, of each isolation unit, and each first anode and the adjacent second anode are spaced through the corresponding isolation unit; and the light-emitting function layer is located on the first anodes. According tothe invention, two adjacent first anodes can be naturally disconnected through the isolation unit, and the cavity length of the device can be adjusted through the thickness of the first anodes.

The invention discloses a touch screen, its manufacturing method and a display device. By setting the bottom layer as the same layer and the same material as the black matrix layer, it is not necessary to increase the additional process and cost for preparing the bottom layer, and only need to replace the original black matrix layer. The composition pattern of the layer can be deformed to obtain the black matrix layer and the bottom pattern at the same time, and generally the material of the black matrix layer is a black material and its reflectivity is generally less than 10%, so compared with the prior art, the bridging line can be reduced. The reflectivity of the area, and the problem of etch residue can be avoided.

The present invention discloses an array substrate and a display panel. The array substrate includes a glass substrate having a display area and a frame area around the display area, wherein the glasssubstrate is sequentially provided a metal layer, an insulating layer, an active layer, a second metal layer, a protective layer and a transparent conductive film layer in a cascading arrangement; adriving chip disposed on the frame area, wherein a plurality of fan-out traces are connected between the driving chip and the display area; a plurality of suspended traces formed on the transparent conductive film layer, wherein the suspended traces have suspended ends and the projections of the suspended traces and the fan-out traces on the glass substrate are alternative and staggered. The arraysubstrate of the invention has the advantage of avoiding the occurrence of etch residues.

The invention provides an etching method, and the etching method comprises the steps: providing a substrate, and sequentially stacking a control gate layer, a floating gate layer, a first word line and a second word line on the substrate, wherein the first word line and the second word line penetrate through the control gate layer and the floating gate layer, the first word line is located in a logic region, and the second word line is located in a memory cell region; etching the first word line with the first thickness; etching the floating gate layer in the logic region and the first word line with the second thickness so as to expose the control gate layer in the logic region; and etching the control gate layer in the logic region and the first word line with the third thickness so as to remove the control gate layer in the logic region. In the logic region etching process, the first word line with the first thickness is etched firstly, and then the first word line, the floating gate layer and the control gate layer are etched synchronously, so that etching residues caused by the low etching rate of the first word line are avoided. Therefore, the etching method can solve the problem that etching residues are generated due to etching selection ratio, the process effect is guaranteed, and the process time is saved.

The invention provides a bulk acoustic wave resonator, a manufacturing method thereof, a filter and a radio frequency communication system. A bottom electrode concave part formed on the periphery of apiezoelectric resonance layer and suspended above a cavity can prevent transverse waves generated by the piezoelectric resonance layer from being transmitted to the periphery of the cavity and reflect the transverse waves back to an effective working area, so that the sound wave loss is reduced, the quality factor of the resonator is improved, and finally, the performance of a device can be improved. Furthermore, the overlapping parts of a bottom electrode overlapping part and the cavity and the overlapping parts of a top electrode overlapping part and the cavity are suspended, and the bottomelectrode overlapping part and the top electrode overlapping part are mutually staggered, so that a parasitic parameter can be greatly reduced, the problems of electric leakage, short circuit and thelike can be avoided, and the reliability of the device can be improved.

The invention discloses a manufacture method for a thin-film resistor. The manufacture method comprises the following steps that: S01: providing a substrate of which the surface is coated with an insulating layer; S02: depositing a thin film resistor material on the substrate, and carrying out graphics on the film resistor material; S03: depositing a metal electrode material, an etching stop layerand a hard mask in sequence on the substrate and the thin film resistor material; S04: adopting first-type dry method etching to carry out graphics on the hard mask, and removing photoresist; S05: adopting second-type dry method etching to continuously carry out graphics on the etching stop layer; and S06: adopting wet method etching to continuously carry out graphics on the metal electrode material to form the thin-film resistor. By use of the manufacture method, the problem of the over etching of the thin-film resistor and the etching residue of the metal electrode can be avoided, and the accuracy and the reliability of the thin-film resistor can be improved.

The present invention discloses a preparation method of a thin-film resistor. The method comprises the following steps: S01 providing a substrate, wherein the surface of the substrate is covered withan insulation layer; S02 depositing and graphing a thin-film resistor material layer on the substrate; S03 depositing a metal electrode material layer and a hard mask layer on the substrate and the thin-film resistor material layer successively; S04 graphing the hard mask layer by adopting dry etching, stopping on the metal electrode material layer, and removing the hard mask layer at the steps ofthe metal electrode material layer and the hard mask layer between the steps of the metal electrode material layer completely; S05 processing the surface of the exposed metal electrode material layerby adopting reducing gas(es); and S06 graphing the metal electrode material by adopting isotropic etching, and removing the exposed metal electrode material layer to form the thin-film resistor. Thepreparation method of the thin-film resistor can avoid the problems of over-etching of the thin-film resistor and etching residue of the metal electrode and improve the accuracy and the reliability ofthe thin-film resistor.

The invention discloses a TFT manufacturing method and a TFT substrate. In the process of etching to form a polysilicon pattern, one part of a polysilicon layer is covered by a non-hollowed region ofa photoresist pattern, the other part is exposed by a hollowed-out region of the photoresist pattern, secondly, dry etching of the polysilicon layer is carried out through employing the first etchinggas to remove protrusion of the polysilicon layer not covered by the photoresist pattern, and dry etching of the polysilicon layer is carried out through employing the second etching gas to remove thepart of the polysilicon layer not covered by the photoresist pattern. The method is advantaged in that complete etching can be facilitated to remove the polysilicon layer not covered by the photoresist pattern, and etching residue is avoided.

The invention discloses a planar gate device structure having a high switching speed and a manufacturing method thereof. The planar gate device structure comprises a semiconductor substrate or an epitaxial layer, and a set of planar gates are arranged on the semiconductor substrate or the epitaxial layer, each planar gate comprises a first gate electrode insulation layer arranged at the middle position, a second gate electrode insulation layer extended from the first gate electrode insulation layer to the two sides, and a gate electrode arranged on the first gate electrode insulation layer andthe second gate electrode insulation layer, wherein the thickness of the first gate electrode insulation layer is larger than the thickness of the second gate electrode insulation layer. The manufacturing method of the planar gate is simple and easy to achieve, the device having the planar gate structure has lower gate and drain capacitance, the faster switching speed and the lower switching loss, and can be widely applied to the power semiconductor device fields such as MOSFET, IGBT and MCT.

The invention provides a wet etching method for an electrode metal layer of a silicon carbide device. The method comprises the steps that the position of a silicon carbide wafer to be etched is adjusted, so that an electrode metal layer to be etched on the silicon carbide wafer is perpendicular to the liquid level of etching liquid, and a first preset angle is formed between the main positioning edge of the silicon carbide wafer and the liquid level of the etching liquid, and the first preset angle ranges from 40 degrees to 50 degrees; the silicon carbide wafer is immersed into the etching liquid according to a preset frequency so as to etch the electrode metal layer; wherein each time the silicon carbide wafer immersed in the etching liquid is taken out, the silicon carbide wafer is subjected to standing for a preset period of time. The etching difference of each tube core in the longitudinal direction and the transverse direction in the etching process of the electrode metal layer can be eliminated, hydrogen bubbles which are generated in the etching process of the electrode metal layer and are attached to the surface of the electrode metal layer can be eliminated, and etching residues are avoided. The electrical property and the yield of the device are improved, and the manufacturing cost is saved.

The invention discloses a method for opening a terminal area of a high-efficiency silicon-based micro-display device. The method comprises the following steps: 1, pasting a PET adhesive tape: pasting the PET adhesive tape on a PAD area after a previous process is completed; 2, packaging operation: carrying out OLED and thin film packaging operation on a piece attached with the PET adhesive tape; 3, PET adhesive tape removal: conducting PET adhesive tape removal on the piece having been subjected to OLED and thin film packaging so as to enable a PAD area to be exposed; and 4, cleaning: cleaning the silicon wafer obtained in the step 3, and completing a terminal area opening process. According to the method, poor patterns caused by coating, exposure and development can be avoided, etching residues and poor over-etching caused by dry etching are avoided, incomplete and poor wet photoresist removal is avoided, and the requirement for the liquid chemical tolerance of a TFE film layer is lowered; and on the other hand, a technological process is shortened, cost is greatly saved, and productivity is improved.

The invention provides a bulk acoustic wave resonator, a manufacturing method thereof, a filter and a radio frequency communication system. A top electrode protruding part formed on the periphery of apiezoelectric resonance layer and suspended above a cavity can prevent transverse waves generated by the piezoelectric resonance layer from being transmitted to the periphery of the cavity and reflect the transverse waves back to an effective working area, so that the sound wave loss is reduced, the quality factor of the resonator is improved, and finally the performance of a device can be improved. Furthermore, the overlapping parts of a bottom electrode overlapping part and the cavity and the overlapping parts of a top electrode overlapping part and the cavity are suspended, and the bottomelectrode overlapping part and the top electrode overlapping part are mutually staggered, so that a parasitic parameter can be greatly reduced, the problems of electric leakage, short circuit and thelike can be avoided, and the reliability of the device can be improved.

The invention relates to a semiconductor structure and a forming method thereof. The forming method comprises the steps of providing a base, wherein the base comprises a substrate and discrete fins arranged on the substrate in a protruding manner; forming a pseudo gate structure stretching across the fins, wherein the pseudo gate structure comprises a first pseudo gate layer and a second pseudo gate layer located on the first pseudo gate layer, the width of the first pseudo gate layer is gradually increased from bottom to top, and the side wall of the second pseudo gate layer is perpendicularto the top surface of the substrate; forming a source-drain doping layer in the fins on the two sides of the pseudo gate structure; forming a dielectric layer on the source-drain doping layer, whereinthe dielectric layer exposes the top of the pseudo gate structure; removing the pseudo gate structure, and forming an opening in the dielectric layer; and forming a metal gate structure filling the opening. The included angle between the side wall of the first pseudo gate layer and the top wall of the fin is less than 90 degrees, so that the process space for subsequently removing the first pseudo gate layer is large, and the first pseudo gate layer is not prone to being left. On the basis, the side wall of the second pseudo gate layer is perpendicular to the top surface of the substrate, sothat the transverse space of the top surface of the fin is saved, the further reduction of the device size is facilitated, and the performance of the semiconductor structure is optimized.

The invention is suitable for the technical field of display, and provides an array substrate, a manufacturing method and a display panel, the array substrate comprises a first substrate, a common electrode wire, a color resistance layer and a flat layer, the color resistance layer comprises a first color resistance block and a second color resistance block which are adjacent, according to the array substrate, the color resistance grooves located on the common electrode lines are formed between the first color resistance blocks and the second color resistance blocks, the first color resistance blocks and the second color resistance blocks are prevented from being overlapped above the common electrode lines, the width of the common electrode lines is small, and it can be guaranteed that the array substrate has the high aperture ratio; in addition, the array substrate further comprises a flat layer, and the color resistance grooves are filled with the filling parts of the flat layer. The color resistance grooves can be reduced or even eliminated, the adjacent first color resistance blocks and second color resistance blocks are flat, when a pixel electrode layer is formed on the color resistance layer in a deposition and etching mode, etching residues of transparent conductive materials in the color resistance grooves can be avoided, the etching yield is improved, and the display quality is guaranteed.