63results about How to "Eliminate capacitance" patented technology

A method of fabricating air-bridge type FBAR devices provides for a piezoelectric material sandwiched between two electrodes with an air/crystal interface on each electrode to trap sound waves within the film structure. Copper is used as a sacrificial material deposited in cavities in the substrate. Following deposition of the electrodes and piezoelectric material, the copper is etched away leaving the bottom electrode suspended over a cavity void.

A high-frequency BGA device (500) with the chip (501) assembled by metal bumps (503) on an insulating substrate (502) with conductive vias (505) and metal traces (504). Chip bumps which serve the high frequency signal terminals are attached directly to the lands (510) on the vias in order to minimize parasitic electrical parameters such as inductance, resistance, and IR drops, thus achieving the required 0.1 nH inductance for each chip terminal. Chip bumps which serve the remaining chip terminals are attached to pads on certain substrate traces. In both cases, the bumps can be attached reliably because the lands on the vias and the pads on the traces are plated with additional metal layers (511, 512), which provide extra thickness as well as a metallurgically suitable surface.

The invention discloses a radio-frequency ultra-wideband low-noise amplifier based on inductance compensation, relating to a radio-frequency integrated circuit technology. The radio-frequency ultra-wideband low-noise amplifier mainly consists of an input amplification-stage circuit, a feedback-stage circuit, a matching-stage circuit, a load-stage circuit, a bias-stage circuit and an output buffering-stage circuit jointly. According to the radio-frequency ultra-wideband low-noise amplifier, both the input matching stage and the load stage are subjected to inductance compensation, and the sensitivity of the low-noise amplifier on the technology is reduced by adopting a current multiplexing technology with independent bias, so that the performance is more stable, the ultra-wideband is also realized, and the working frequency range is 0.1-12GHz; meanwhile, the radio-frequency ultra-wideband low-noise amplifier gets favorable indexes, such as noise, linearity, gain, power consumption and the like and is suitable for an ultra-wideband multi-standard wireless communication receiving system.

There is provided a touch-sensor-embedded display panel with reduced decrease in aperture ratio and reduced increase in frame area, with lowered power consumption and improved operation performance.

A driving pixel (21) is constituted by: a thin film transistor (T1); a pixel electrode (Epix1); a driving common electrode (COM1); and a liquid crystal capacitance (Clc1) which is formed between the pixel electrode (Epix1) and the driving common electrode (COM1). A sensing pixel (22) is constituted by a thin film transistor (T2), a pixel electrode (Epix2), a sensing common electrode (COM2), and a liquid crystal capacitance (Clc2) which is formed between the pixel electrode (Epix2) and the sensing common electrode (COM2). Neither the driving pixel (21) nor the sensing pixel (22) include an auxiliary capacitance. The thin film transistors (T1, T2) have their channel layers formed of IGZO.

In a liquid crystal display device of an active matrix type, at first, an initialization signal voltage having a voltage value equal to or higher than the maximum voltage value of a display signal is applied to display pixels in a signal application period in a field period. The display signal is thereafter applied. As a result, the change amount of the voltage applied to liquid crystal due to the field-through voltage in relation to a gate pulse can be arranged to be substantially constant, and can always be cancelled by a common electrode voltage. Occurrence of flicker and seizure phenomena can be thereby restricted so that the display quality can be improved.

Limited-number-of-use neuromodulator apparatuses that may be comfortably worn on the skin of a user to non-invasively apply transdermal electrical stimulation (TES). The apparatuses described herein may be include a flexible/bendable substrate and an elastomeric cover (e.g., formed of an elastomeric fabric). These apparatuses may be simplified, to run autonomously. These apparatuses may also include improved power management features.

The invention provides a silicon carbide trench gate metal oxide with semiconductor field effect transistor (SiC UMOSFET) structure integrated Schottky diode (SBD) and a method for manufacturing the same, The structure is characterized by, a p +-type bury layer (50) is formed on the n-type current transport layer (40) by implantation, and further an n-type current transport layer (40) is epitaxially formed so that the p +-type buried layer (50) floats, and the p +-type buried layer (50) can effectively reduce the electric field in the gate trench oxide and the electric field at the Schottky contact position in the blocking mode, so that the SBD integrated SiC UMOSFET has high blocking ability, and the high temperature and high field reliability of the device are greatly improved. At that same time, the relative position of the main trench (80), the main trench (80') and the p +-type buried layer (50) and the n-type current transport layer (40) are adjusted so that when the MOSFET is operated in the first quadrant, the conduction characteristic of the MOSFET does not degrade significantly; When the MOSFET is operated in the third quadrant, the conduction of the parasitic pn diode inthe MOSFET is effectively suppressed and the Schottky diode conduction mode is obtained. SiC UMOSFETs with integrated SBD have a lower total chip area than discrete SBD and MOSFET devices.

A layout design method is provided for generating capacitor arrays being described in four steps: first, the wiring mode of unit capacitors is defined allowing the wire being connected to the upper plate to parallel that to the lower one, second, a capacitor array layout is designed with capacitors being distributed in Mh lines, Mh is the maximum of capacitors' lines, the line numbers of Class 1 to Class K capacitors are defined in the unilateral capacitor array, third, the wiring mode is set for capacitor array making sure the lengths of the wires to the upper and lower plates of unit capacitors are equal, at last, parasitic parameters are characterized in ways that verify the layout. A capacitor array is provided as well. By eliminating capacitance mismatching caused by parasitic capacitance, the method works to generate a well-matched capacitor array in an easy and efficient way.

The invention relates to a non-isolated bidirectional multiport direct current (DC) converter, and belongs to the technical field of power electronic converters. The converter is formed by N bidirectional input/output circuit units, wherein the N is a natural number bigger than 1. Each bidirectional input/output circuit unit is formed by an input source, two switching tubes and an inductor, the input sources of all the bidirectional input/output circuit units are in public ground connection, and one ends of the inductors of all the bidirectional input/output circuit units are connected together. The non-isolated bidirectional multiport DC converter has the advantages that all the input sources are in public ground connection, single-stage non-isolated switching is carried out among all the input sources, voltage ascending and descending switching is carried out among all the input sources, power can be transmitted mutually among all the input sources, a circuit topology is simple, power density is high, a switching rate is high, reliability is high, cost is low and the like, and the non-isolated bidirectional multiport DC converter settles key technology for a distributed DC supply system.

A light source module comprises a lamp cover, a lamp and at least a conductive wire. The lamp is fitted into the lamp cover. The conductive wire connects the lamp cover and the lamp to a ground. The conductive wire is wound around the lamp and the conductive wire has two ends connected to the lamp cover. The lamp cover includes at least a heat conductive plate connected with the conductive wire. The lamp cover, and the lamp are electrically connected to the ground through the conductive wire, so the capacitance there-between can be eliminated to improve the illumination performance of the light source module.

A current feed circuit for feeding a high-frequency current to a plurality of sensor coils in a coordinate input device includes a high-frequency signal transmitting circuit for generating a high-frequency current corresponding to a high-frequency signal input; a plurality of driver transistors, each being provided between the high-frequency signal transmitting circuit and each of a plurality of sensor coils for transmitting the high-frequency current to the corresponding sensor coil; and a plurality of switches, each being provided with respect to each of the plurality of driver transistors for turning on/off the corresponding driver transistor.

A page buffer of a non-volatile memory device and a method for programming and reading the same is provided. The page buffer includes a first latch unit and one or more second latch units for storing data, transfer units connected between the first latch unit and the second latch units for transferring the data stored in the first latch unit to the second latch units, a path select unit that that senses data from bit lines and stores the sensed data in the first latch unit, and, in a program operation, transfers the data from the first and second latch units to the bit lines, a sensing unit for allowing the path select unit to sense data or the data received from the bit lines to be stored in the first latch unit, and a data I/O unit.

A method for measuring a capacitance of a device under test is provided that includes selectively charging and discharging a first conductor with a first set of p and n element-pairs in response to a voltage potential applied to the first set of p and n element-pairs. The method further includes selectively charging and discharging a second conductor with a second set of p and n element-pairs in response to a voltage potential applied to the second set of p and n element-pairs. Currents are measured at drains associated with the first set of p element-pairs as the first and second conductors charge and discharge such that a capacitance associated with the first conductor may be determined that is based on the drain currents.