4results about How to "Improve bandwidth performance" patented technology

This invention discloses a dual-substrate circularly polarized reconfigurable omnidirectional antenna based on PIN diode control. The antenna comprises a first substrate and a second substrate. The second substrate has a ground plane printed on it, and the first substrate has a radiating patch printed on it. The radiating patch includes a central square patch, a Γ-shaped stub, a loop antenna, PIN diodes, and via shorting posts. Seamless switching between left-hand and right-hand circular polarization is achieved through the on / off combinations of 16 PIN diodes, with a simple switching logic. High polarization purity is achieved in both polarization modes, and the via shorting posts effectively reduce mutual interference between modes, resulting in strong switching reliability. In both circular polarization modes, the relative impedance bandwidth and axial ratio bandwidth are wide. In the left-hand circular polarization mode, the relative impedance bandwidth reaches 19.38%, covering 2.33-2.83GHz with |S11|<-10dB, and the axial ratio bandwidth reaches 26.3%, covering 2.08-2.71GHz with AR<3dB. In the right-hand circular polarization mode, the relative impedance bandwidth reaches 19.8%, covering 2.32-2.83GHz with |S11|<-10dB, and the axial ratio bandwidth reaches 23.43%, covering 2.11-2.67GHz with AR<3dB, which is significantly better than existing narrowband designs of the same type.

This invention relates to the field of data transmission technology, specifically to a performance optimization system and method for single-QP scenarios based on RDMA. The system includes an electrically connected HCA network interface card (NIC) and a host. The HCA NIC internally includes an electrically connected DB_PROC module, a WQE_PROC module, and a PKT_ENG module. The WQE_PROC module contains a WQE_CACHE cache space. The DB_PROC module obtains the scheduling request for the target QP. The WQE_PROC module queries the WQE_CACHE cache space to check if the target work queue element WQE corresponding to the target QP exists. If it exists, it reads it from the WQE_CACHE cache space; otherwise, it reads it from the host. This invention reduces the latency of reading WQE from the host, thereby improving bandwidth performance in single-QP scenarios and enhancing data processing efficiency.

This application provides an analog front-end chip, an analog front-end circuit, and a signal processing device, including: a first operational amplifier module for amplitude adjustment of an electrical signal connected to a first input impedance network; and a second operational amplifier module for amplitude adjustment of an electrical signal connected to a second input impedance network. The second input impedance network has a different impedance than the first input impedance network. The first and second operational amplifier modules are integrated within the same chip. This solves the problem of parasitic capacitance and resistance sensitivity caused by external chip interconnections; avoids the influence of process deviations on the bandwidth of the signal transmission path; and easily achieves high bandwidth performance for the analog front-end circuit. Simultaneously, since all critical signal paths are within a single chip, the temperature characteristics are consistent, resulting in minimal system temperature drift.

This application provides an LDPC code error correction method, apparatus, electronic device, and storage medium. The method includes: after completing one round of iterative decoding of the current codeword of the LDPC code, determining whether the current codeword is in an oscillatory correctable state according to a preset oscillation correctability determination condition; when the current codeword is determined to be in an oscillatory correctable state, adjusting the preset parameters in the iterative decoding process by weighting and offsetting; after the adjustment is completed, continuing to perform the next round of iterative decoding on the current codeword until the current codeword is successfully decoded; obtaining the next codeword and repeating the above steps until all codewords in the oscillatory correctable state are successfully decoded. This application avoids the time overhead and resource consumption caused by restarting the post-processing flow after decoding failure, effectively reducing the error level, and has the advantages of short processing time, high bandwidth performance, and low hardware resource consumption.