15results about How to "Integrated reduction" patented technology

The invention discloses an adsorption fixing device for a monocrystalline silicon electrode. The adsorption fixing device comprises an adsorption disc and an air suction assembly, an adsorption hole is formed in the adsorption disc, the adsorption disc is provided with a bearing surface for bearing a monocrystalline silicon electrode, an annular adsorption groove is formed in the bearing surface, and the adsorption groove is connected with the adsorption hole; the air suction assembly is communicated with the adsorption hole and is used for sucking air in the adsorption groove for the adsorption hole. The monocrystalline silicon electrode is fixed in an adsorption fixing mode, the monocrystalline silicon electrode does not need to be clamped by a clamp, and the surface of the monocrystalline silicon electrode can be prevented from being scratched when the monocrystalline silicon electrode is clamped by the clamp.

The invention discloses a high-precision analog optical calculation method and system based on bit slicing, and the method comprises the steps: decomposing a high-precision signal into low-precision signal segments, decomposing a high-precision weight into a plurality of low-precision weight segments, and carrying out the multiplication of the low-precision signal and the weight in an optical domain, and finally, combining the low-precision calculation results to recover high-precision output. According to the method, high-precision data are split into a plurality of low-precision bit slices for processing, and a plurality of input bit slices and weight bit slices are processed at the same time by utilizing the high-speed parallel characteristic of photon calculation, so that the calculation efficiency of a large-scale calculation task is improved, and the optical calculation hardware requirement is reduced. Besides, by adjusting the values of M and N, the method can flexibly adapt to calculation tasks of different scales and accuracies, has strong adaptability and flexibility, realizes balance between calculation accuracy and hardware complexity, fully utilizes parallel processing advantages of photons, and provides a solution for large-scale data processing and efficient optical domain calculation.

The application relates to the technical field of agricultural parameter processing, and particularly discloses a facility agricultural microclimate collaborative parameter optimization method and system based on PlantDGP, which comprises the following steps: an environment sensing platform maps environment data according to a preset spatial unit set to form a spatial grid state; an environment operation port loads a PlantDGP collaborative control instruction set and completes syntax verification and semantic verification, and after the verification is passed, a collaborative rule description section is compiled into a collaborative control task graph; then, a window instance is generated according to a response window description section, and a spatial grid state is compared with an environment target description section to form a collaborative control trigger event within the valid period of the window instance; after receiving the trigger event, the environment operation port generates a candidate collaborative action package set according to the collaborative control task graph and performs a degradation trigger judgment; finally, a multi-target evaluation is performed on the action package that passes the judgment to select an execution plan instance package, which is then sent to a device controller for execution to complete collaborative parameter optimization.

The embodiment of the invention relates to a preparation method of a constant current driving light-emitting device and the constant current driving light-emitting device, and the preparation method comprises the steps: providing a semiconductor growth substrate which comprises a first surface and a second surface which are opposite to each other; a semiconductor epitaxial layer is epitaxially grown on the second surface side, the semiconductor epitaxial layer comprises a third surface connected with the semiconductor growth substrate, and the semiconductor epitaxial layer comprises a first semiconductor epitaxial layer, a light-emitting layer and a second semiconductor epitaxial layer which are sequentially stacked in the direction away from the semiconductor growth substrate, the first semiconductor epitaxial layer, the light-emitting layer and the second semiconductor epitaxial layer are used for forming a light-emitting unit; removing a part of the semiconductor growth substrate from the first surface side to expose a part of the third surface, the third surface being a light emitting surface of the light emitting unit; and carrying out ion doping in the residual semiconductor growth substrate to form a plurality of ion doped regions so as to form a constant current unit. Therefore, the stability of the light-emitting device is improved.

The invention discloses a reconfigurable, miniaturized, low-cost and high-integration SiP chip module. The reconfigurable, miniaturized, low-cost and high-integration SiP chip module comprises an FPGA unit, a PROM configuration storage unit, a reconfigurable FPGA function unit, an RS-485 communication unit, an M-LVDS hardware interface receiving unit, an M-LVDS hardware interface sending unit, a level conversion unit, an SRAM unit and a reset unit. The SiP chip module disclosed by the invention adopts a SiP packaging technology to realize multifunctional integrated integration with miniaturization, low cost and high integration, and reconfiguration of FPGA software functions is completed by adding a reconfigurable unit circuit; the device supports online real-time upgrading of the configuration memory, and has the advantages of few lead-out contacts and high reliability; and the use number of chips with general partial functions of the original productization function module is optimized.

The invention discloses an addressing ultrasonic sensor array variable aperture excitation impedance matching method and circuit, and belongs to the technical field of ultrasonic detection. The invention provides a voltage gain compensation method based on an excitation sound field energy attenuation principle according to array element impedance change during addressing array variable aperture excitation and excitation sound field energy distribution difference. According to the method, the waveform parameters of the excitation signals can be automatically adjusted, the energy distribution of the excitation sound field is optimized, and the consistency of the ultrasonic excitation signals is improved, so that the optimal excitation of the array elements of the addressing ultrasonic sensor array under different excitation apertures is realized. According to the invention, distribution characteristics of excitation circuit impedance under different apertures are given, and a variable aperture array element impedance matching circuit is designed. The circuit system comprises an adjustable high-voltage circuit, a driving circuit, a sharp pulse excitation circuit and an array element impedance matching circuit. According to the invention, the addressing ultrasonic sensor array can achieve the optimal impedance matching effect in different aperture array element excitation modes.

The invention relates to the technical field of aviation launching, in particular to a rocket launching site large-scale building and network access verification method and device and a storage medium. The method comprises the following steps: demand analysis and site selection; a launching site is divided into a plurality of functional modules to be established, and a standardized interface of each functional module is designed, so that compatibility and interchangeability among the modules are ensured, and rapid assembly and disassembly are facilitated; establishing a real-time monitoring system; developing an equipment debugging and maintenance system; an intelligent task scheduling system is developed through a multi-task scheduling algorithm, so that parallel operation of multiple launching platforms is realized, and distribution and management of launching tasks are optimized; and assigning a network security policy, establishing an automatic network access verification system, identifying the launching site equipment through the automatic network access verification system, and performing network access verification. The launching efficiency and safety of the launching site can be improved.

The invention provides a BIM model exchange format visualization processing method and system based on a rendering engine, and the method comprises the steps: analyzing BIM model exchange format source data, generating an intermediate data structure of a rendering engine compatible format, the intermediate data structure comprising an entity component node, and the entity component node comprising at least one geometric expression data; according to the intermediate data structure, scene nodes of the rendering engine framework are created, a hierarchical structure of the scene nodes is organized to construct a scene graph, the scene nodes comprise to-be-modeled nodes, and the to-be-modeled nodes comprise at least one piece of geometric expression data; in response to updating traversal calling of the to-be-modeled node by the rendering engine, asynchronously triggering geometric modeling processing of all geometric expression data associated with the to-be-modeled node, generating triangular mesh data, and integrating the triangular mesh data to the to-be-modeled node; and rendering and visual output are driven, so that the BIM model exchange format visual processing method which is high in performance, light in weight and easy to integrate is provided.

The application discloses a kind of modularizable integrated millimeter wave plane active phased array architecture, which is highly scalable by cascading N×M standard sub-modules in master version, and the system-level feasibility verification is completed in 2×2 sub-module array configuration;Each subarray module is arranged adjacently, and the relative sequential rotation topology of 0°, 90°, 180° or 270° is introduced;The array of the verification system subarray module adopts non-uniform spacing distribution design, and the system radio frequency link is constructed by cascading multi-channel beamforming chip and wilkinson power divider;The signal is amplified and synthesized to the total interface, and the system realizes agile scanning of beam by FPGA driving, and is packaged in active heat dissipation metal shell.The application has the characteristics of low profile and easy integration, and by irregular distribution of array elements and module rotation combination, high gain is maintained in wide-angle scanning domain, and the terminal's ability to capture and stable tracking of high-speed moving satellite is significantly enhanced.

The invention discloses a hollow pure roller pin robot joint speed reducer, which relates to the field of robot joint machinery and comprises a first-stage speed reducing structure, a second-stage speed increasing structure and a third-stage speed reducing structure, an involute gear transmission structure is adopted in the first-stage speed reduction structure, the first-stage speed reduction structure comprises a hollow center gear shaft and an input gear shaft, and the input gear shaft is meshed with a large gear on the hollow center gear shaft to achieve first-time speed reduction; the second-stage speed increasing structure comprises N planetary gears, and speed increasing transmission is achieved through meshing of a pinion on a hollow center gear shaft and the N planetary gears, so that the power transmission efficiency is improved; and the third-stage speed reduction structure adopts a pure roller pin meshing structure. The hollow type pure roller pin robot joint speed reducer is suitable for different installation spaces and power input directions, matching and maintenance convenience of downstream users under multiple working conditions are facilitated, and the system integration and later operation and maintenance cost is reduced.

The application provides a kind of MOCVD process multi-parameter synchronous detection method, system, equipment and storage medium, it is related to semiconductor detection technical field, the application is by being divided into object light and reference light to single mode laser, and using reference light is diffraction to form spherical reference wave, so that object light and spherical reference wave are coincided in the space near semiconductor surface to form stable interference fringe;Again, the phase distribution graph and contrast distribution graph are extracted synchronously for each frame of interference image, and multi-parameter synchronous decoupling and inversion are carried out under unified data source and space reference system, so that in situ, real-time, full-field synchronous acquisition and correlation analysis of semiconductor morphology, temperature and optical reflection characteristics can be realized under the condition of MOCVD high temperature and strong radiation and semiconductor rotation, avoid the time and space asynchronization and information fragmentation problem caused by multiple independent monitoring systems, reduce the complexity of system integration and calibration, while providing unified, accurate and comprehensive data basis for process optimization.

The invention relates to a mixing machine (1) for a spinning preparation process and a method for operating the mixing machine, the mixing machine being designed for receiving and mixing fibers or loose fibers from a spinning preparation machine or a storage machine, the mixing machine comprising a container (2) with at least three mixing chambers (3), which are separated from each other laterally by partition walls (5), wherein all mixing chambers (3) are filled with fibers or loose fibers in sequence by an air flow via a single supply line (20), at the end of which at least one supply device having at least one opening is arranged which is rotatable or movable above the mixing chamber (3), wherein the fibers or loose fibers are guided from the lower region of the mixing chamber (3) to a discharge device (17) and from there to the next machine, storage machine or mixing machine.

This application relates to a domain-specific language compiler for cache coherence protocols, belonging to the field of computer architecture modeling and simulation technology. The compiler takes a high-level abstract specification of the cache coherence protocol as input and automatically converts it into cache controller and / or directory controller code executable by a periodic precision simulator. Through systematic mapping and translation of the protocol's finite state machine, event-triggered mechanism, concurrent transaction management, and asynchronous hardware interaction, it achieves event-driven, non-blocking control logic generation. Simultaneously, the compiler supports network communication code generation, debug tracing injection, and formal logical equivalence checks. Furthermore, it incorporates a performance constraint-aware optimization module to automatically optimize the generated state machine, thereby improving simulation efficiency, reducing development complexity, and enhancing verifiability while ensuring the semantic correctness of the protocol.

This utility model relates to the technical field of natural gas vehicle-mounted gas supply systems, specifically disclosing an integrated pressure reducing and regulating device and a natural gas vehicle-mounted gas supply system. The integrated pressure reducing and regulating device includes a regulating device body, a solenoid valve assembly, and a filter assembly. The regulating device body has an inlet and an outlet connected sequentially. By using this integrated pressure reducing and regulating device, the solenoid valve assembly and the filter assembly are integrated into the regulating device body, effectively reducing the number of joints in the pipeline connections within the natural gas vehicle-mounted gas supply system, thereby reducing the risk of leakage. This effectively solves the problem in the prior art where the solenoid valve, filter, and regulating device are independent components, which easily leads to leakage during installation and affects the safety of the natural gas vehicle-mounted gas supply system. Simultaneously, it not only improves the overall stability and reliability of the natural gas vehicle-mounted gas supply system but also provides a feasible basis for the modular integration of natural gas vehicle-mounted gas supply systems.