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45results about How to "Reduce Reliability Risk" patented technology

Distributed multi-point synchronization system and synchronization method thereof

InactiveCN104052768ASave bandwidth and storage costsReduce reliability and security risksTransmissionTime informationDistributed computing
The invention discloses a distributed multi-point synchronization system and a synchronization method thereof. The system is formed by more than two distributed synchronous terminals including synchronized object databases, synchronous message databases, synchronous processing modules, synchronous request modules and synchronized service modules. According to the system and the method, real-time information content synchronization among a plurality of user terminals in a network can be realized without the need to use a center server. The user terminals carry out direct communication and synchronous content exchanging by a synchronous protocol and there is no need for the synchronous server to carry out content transferring and distribution, thereby substantially improving reliability and security of the system.
Owner:彭涛

Optical module

The invention discloses an optical module. The optical module comprises an upper shell, a lower shell, a circuit board, a lens assembly and a clamping jaw assembly, and the lens assembly is arranged at the end, close to an optical port of the optical module, of the circuit board; the clamping jaw assembly is arranged at the optical port of the optical module, one end of the clamping jaw assembly is directly connected with the lens assembly, and the other end of the clamping jaw assembly is connected with an external optical fiber; the clamping jaw assembly comprises a clamping jaw and a shielding plate connected with the clamping jaw, a first limiting piece is arranged on the lower shell, a second limiting piece is arranged on the clamping jaw, and the first limiting piece is embedded in the second limiting piece; and a first positioning piece is arranged in the first limiting piece, a second positioning piece is arranged on the side face, provided with the second limiting piece, of the clamping jaw, and the second positioning piece is inserted into the first positioning piece. According to the optical module, the lens assembly is arranged at the end, close to the optical port of the optical module, of the circuit board, direct connection between the external optical fiber and the lens assembly is achieved through the clamping jaw assembly fixed to the shells, an optical fiberribbon is not needed, space is saved to a certain degree, and further development of the optical module is facilitated.
Owner:HISENSE BROADBAND MULTIMEDIA TECH

Optical module

The invention discloses an optical module. The optical module comprises a circuit board, a light emitting chip, a light receiving chip, a lens assembly and a clamping jaw assembly, the lens assembly is arranged at the end, close to an optical port of the optical module, of the circuit board and covers the light emitting chip and the light receiving chip, one end of the clamping jaw assembly is connected with the lens assembly, and the other end of the clamping jaw assembly is connected with an external optical fiber; the clamping jaw assembly comprises a clamping jaw and a shielding plate, a first positioning piece is arranged on the clamping jaw, a second positioning piece and a third positioning piece are correspondingly arranged on the shielding plate and the lens assembly respectively,and the first positioning piece penetrates through the second positioning piece and is inserted into the third positioning piece; and the lens assembly comprises a lens assembly body and a lens assembly connecting part which are connected with each other, a light through groove is formed in the lens assembly connecting part, a light through hole is formed in the shielding plate, and light path connection of the lens assembly and the clamping jaw assembly is achieved through the light through hole and the light through groove. According to the optical module provided by the invention, transmission of internal optical signals does not need an optical fiber ribbon, so that space is saved to a certain extent, and further development of the optical module is facilitated.
Owner:HISENSE BROADBAND MULTIMEDIA TECH

Trimming resistor and preparation method thereof

The invention provides a trimming resistor comprising a semiconductor substrate, a dielectric layer arranged on the semiconductor substrate, a fuse trimming shape arranged on the dielectric layer through deposit of a fuse, and a passivation layer, wherein the fuse trimming shape comprises a fusing area and two ends, a trimming structure capable of changing current density is arranged in the fusing area, and the two ends of the fuse trimming shape are respectively provided with connecting pads. The passivation layer is formed on the fuse trimming shape and the dielectric layer, and provided with a trimming window corresponding to the trimming structure and pressing point windows respectively corresponding to the connecting pads. The invention further provides a preparation method of the trimming resistor. Due to the fact that the fuse trimming shape is provided with the trimming structure capable of changing the current density in the fusing area, the effective cross section area of the fuse on the trimming structure is small, the current density is large, the fusing position is fixed, the fusing area is small, and meanwhile an opening of the trimming window on the fuse is small so as to reduce reliability risks caused by metal residue, chemical residue and the like due to the fact that the trimming window on the trimming resistor is too large.
Owner:HANGZHOU SILAN INTEGRATED CIRCUIT

LDMOS (Laterally Diffused Metal Oxide Semiconductor) with selective shallow slot through hole and production method thereof

The invention discloses a production method of an LDMOS (Laterally Diffused Metal Oxide Semiconductor) with a selective shallow slot through hole. The production method of an LDMOS with a selective shallow slot through hole comprises forming a basic structure, forming bottom layer interlamination film; forming a blocking layer; etching the blocking layer which is arranged in an area of the shallow slot through hole; forming top layer interlamination film; performing multi-step high selective etching to form a normal through hole in an area of the blocking layer and the shallow slot through hole of a connector area in an area without the blocking layer; and injecting doping source which has the same type with the connector area at the bottom of the shallow slot through hole after a basic structure is formed. The invention also discloses an LDMOS structure which is produced through the production method. The production method of the LDMOS with the selective shallow slot through hole has the advantages of effectively reducing design size of a source end and an area of a chip and improving reliability of a component due to the fact that different types of doping areas which are vertically distributed in a specified area of the LDMOS are connected with each other with the help of a selective shallow slot through hole technology.
Owner:SHANGHAI HUAHONG GRACE SEMICON MFG CORP

Through hole filling manufacturing process of multilayer board

PendingCN114269071AGuaranteed flatnessSurface copper uniformity is improvedPrinted element electric connection formationGrindingCopper foil
The invention relates to a through hole filling manufacturing process of a multi-layer board. The through hole filling manufacturing process comprises the following steps of cutting and baking; in the inner layer circuit, the two inner copper foil layers are subjected to dry film pressing, exposure, development, etching and film stripping treatment, and manufacturing of the inner layer circuit is completed; two-sided pressing: respectively pressing an outer insulating layer and an outer copper foil layer on the two inner copper foil layers to form a four-layer plate; mechanical drilling is conducted, specifically, through holes used for interlayer communication are drilled in the four-layer plate through a drilling machine; pTH: depositing a layer of thin chemical copper on the inner wall of the through hole to realize in-hole conduction; a first outer layer line; filling holes and electroplating; performing grinding; plating copper for the second time; and performing second-time outer-layer circuit manufacturing to complete the manufacturing of the outer-layer circuit. According to the manufacturing process, the reliability of through hole copper plating is improved while the surface copper uniformity of a product is ensured, the pad blocking design of a blind hole is avoided, more design space is provided for customers, and the manufacturing cost is reduced.
Owner:JIANGSU PROVISION ELECTRONICS CO LTD

Process for reducing soldering hole rate of soldered printed board by adopting polytetrafluoroethylene block

The invention discloses a process for reducing the soldering hole rate of a soldered printed board by adopting a polytetrafluoroethylene block. The process comprises the following steps of S1, manufacturing a soldering tin sheet corresponding to the printed board, placing the tin sheet in a shell firstly, then turning the printed board with a soldering flux coated to enable the front surface of the printed board to be upward, and feeding the printed board into the shell; S2, pressing the polytetrafluoroethylene block corresponding to the printed board on the printed board, covering the shell with a cover plate and fixing the cover plate with a screw; and S3, carrying out heating and welding treatment, wherein the polytetrafluoroethylene block is subjected to thermal expansion in the heating process to apply the pressing force to the printed board. The process has the beneficial effects that the pressing force is applied to the printed board by the polytetrafluoroethylene block which issubjected to thermal expansion in the heating process, and the heated and melted soldering tin is uniformly distributed under the action of the pressing force, so that the soldering hole rate of theprinted board is reduced, the performance and the reliability of the printed board are improved, the time for rework of product assembling is greatly saved, the soldering frequency is reduced, and theproduct reliability risk is reduced.
Owner:CHENGDU TIGER MICROWAVE TECH

Loudspeaker unit and electronic terminal

The invention discloses a loudspeaker unit and an electronic terminal. The loudspeaker unit comprises a shell assembly, a magnetic circuit system, a vibration system and a balance assembly, the balance assembly is arranged corresponding to a gap, the balance assembly comprises a centering support chip made of FPCB material, the centering support chip comprises an outer fixing part, an elastic support part and a bonding pad structure, and the outer fixing part is connected with the shell assembly; the elastic supporting part is connected with the outer fixing part, located in the gap and partially connected with a support, and the elastic supporting part elastically deforms along with vibration of the support. The bonding pad structure comprises a cantilever and a bonding pad which are arranged at an included angle, one end of the cantilever away from the bonding pad is connected with the elastic supporting part, the cantilever extends along the support, the bonding pad is fixedly connected with the diaphragm or the top wall of the support, and a lead of the voice coil is electrically connected with the bonding pad. According to the loudspeaker unit provided by the invention, the structure of a voice coil in the magnetic gap is arranged more freely, and the volume of a magnetic circuit system is effectively increased, so that the magnetic field intensity is higher, and the acoustic performance is better.
Owner:GOERTEK INC

Crystal oscillator frequency debugging system

The invention discloses a crystal oscillator frequency debugging system. The system includes: a test module which includes an adjustable capacitance module, an adjustable resistance module and an adjustable power supply; a connection clamping unit which has an input end and an output end, wherein the input end is in separate connection to the output ends of the adjustable capacitance module, the adjustable resistance module and the adjustable power supply, and the output end is intended for connecting a debugging bit of a to-be-debugged crystal oscillator; a frequency meter which is intended for connecting the to-be-debugged crystal oscillator and reading frequencies; a computing control module which is connected to a control end of the test module and the frequency meter and is intended for separately outputting capacitance control parameters, resistance control parameters and power control parameters to the adjustable capacitance module, the adjustable resistance module and the adjustable power supply so as to form required capacitance, resistance and power value which are to be loaded to the debugging bit of the to-be-debugged crystal oscillator, reading the frequency of the to-be-debugged crystal oscillator and adjusting the capacitance control parameters. According to the invention, the crystal oscillator frequency debugging system optimizes production procedures and increases production efficiency.
Owner:GUANGDONG DAPU TELECOM TECH CO LTD

A crystal oscillator frequency debugging system

The invention discloses a crystal oscillator frequency debugging system. The system includes: a test module which includes an adjustable capacitance module, an adjustable resistance module and an adjustable power supply; a connection clamping unit which has an input end and an output end, wherein the input end is in separate connection to the output ends of the adjustable capacitance module, the adjustable resistance module and the adjustable power supply, and the output end is intended for connecting a debugging bit of a to-be-debugged crystal oscillator; a frequency meter which is intended for connecting the to-be-debugged crystal oscillator and reading frequencies; a computing control module which is connected to a control end of the test module and the frequency meter and is intended for separately outputting capacitance control parameters, resistance control parameters and power control parameters to the adjustable capacitance module, the adjustable resistance module and the adjustable power supply so as to form required capacitance, resistance and power value which are to be loaded to the debugging bit of the to-be-debugged crystal oscillator, reading the frequency of the to-be-debugged crystal oscillator and adjusting the capacitance control parameters. According to the invention, the crystal oscillator frequency debugging system optimizes production procedures and increases production efficiency.
Owner:GUANGDONG DAPU TELECOM TECH CO LTD

Integrated circuit chip packaging structure and manufacturing method thereof

The invention discloses an integrated circuit chip packaging structure. An integrated circuit on a chip comprises a temperature sensitive circuit, the failure probability of the temperature sensitivecircuit is increased when working temperature is reduced, the packaging structure comprises a heat conduction layer and a heat insulating layer, the heat conduction layer completely wraps the front and the side surface of the temperature sensitive circuit, the heat insulating layer is formed on the surface of the heat conduction layer and wraps the heat conduction layer, the heat conduction layerforms a structure, the temperatures of various positions of areas wrapped by the heat conduction layer are uniformed by the structure, the heat insulating layer forms a structure, the structure for preventing areas wrapped by the heat insulating layer from cooling, so that the temperatures of the areas wrapped by the heat insulating layer are kept by the structure, and lower temperature end of a working temperature range of the chip can be widened. The invention further discloses a manufacturing method of the integrated circuit chip packaging structure. According to the structure, heat loss ofthe chip can be reduced, and customer loss caused by abnormity of an integrated circuit at excessively low temperature is avoided.
Owner:SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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