169 results about "Areal capacitance" patented technology

The invention discloses an aluminum electrolytic capacitor appearance defect detection device, relates to the field of aluminum electrolytic capacitor detection, and solves the problem that an existing detection device is difficult to comprehensively detect an aluminum electrolytic capacitor. The aluminum electrolytic capacitor appearance defect detection device comprises a device base and two first supporting plates, and two first transmission belts are arranged between the two first supporting plates; a push roller is arranged on the outer side of the first transmission belt, supporting frames are installed on the corresponding sides of the two first supporting plates, a first detection box is fixedly installed at the top of the device base, and a plurality of first laser probes are arranged on the inner side of the first detection box; the transfer mechanism is used for detecting pins of the capacitor, and the transfer mechanism is mounted at the top of the device base; through the transfer mechanism, the first laser probe detects the capacitor entering the first detection box, under the conveying of the first transmission belt, the capacitor is turned over, and the pins of the capacitor can face upwards, so that the pins of the capacitor can be detected conveniently, and the effect of comprehensive detection is achieved.

The invention relates to an ultra-wideband frequency reconfigurable tight coupling dipole array with wide beam scanning. The ultra-wideband frequency reconfigurable tight coupling dipole array comprises a plurality of antenna units, the antenna unit comprises a tight coupling dipole radiation unit, a reconfigurable layer, a wide-angle impedance matching structure, a feed structure and a metal floor; the wide-angle impedance matching structure, the tight coupling dipole radiation unit and the feed structure are sequentially located on the first dielectric plate from top to bottom, and the first dielectric plate is placed perpendicular to the horizontal plane. The reconfigurable layer, the metal floor and the first dielectric plate are vertically arranged in an intersecting mode, and the reconfigurable layer is located above the metal floor. The reconfigurable layer and the double-layer double-sided capacitor loading ring structure are used for achieving the frequency reconfigurable function of the ultra-wideband array, and meanwhile the high radiation efficiency and the large-angle scanning capacity of the ultra-wideband array are effectively guaranteed. In addition, the invention also designs a feed structure containing a capacitor loading short-circuit pin, so that no common-mode resonance in the working frequency band of the ultra wide band is ensured.

Aspects of the present disclosure provide input-adaptive analog-to-digital conversion in which the number of conversion cycles used to convert an input signal into a digital signal is adapted based on the level (i.e., amplitude) of the input voltage. In certain aspects, the input voltage is compared with one or more threshold voltages, and the number of conversion cycles is determined based on the comparison. In certain aspects, a most significant bit (MSB) capacitor in a capacitive digital-to-analog (DAC) is split into two or more capacitors to provide the one or more threshold voltages.

The invention relates to the field of intelligent sensing, and particularly provides a clothes humidity detection device and method. The device comprises a PCB, a first electrode plate, a second electrode plate and a third electrode plate are arranged on the PCB, and planar capacitors are formed between the first electrode plate and the second electrode plate and between the first electrode plate and the third electrode plate. The method comprises the following steps: S1, signal excitation; s2, receiving a signal; s3, amplifying the signal; s4, carrying out signal differential processing; s5, humidity information is output; the method is realized by using the device. The three electrode plates are arranged on the PCB to form two planar capacitors, the electric field distribution is wide, the surface and internal humidity change can be sensed, and the clothes drying degree can be accurately reflected. By means of differential amplification processing of detection signals of the second electrode plate and the third electrode plate, initial capacitance and noise interference are eliminated, and high-accuracy humidity detection is achieved under the complex humidity distribution condition.

Stacked metal-oxide-metal (MoM) capacitor(s) in front side and back side metallization layers of a semiconductor die, and related fabrication methods. The stacked MoM capacitor includes a first, front side, MoM capacitor formed on the front side of the semiconductor layer of a die and in front side metallization layers in a front side interconnect structure. The stacked MoM capacitor also includes a second, back side MoM capacitor formed on the back side of the semiconductor layer in back side metallization layers in a back side interconnect structure. The front side and back side MoM capacitors are coupled to each other through a conducting structure in a second, vertical direction between the front side and back side interconnect structures to form the stacked MoM capacitor. In this manner, capacitance density in the die can be maintained or increase while providing sufficient area in the front side metallization layers for signal routing.

A semiconductor structure includes a capacitor structure and a contact structure. The capacitor structure includes an electrode layer, a protective dielectric layer, and a capacitor dielectric layer. The protective dielectric layer covers a top surface of the electrode layer. The capacitor dielectric layer is on the protective oxide layer. The contact structure penetrates the protective oxide layer and electrically connects to the electrode layer.

A method of fabricating a system includes fabricating a plurality of transistors and coupling a forming a bridge structure connected between a gate contact of a first transistor with a drain contact of a second transistor. The method further includes fabricating a multi-level memory structure including capacitors that comprise a ferroelectric material or a paraelectric material. The capacitors within a given level are coupled together by a plate electrode. The method further includes forming a signal electrode coupled with the plate electrode.

The present invention provides a method for testing the electrochemical active area of ​​an electrode, comprising the following steps: S1: preparing a battery with a three-electrode structure; S2: performing cycle activation on the battery; S3: performing an EIS test on the battery to obtain an EIS test curve; S4: performing equivalent circuit fitting using simulation software based on the curve obtained by the EIS test and calculating the double-layer capacitance C according to a formula dl #imgabs0#Where f is the frequency, Z” is the imaginary component of EIS, and n is the degree of non-ideal behavior. S5: Calculate the electrochemically active area ESCS of the electrode using the formula: #imgabs1#Where ECSA is the electrochemical surface area (cm) contained in each geometric area 2 cm ‑2 ), C*=60μF cm ‑2 (surface capacitance of a smooth surface), A is the geometric area of ​​the electrode (cm 2 The method for testing the electrochemically active area of ​​an electrode provided by the present invention overcomes the defect that the existing method for testing the electrochemically active area of ​​an electrode is easily interfered by external factors, and improves the accuracy, reliability and reproducibility of the method for testing the electrochemically active area of ​​an electrode.

Provided is a filter, comprising: a base substrate, comprising a first surface; a capacitor, comprising a first electrode arranged on the first surface and a second electrode arranged on the side of the first electrode away from the base substrate, a first insulating layer being arranged between the first electrode and the second electrode; a second insulating layer, which is arranged on the side of the second electrode away from the base substrate, a first via being formed in the second insulating layer; an inductor, comprising a first conductive end and a second conductive end, the first conductive end and the second conductive end being electrically connected to form a coil structure of the inductor; a third insulating layer, which is arranged on the side of the second insulating layer away from the base substrate, a second via hole being formed in the third insulating layer; and an electrode conductive part, which is arranged on the side of the third insulating layer away from the base substrate and is electrically connected to the second electrode by means of the first via and the second via. The radial cross-sectional area of the first via is smaller than the radial cross-sectional area of the second via, and the orthographic projection of the first via on the base substrate overlaps the orthographic projection of the second via on the base substrate.

A heating circuit for an energy storage device having a core with an electrolyte, inputs, a capacitance across the electrolyte and the core, and internal surface capacitance between inputs which can store electric field energy between internal electrodes of the energy storage device that are coupled to the inputs, including: a power source coupled to one of the inputs, wherein the power source provides positive and negative input currents to the input, the positive input current flows in to one of the inputs and the negative input current flows out another of the inputs; and a controller for controlling the power source to provide alternating between the positive and negative input currents to the input at a frequency sufficient to effectively short the internal surface capacitance of the energy storage device to generate heat and raise a temperature of the electrolyte.

The invention belongs to the technical field of non-metallic material nondestructive testing, and particularly relates to a method for evaluating the defect detection capability of a coplanar capacitive sensor. According to the defect detection capability evaluation method, defects under different buried depths and sizes are scanned, the distortion rate of a detection signal is calculated, and a preset threshold value is given to judge whether the defects are detected or not; and then a visual chart is drawn, and evaluation of the defect detection limit capability of the coplanar capacitive sensor is realized. The invention discloses a coplanar capacitive sensor defect detection capability evaluation method. The method comprises the following steps: determining a positive sensitivity region, a negative sensitivity region and a zero sensitivity region of a coplanar capacitive sensor; constructing to obtain a non-metallic material defect test group; establishing an electrostatic field simulation model; solving a distortion rate D of the detection signal; drawing a relation curve of detection signal distortion rates D under different burial depth positions and different defect sizes; giving a preset threshold value A, and recording a comparison result; and drawing a comparison result in a visual chart.

The invention discloses a non-contact two-degree-of-freedom angle measurement method based on a spherical capacitor, and the method comprises the steps: firstly fixing a drive module on a device which needs to measure the angle of a moving part, then connecting a detection capacitor with the moving part, and enabling the detection capacitor and the drive module to form a spherical differential four-quadrant capacitive sensor together; when the detection capacitors rotate in a Cartesian coordinate system along with a moving part in the equipment, the relative areas of the four measurement capacitors are subjected to differential change pairwise, and corresponding differential output capacitors are generated; constructing a relational expression between the differential output capacitance and the coordinate axis angle component when the detection capacitor is in different quadrants, then applying a sine excitation signal to the detection capacitor based on a signal detection circuit, obtaining a current signal output by each driving capacitor, converting the current signal into a voltage signal, and calculating the differential output capacitance; an angle component is then calculated based on the relational expression. The device has the characteristics of simple structure, low cost and high reliability.

A semiconductor structure includes a capacitor structure and a contact structure. The capacitor structure includes an electrode layer, a protective dielectric layer, and a capacitor dielectric layer. The protective dielectric layer covers a top surface of the electrode layer. The capacitor dielectric layer is on the protective oxide layer. The contact structure penetrates the protective oxide layer and electrically connects to the electrode layer.

The utility model is suitable for the technical field of sensors, and provides a capacitive sensor which comprises a capacitive digital conversion chip and an insulating substrate, a groove is formed in the front face of the insulating substrate and divides the front face of the insulating substrate into a measuring head area and a grounding area, a first via hole is formed in the measuring head area, and a second via hole is formed in the grounding area. A second via hole is formed in the grounding area, and copper plating layers are arranged on the measuring head area, the grounding area, the inner wall of the first via hole and the inner wall of the second via hole; the capacitance digital conversion chip is arranged on the back face of the insulating substrate, a detection pin of the capacitance digital conversion chip is electrically connected with the inner wall of the first via hole, and a grounding pin of the capacitance digital conversion chip is electrically connected with the inner wall of the second via hole. The stray capacitance in the capacitive sensor circuit can be reduced, the measurement precision and stability of the capacitive sensor can be improved, and the cost can be reduced at the same time.

The utility model belongs to the technical field of surface charge measurement, and particularly relates to a high-voltage direct-current GIL three-post insulator surface charge measuring device, which is provided with an experimental chamber, a high-voltage guide rod is arranged in the experimental chamber, a central guide rod is sleeved on the high-voltage guide rod, the central guide rod penetrates through a three-post insulator, and an electric slide rail is arranged at the bottom of the experimental chamber. A charge measuring device is slidably mounted above the electric slide rail, the charge measuring device comprises a capacitance probe and a capacitance probe control device, the capacitance probe control device controls the capacitance probe to be perpendicular to the surface of the three-post insulator, and the capacitance probe is connected with a data acquisition device; according to the utility model, the surface charges of the front and back surfaces of the three-post insulator sample piece can be measured, the problem that most experimental devices can only measure the surface charges of the single surface of the three-post insulator in a single experiment at the present stage is solved, errors of measurement results caused by two experiments can be avoided, the experimental time is greatly shortened, and the experimental efficiency is improved. Experimental gas is greatly reduced, and the device is more economical.

The invention provides a semiconductor device, a forming method and a storage system, and relates to the technical field of semiconductors. The semiconductor device comprises a first semiconductor structure and a second semiconductor structure, the first semiconductor structure comprises a stacked structure and a transistor, the stacked structure comprises first conductive layers and second conductive layers which are alternately stacked in the first direction, the transistor is arranged on one side of the stacked structure, and the transistor is connected with one first conductive layer; and the first connecting structure penetrates through the stacking structure along the first direction and is connected with the second conductive layer. According to the technical scheme, the manufacturing process of the planar capacitor formed by alternately stacking the two conductive layers is simple and easy to implement, the common electrode led out through the first connecting structure does not occupy the effective area of the first conductive layer and the effective area of the second conductive layer, and the obtained planar capacitor has large capacitance capacity.

The invention relates to the technical field of laser micro-nano manufacturing, and discloses a filtering supercapacitor based on nanoparticle-shaped graphene / foam metal and a preparation method thereof, and the preparation method comprises the following steps: preparing a cyanate resin / foam metal composite film by employing foam metal with an open pore structure and a liquid cyanate monomer; carrying out laser processing by adopting an intermediate infrared large-size light spot laser beam and an ultraviolet small-size light spot laser beam, and carrying out in-situ laser induction on the surface of the foam metal to grow the nanoparticle-shaped graphene so as to prepare a nanoparticle-shaped graphene / foam metal electrode raw material; cutting the electrode raw material into an electrode, and attaching a second mask; and preparing an interlayer type filtering supercapacitor. The conductivity of the generated nanoparticle-shaped graphene / foam metal thin film is as high as 909.09 S / cm, the prepared supercapacitor still keeps a relatively good capacitance behavior at a scanning rate of 2500V / s, the phase angle is as high as-70 degrees at 120Hz, the surface specific capacitance is 245 [mu] F / cm < 2 >, and meanwhile, the supercapacitor has a cut-off frequency as high as 3kHz and an RC time constant as low as 0.33 ms.

The present invention discloses a flexible planar transmission line and a common-mode suppression balun structure, which are made of a flexible printed circuit board, wherein the flexible printed circuit board includes a flexible insulating dielectric layer, an upper copper-clad layer located on the upper surface of the flexible insulating dielectric layer, and a lower copper-clad layer located on the lower surface of the flexible insulating dielectric layer; the upper and lower copper-clad layers are partially overlapped, and the overlapped upper and lower copper-clad layers form a flexible planar capacitor together with the flexible insulating dielectric layer in between; the conductor of the flexible planar transmission line is composed of the upper and lower copper-clad layers of the flexible printed circuit board; the common-mode suppression balun includes a flexible planar transmission line and a flexible planar capacitor. The flexible planar transmission line and the common-mode suppression balun structure of the present invention are made of a flexible printed circuit board, do not require any solder joints and discrete components, can be made into a completely planar structure, are very thin, have very good flexibility, are low in cost, have good reliability, and are very suitable for use in a magnetic resonance flexible radio frequency coil.

The application discloses an array type capacitive pressure sensing device and a detection method thereof, and belongs to the technical field of pressure sensing. The device forms independent coupling capacitors at each intersection of the intersection array, scans the driving lines and reads the sensing line signals in parallel to construct a full-plane capacitive change distribution map, and realizes multi-point pressure detection. The application provides two electrode layout schemes of vertical overlap and coplanar. Both schemes adopt a signal processing mode of sequentially scanning the driving lines and reading the sensing line signals in parallel, and output pressure values and position coordinates of each effective intersection. As a preferred embodiment, multiple independent pressure action areas can also be identified and separated from the capacitive change distribution map through connected domain analysis to improve detection robustness. The sensing point density is determined by the electrode arrangement pitch, and the typical pitch is 1mm to 10mm. The application has a simple structure and can realize high-density multi-point pressure distribution detection.

A capacitor assembly comprises a plurality of capacitor elements (e.g., four or more capacitor elements) each having a first end surface and a second end surface defining a first polarity terminal and a second polarity terminal, respectively. The plurality of capacitor elements are arranged in at least one stacked pair with a first polarity terminal of a first capacitor element in each stacked pair being opposed to a first polarity terminal of a second capacitor element in such stacked pair. The plurality of capacitor elements in this aspect are contained in a housing. A first polarity bus bar and a second polarity bus bar are electrically connected to the plurality of capacitor elements. The plurality of capacitor elements may be connected in parallel.

A semiconductor structure including an array of transistors, a backside power rail, wherein the backside power rail directly contacts a bottommost surface of a shallow trench isolation region, and a metal-insulator-metal (MIM) capacitor embedded in a backside power delivery network beneath the array of transistors, wherein the MIM capacitor directly contacts a bottommost surface of the backside power rail.

The invention relates to an electrode winding having a winding core, comprising - a wound inner current collector layer, wherein an inner electrode layer is arranged on the inner current collector layer, - a wound outer current collector layer, wherein an outer electrode layer is arranged on the outer current collector layer, - wherein the inner electrode layer and the outer electrode layer are arranged adjacent to one another and a separator layer is arranged between the inner and the outer electrode layer, - wherein the inner current collector layer and the outer current collector layer extend radially outwards from the winding core and the inner electrode layer is arranged closer to the winding core than the outer electrode layer, - wherein the inner current collector layer has an inner load with a mass of inner electrode layer per unit area of inner current collector layer and the outer current collector layer has an outer load with a mass of outer electrode layer per unit area of outer current collector layer, wherein the inner load decreases from the winding core outwards or the outer load increases from the winding core outwards. With this type of electrode winding, the surface capacitances of the inner electrode layer and the outer electrode layer can be adapted to each other.

This invention relates to an imaging method and apparatus for latent defects in asphalt layers based on dynamic coplanar array capacitance, applicable to the field of urban traffic road engineering maintenance technology. The method includes the following steps: determining the penetration depth of a movable array electrode coplanar capacitance sensor; selecting a corresponding movable array electrode coplanar capacitance sensor based on the determined optimal structural parameters; performing dynamic detection at a set penetration depth based on dynamic detection and electrode excitation scheme to determine the depth of latent defects in the asphalt layer; constructing a dynamic sensitive field distribution matrix of the measured area using the finite element method; constructing a normalized coplanar capacitance distribution matrix for different scanning steps at the depth of the latent defects; and reconstructing the relative permittivity distribution map of the latent defects in the asphalt layer under dynamic detection using a capacitance tomography reconstruction algorithm to identify the planar location and shape characteristics of the latent defects. Compared with the prior art, this invention has the advantages of rapid detection and accurate identification.

A cathode electrode for a secondary battery, a vehicle battery, and a method for manufacturing a cathode electrode. The cathode electrode comprises a cathode current collector and a cathode arranged on a surface of the cathode current collector. The cathode comprises an active material containing at least one lithium iron phosphate and one lithium manganese iron phosphate, a binder comprising polytetrafluoroethylene, styrene-butadiene rubber, and at least one polyacrylic acid and polyacrylic acid-polyacrylonitrile copolymer, and a conductive filler, wherein the cathode electrode has an areal capacitance in the range of 3 milliampere-hours per square centimeter to 10 milliampere-hours per square centimeter. The vehicle battery contains the cathode arranged on a cathode current collector.

The embodiment of the present application provides an integrated passive device, comprising: a substrate; a grounded back metal layer formed on the bottom surface of the substrate; a capacitor lower plate located on the top surface of the substrate; a substrate contact via penetrating the substrate and connecting the capacitor lower plate and the back metal layer, wherein the back metal layer serves as a capacitor lower port; a capacitor dielectric layer formed on the capacitor lower plate; a capacitor upper plate formed on the capacitor dielectric layer; and a capacitor upper port formed at intervals above the capacitor upper plate and connected to the capacitor upper plate. The embodiment of the present application provides an integrated passive device to solve the technical problem that when a traditional two-port passive device is matched with a grounded active device in a circuit, additional inductance is introduced, thereby causing losses.

A preparation method for improving peel strength of a planar capacitor material and the planar capacitor material, the method comprising: providing a dielectric material including epoxy resin, an inorganic filler, an auxiliary agent and a solvent; adding epoxy resin into a solvent to obtain a mixed solution; stirring and dispersing an inorganic filler into another solvent to obtain a suspension, wherein the particle size of the inorganic filler is less than 0.1 mu m; dispersing the suspension liquid in the mixed liquid to obtain a medium slurry mixture; pouring the dielectric slurry mixture into a ball milling tank to obtain dielectric material liquid slurry; a first electrode layer and a second electrode layer are provided, the dielectric material liquid slurry is arranged on the surface of the first electrode layer and / or the second electrode layer, then the first electrode layer and the second electrode layer are subjected to covering and hot pressing, and a planar capacitor material with the solvent volatilized but the dielectric material is not cured is obtained; performing curing treatment on the planar capacitor material, controlling the curing temperature to be increased step by step, and performing heat preservation for preset time at the temperature every time the temperature is increased, and then increasing the temperature again.

The utility model provides a motor controller with double-sided capacitor heat dissipation, which comprises a capacitor encapsulation groove arranged in a shell, and a capacitor core arranged in the capacitor encapsulation groove; the main water channel cover plate is arranged above the capacitor module, the top surface of the main water channel cover plate sinks inwards to form a main water channel, and the power module is arranged above the main water channel cover plate; a water inlet pipeline and a water outlet pipeline which are respectively communicated with the outside of the shell are arranged in the shell; the main water channel comprises a main water inlet end part communicated with the water inlet pipeline and a main water outlet end part communicated with the water outlet pipeline; the secondary water channel cover plate is arranged below the capacitor potting groove and comprises a cover plate body and a water inlet which is perpendicular to the cover plate body and protrudes downwards, the water inlet is communicated with the water inlet pipeline, a secondary water channel is formed between the cover plate body and the capacitor potting groove, one end of the secondary water channel is communicated with the water inlet pipeline, and the other end of the secondary water channel is communicated with the water outlet pipeline. After the technical scheme is adopted, double-sided heat dissipation of the capacitor module can be realized, the heat dissipation efficiency is enhanced, and the capacitance value and the volume required by the capacitor module are reduced.

The present application relates to a kind of coplanar capacitance sensor and defect detection method, belong to coplanar capacitance sensor technical field, solve the technical problem that same coplanar capacitance sensor cannot detect defect of different depth in prior art.The coplanar capacitance sensor of the present application includes: two sets of electrode assemblies arranged on the same plane, two sets of electrode assemblies are oppositely arranged along the first direction;Each electrode assembly includes at least two electrode plates, and the electrode plates of each electrode assembly are spaced apart along the second direction, and the second direction is perpendicular to the first direction, wherein each electrode plate can be independently connected to act as receiving electrode or excitation electrode.Realize the same coplanar capacitance sensor detects defect information of different depth, without replacing sensor, can reduce artificial measurement error, improve detection efficiency and precision accuracy, reduce equipment cost, while it is favorable to improve the stability and quality of signal transmission of coplanar capacitance sensor.

The application relates to a plate material dielectric stability test method and a test system, and relates to the technical field of electromagnetic measurement.The plate material dielectric stability test method comprises the following steps: step 1: a planar capacitive resonance module is attached to the upper surface of a material to be measured, the planar capacitive resonance module comprises a resonance coil and two capacitive plates arranged on the same plane, and the two terminals of the resonance coil are connected to the two capacitive plates in a one-to-one correspondence; step 2: a frequency analyzer reads resonance frequency information through a coupler matched with the planar capacitive resonance module; step 3: the temperature of the material to be measured is measured, the temperature and the characteristic points of the resonance frequency information are compared with a pre-stored parameter comparison table, and the corresponding dielectric constant is obtained as a measured dielectric constant, the parameter comparison table records the corresponding relationship among the temperature, the characteristic points of the resonance frequency information and the dielectric constant; and step 4: the measured dielectric constant is compared with a theoretical dielectric constant.The application can realize nondestructive testing.

Embodiments of the present invention disclose an integrated passive device, a manufacturing method thereof, and a semiconductor device. By adopting a sandwich structure of a first flexible substrate + a glass substrate + a second flexible substrate to replace the single-layer glass substrate structure in the related art, the present invention can increase the device strength and compensate for the problem of reduced strength after punching and filling a conductive structure in the glass substrate. Moreover, by designing a three-dimensional inductor structure and a planar capacitor structure, the present invention can improve the quality factor (i.e., Q factor) of the inductor, thereby reducing losses and improving the reliability of the integrated passive device.