95 results about "Areal capacitance" patented technology

Stacked metal-oxide-metal (MoM) capacitor(s) in front side and back side metallization layers of a semiconductor die, and related fabrication methods. The stacked MoM capacitor includes a first, front side, MoM capacitor formed on the front side of the semiconductor layer of a die and in front side metallization layers in a front side interconnect structure. The stacked MoM capacitor also includes a second, back side MoM capacitor formed on the back side of the semiconductor layer in back side metallization layers in a back side interconnect structure. The front side and back side MoM capacitors are coupled to each other through a conducting structure in a second, vertical direction between the front side and back side interconnect structures to form the stacked MoM capacitor. In this manner, capacitance density in the die can be maintained or increase while providing sufficient area in the front side metallization layers for signal routing.

A method of fabricating a system includes fabricating a plurality of transistors and coupling a forming a bridge structure connected between a gate contact of a first transistor with a drain contact of a second transistor. The method further includes fabricating a multi-level memory structure including capacitors that comprise a ferroelectric material or a paraelectric material. The capacitors within a given level are coupled together by a plate electrode. The method further includes forming a signal electrode coupled with the plate electrode.

A heating circuit for an energy storage device having a core with an electrolyte, inputs, a capacitance across the electrolyte and the core, and internal surface capacitance between inputs which can store electric field energy between internal electrodes of the energy storage device that are coupled to the inputs, including: a power source coupled to one of the inputs, wherein the power source provides positive and negative input currents to the input, the positive input current flows in to one of the inputs and the negative input current flows out another of the inputs; and a controller for controlling the power source to provide alternating between the positive and negative input currents to the input at a frequency sufficient to effectively short the internal surface capacitance of the energy storage device to generate heat and raise a temperature of the electrolyte.

The invention belongs to the technical field of non-metallic material nondestructive testing, and particularly relates to a method for evaluating the defect detection capability of a coplanar capacitive sensor. According to the defect detection capability evaluation method, defects under different buried depths and sizes are scanned, the distortion rate of a detection signal is calculated, and a preset threshold value is given to judge whether the defects are detected or not; and then a visual chart is drawn, and evaluation of the defect detection limit capability of the coplanar capacitive sensor is realized. The invention discloses a coplanar capacitive sensor defect detection capability evaluation method. The method comprises the following steps: determining a positive sensitivity region, a negative sensitivity region and a zero sensitivity region of a coplanar capacitive sensor; constructing to obtain a non-metallic material defect test group; establishing an electrostatic field simulation model; solving a distortion rate D of the detection signal; drawing a relation curve of detection signal distortion rates D under different burial depth positions and different defect sizes; giving a preset threshold value A, and recording a comparison result; and drawing a comparison result in a visual chart.

The invention provides a semiconductor device, a forming method and a storage system, and relates to the technical field of semiconductors. The semiconductor device comprises a first semiconductor structure and a second semiconductor structure, the first semiconductor structure comprises a stacked structure and a transistor, the stacked structure comprises first conductive layers and second conductive layers which are alternately stacked in the first direction, the transistor is arranged on one side of the stacked structure, and the transistor is connected with one first conductive layer; and the first connecting structure penetrates through the stacking structure along the first direction and is connected with the second conductive layer. According to the technical scheme, the manufacturing process of the planar capacitor formed by alternately stacking the two conductive layers is simple and easy to implement, the common electrode led out through the first connecting structure does not occupy the effective area of the first conductive layer and the effective area of the second conductive layer, and the obtained planar capacitor has large capacitance capacity.

The invention relates to the technical field of laser micro-nano manufacturing, and discloses a filtering supercapacitor based on nanoparticle-shaped graphene / foam metal and a preparation method thereof, and the preparation method comprises the following steps: preparing a cyanate resin / foam metal composite film by employing foam metal with an open pore structure and a liquid cyanate monomer; carrying out laser processing by adopting an intermediate infrared large-size light spot laser beam and an ultraviolet small-size light spot laser beam, and carrying out in-situ laser induction on the surface of the foam metal to grow the nanoparticle-shaped graphene so as to prepare a nanoparticle-shaped graphene / foam metal electrode raw material; cutting the electrode raw material into an electrode, and attaching a second mask; and preparing an interlayer type filtering supercapacitor. The conductivity of the generated nanoparticle-shaped graphene / foam metal thin film is as high as 909.09 S / cm, the prepared supercapacitor still keeps a relatively good capacitance behavior at a scanning rate of 2500V / s, the phase angle is as high as-70 degrees at 120Hz, the surface specific capacitance is 245 [mu] F / cm < 2 >, and meanwhile, the supercapacitor has a cut-off frequency as high as 3kHz and an RC time constant as low as 0.33 ms.

The invention relates to an electrode winding having a winding core, comprising - a wound inner current collector layer, wherein an inner electrode layer is arranged on the inner current collector layer, - a wound outer current collector layer, wherein an outer electrode layer is arranged on the outer current collector layer, - wherein the inner electrode layer and the outer electrode layer are arranged adjacent to one another and a separator layer is arranged between the inner and the outer electrode layer, - wherein the inner current collector layer and the outer current collector layer extend radially outwards from the winding core and the inner electrode layer is arranged closer to the winding core than the outer electrode layer, - wherein the inner current collector layer has an inner load with a mass of inner electrode layer per unit area of inner current collector layer and the outer current collector layer has an outer load with a mass of outer electrode layer per unit area of outer current collector layer, wherein the inner load decreases from the winding core outwards or the outer load increases from the winding core outwards. With this type of electrode winding, the surface capacitances of the inner electrode layer and the outer electrode layer can be adapted to each other.

This invention relates to an imaging method and apparatus for latent defects in asphalt layers based on dynamic coplanar array capacitance, applicable to the field of urban traffic road engineering maintenance technology. The method includes the following steps: determining the penetration depth of a movable array electrode coplanar capacitance sensor; selecting a corresponding movable array electrode coplanar capacitance sensor based on the determined optimal structural parameters; performing dynamic detection at a set penetration depth based on dynamic detection and electrode excitation scheme to determine the depth of latent defects in the asphalt layer; constructing a dynamic sensitive field distribution matrix of the measured area using the finite element method; constructing a normalized coplanar capacitance distribution matrix for different scanning steps at the depth of the latent defects; and reconstructing the relative permittivity distribution map of the latent defects in the asphalt layer under dynamic detection using a capacitance tomography reconstruction algorithm to identify the planar location and shape characteristics of the latent defects. Compared with the prior art, this invention has the advantages of rapid detection and accurate identification.

A cathode electrode for a secondary battery, a vehicle battery, and a method for manufacturing a cathode electrode. The cathode electrode comprises a cathode current collector and a cathode arranged on a surface of the cathode current collector. The cathode comprises an active material containing at least one lithium iron phosphate and one lithium manganese iron phosphate, a binder comprising polytetrafluoroethylene, styrene-butadiene rubber, and at least one polyacrylic acid and polyacrylic acid-polyacrylonitrile copolymer, and a conductive filler, wherein the cathode electrode has an areal capacitance in the range of 3 milliampere-hours per square centimeter to 10 milliampere-hours per square centimeter. The vehicle battery contains the cathode arranged on a cathode current collector.

The present application relates to a kind of coplanar capacitance sensor and defect detection method, belong to coplanar capacitance sensor technical field, solve the technical problem that same coplanar capacitance sensor cannot detect defect of different depth in prior art.The coplanar capacitance sensor of the present application includes: two sets of electrode assemblies arranged on the same plane, two sets of electrode assemblies are oppositely arranged along the first direction;Each electrode assembly includes at least two electrode plates, and the electrode plates of each electrode assembly are spaced apart along the second direction, and the second direction is perpendicular to the first direction, wherein each electrode plate can be independently connected to act as receiving electrode or excitation electrode.Realize the same coplanar capacitance sensor detects defect information of different depth, without replacing sensor, can reduce artificial measurement error, improve detection efficiency and precision accuracy, reduce equipment cost, while it is favorable to improve the stability and quality of signal transmission of coplanar capacitance sensor.

The application relates to a plate material dielectric stability test method and a test system, and relates to the technical field of electromagnetic measurement.The plate material dielectric stability test method comprises the following steps: step 1: a planar capacitive resonance module is attached to the upper surface of a material to be measured, the planar capacitive resonance module comprises a resonance coil and two capacitive plates arranged on the same plane, and the two terminals of the resonance coil are connected to the two capacitive plates in a one-to-one correspondence; step 2: a frequency analyzer reads resonance frequency information through a coupler matched with the planar capacitive resonance module; step 3: the temperature of the material to be measured is measured, the temperature and the characteristic points of the resonance frequency information are compared with a pre-stored parameter comparison table, and the corresponding dielectric constant is obtained as a measured dielectric constant, the parameter comparison table records the corresponding relationship among the temperature, the characteristic points of the resonance frequency information and the dielectric constant; and step 4: the measured dielectric constant is compared with a theoretical dielectric constant.The application can realize nondestructive testing.

Embodiments of the present invention disclose an integrated passive device, a manufacturing method thereof, and a semiconductor device. By adopting a sandwich structure of a first flexible substrate + a glass substrate + a second flexible substrate to replace the single-layer glass substrate structure in the related art, the present invention can increase the device strength and compensate for the problem of reduced strength after punching and filling a conductive structure in the glass substrate. Moreover, by designing a three-dimensional inductor structure and a planar capacitor structure, the present invention can improve the quality factor (i.e., Q factor) of the inductor, thereby reducing losses and improving the reliability of the integrated passive device.

A system to provide non-invasive, indirect, continuous, and linear measurement of fluid levels and aggregate soil moisture concentrations. A multilayer device implements a coplanar capacitor capable of measuring fluid levels outside the wall of the vessel containing the fluid. Additionally, the system measures fluid levels and soil moisture concentrations outside the wall of a sealed probe placed in the water or soil. The structure is shielded from surrounding electrical interference, can be manufactured in a cost-effective manner, and be tailored for different physical applications. The invention also includes an electronic circuit for measuring fluid levels and moisture concentrations that represents a robust design in terms of accuracy, noise suppression, calibration, and temperature stability.

The application relates to a coplanar capacitive sensor and an optimization method thereof, and belongs to the technical field of capacitive sensing, and solves the technical problem of poor imaging effect of a single-pair-electrode coplanar capacitive sensor in the prior art. The optimization method of the coplanar capacitive sensor comprises the following steps: changing the shape of adjacent edges of two electrodes, increasing the spacing of a part of positions of the adjacent edges of the two electrodes, and keeping the spacing of another part of positions of the adjacent edges of the two electrodes unchanged, so that an optimized coplanar capacitive sensor is obtained. In the application, by changing the shape of the adjacent edges of the two electrodes, the sensitivity distribution and the detection performance indexes such as the detection depth of the coplanar capacitive sensor are optimized, so that the imaging effect of the coplanar capacitive sensor is improved.

The utility model discloses a chip capacitor double-sided insulation testing device, which comprises a casing, a back plate and a workbench, the back plate is mounted in the casing, and the workbench is positioned on one side of the back plate; the workbench divides the casing into an upper test area and a lower test area, the upper test area is provided with an upper test head, the lower test area is provided with a lower test head, and the upper test head and the lower test head are respectively provided with a corresponding test probe used for testing a double-sided capacitor; the workbench is provided with a test sample loading and unloading area for loading and unloading a test sample, a carrier plate conveying mechanism for transversely conveying the test sample, and a test sample placing area positioned between the upper and lower test heads; the test probes of the upper and lower test heads are respectively contacted with two sides of the chip capacitor so as to carry out double-sided capacitor insulation test. According to the utility model, the capacitor carrier plate is automatically conveyed to the test sample placement area through the carrier plate conveyor, the upper and lower test heads are started, and the two sides of the chip capacitor are respectively contacted above and below the capacitor, so that the device capable of automatically testing the double-sided insulation resistance of the MLCC product is provided.

This invention discloses a degradation characterization method for IGBT epitaxial layers, comprising: applying a constant bias voltage to the device gate and superimposing a small signal; performing a voltage scan between the collector and emitter of the device; and detecting the capacitance C between the gate and collector at multiple collector and emitter bias voltage points. gc ; Calculate each V ce Substrate capacitance C at value sub And draw C sub -V ce Curve and 1 / C 2 sub -V ce Curve, extracting the surface MOS capacitance C of the junction field-effect region. oj With V ce Variation curve; calculate the substrate capacitance C after the device degrades due to stress. sub Value and draw C sub -V ce Curve and 1 / C 2 sub -V ce The curves are compared to analyze and calculate the types, locations, and densities of defect charges by comparing the drift of the curves before and after device degradation. The method of this invention is simple and easy to implement, and can accurately and quickly determine the defect charges of the epitaxial layer of the device.

The embodiment of the utility model provides a heat dissipation structure and a water pump frequency converter. The heat dissipation structure comprises a main body piece, wherein the main body piece comprises a first plate surface and a second plate surface; wherein the first board surface is provided with a capacitor groove, a transformer groove, a plurality of circuit board fixing bosses and a heat dissipation surface, the circuit board is fixedly connected to the first board surface through the circuit board fixing bosses, the capacitor groove is arranged close to the edge of one side of the first board surface, and the transformer groove is arranged close to the edge of the other side of the first board surface. The heat dissipation surface is arranged between the capacitor groove and the transformer groove, and the heat dissipation surface is closer to the capacitor groove relative to the transformer groove; and the second plate surface is opposite to the first plate surface, and cooling fins are mounted on the second plate surface. The heat dissipation structure is installed on the frequency converter, so that the heat dissipation efficiency of the frequency converter is improved.

A chip includes a combined capacitor. The combined capacitor includes a frontside capacitor, a backside capacitor, and vertical coupling structures coupling the frontside capacitor and the backside capacitor in parallel.

The present invention relates to a method, system, and readable storage medium for detecting the compaction density of asphalt mixtures based on interdigitated coplanar capacitance. The detection method comprises the following steps: S1, establishing a relationship between the dielectric constant and capacitance value of an asphalt mixture based on conformal mapping technology and partial capacitance technology; S2, establishing a relationship between the dielectric constant and compaction density of an asphalt mixture based on a dielectric mixing model; S3, performing capacitance measurements on the asphalt mixture domain and the air domain to obtain corresponding capacitance measurement values; S4, correcting the capacitance measurement values ​​in the asphalt mixture domain to be measured based on parasitic capacitance; S5, substituting the corrected capacitance measurement values ​​in S4 into the relationship established in S1 and S2 to obtain the compaction density of the asphalt mixture to be measured. Compared with the prior art, the present invention can be used to detect the compaction density of asphalt mixtures, providing a basis for evaluating the construction quality of asphalt mixtures.

The invention discloses a planar capacitive multi-dimensional force tactile sensor based on an edge effect in the technical field of sensors. The planar capacitive multi-dimensional force tactile sensor comprises a contact layer, a composite dielectric layer and an electrode layer which are stacked from top to bottom, the center normal lines of the electrode layer, the composite dielectric layer and the contact layer coincide. The electrode layer comprises three interdigital electrodes which are identical in electrode structure and form included angles of 120 degrees, the adjacent interdigital electrodes are mutually crossed to form three groups of mutual capacitors, and the areas of induction areas corresponding to the three groups of mutual capacitors are identical. The sensor is of a three-layer stacked structure, the bottom layer of the sensor is three interdigital electrodes, adjacent electrodes are mutually staggered to form a rhombic plane capacitance sensing unit, the middle layer is a composite dielectric layer composed of a flexible material with a microstructure and air, and the upper layer is a contact layer for the sensor to directly contact with an external load. By means of the electrode arrangement and structural design, high-sensitivity multi-dimensional force detection can be achieved with the minimum number of electrodes, and the complexity of a measuring circuit is reduced.

The application relates to the field of integrated circuit design, and discloses a method, device and equipment for extracting a capacitance value, wherein the method comprises the following steps: determining a combined capacitance matched with each sidewall offset based on the relative position relationship between adjacent first and second metal layers in a pre-generated capacitance query table; wherein the sidewall offset of one side of the two adjacent metal layers represents the offset of a group of sidewalls of one metal layer on the side of another metal layer; calculating the surface capacitance component of the first and second metal layers based on a preset unit surface capacitance and the projection overlap width between the first and second metal layers; and calculating the capacitance value between the first and second metal layers according to the surface capacitance component and the combined capacitance matched with each sidewall offset. The technical scheme provided by the application can improve the extraction efficiency of the parasitic capacitance of the metal layer.

The invention relates to a method and a device adapted for the selective counting of individual respiratory droplets and particles comprising water within ambient air. The method is based on a planar capacitive sensor to which droplets and particles are led with a nozzle, which increases their velocity. Entering the electric field of the capacitive sensor, the respiratory droplets and particles change the sensor's capacitance. Because the respiratory droplets and particles containing water exhibit a notably distinct dielectric constant compared to other airborne particles and the air itself, they are counted in a selective way independently on other particulate matter air pollutants. The alteration in the capacitance is converted into an electrical signal, which is measured by known methods.

The invention discloses a planar capacitor and a preparation method thereof, and relates to the technical field of capacitors. The capacitor assembly is located on the surface of the substrate and comprises a bottom electrode layer, a dielectric layer and a top electrode layer which are sequentially stacked on the surface of the substrate; a capping layer covering the top electrode layer; the interconnection structure comprises a first conductive column and a second conductive column, and the second conductive column penetrates through the covering layer and is in contact connection with the top electrode layer; the first conductive column penetrates through the covering layer, the top electrode layer and the dielectric layer and is in contact connection with the bottom electrode layer; on the plane where the top electrode layer is located, at least part of the covering layer is located between the first conductive column and the top electrode layer. According to the invention, the interconnection structure electrically connected with the electrode layer can be formed without forming a large-size step structure in the capacitor assembly, and the opposite area of the bottom electrode layer and the top electrode layer is increased, so that the capacitance density of the planar capacitor can be improved.

The invention relates to a branching filter. The branching filter is provided with: a common port; a first signal port; a second signal port; a first filter provided between the common port and the first signal port on the circuit structure; a second filter provided between the common port and the second signal port on the circuit structure; a capacitor connecting the first filter and the second filter; and a laminate. The first filter includes a first inductor. The second filter includes a second inductor. The laminated body has a bottom surface and an upper surface located at both ends of the plurality of dielectric layers in the lamination direction. The capacitor is disposed between the first inductor and the second inductor and the bottom surface.

The invention discloses a plate-shaped material dielectric stability test method and test system, and relates to the technical field of electromagnetic measurement. The method for testing the dielectric stability of the plate-shaped material comprises the following steps that 1, a planar capacitance resonance module is attached to the upper surface of a to-be-tested material, and the planar capacitance resonance module comprises a resonance coil and two capacitance plates arranged on the same plane, two terminals of the resonance coil are respectively connected with the two capacitor plates in a one-to-one correspondence manner; 2, the frequency analyzer reads resonant frequency information through a coupler matched with the planar capacitance resonance module; 3, the temperature of the material to be measured is measured, the temperature and the characteristic points of the resonant frequency information are compared with a pre-stored parameter comparison table, a corresponding dielectric constant is obtained and serves as an actually-measured dielectric constant, and the parameter comparison table records the corresponding relation of the temperature, the characteristic points of the resonant frequency information and the dielectric constant; and 4, comparing the actually measured dielectric constant with the theoretical dielectric constant. According to the invention, nondestructive testing can be realized.

The utility model discloses a polycrystalline silicon groove SiC diode with a P-type masking layer, and relates to the technical field of semiconductors. In the SiC SBD diode, a Poly electrode and an N-drift layer are insulated by using an oxide layer to form a planar capacitor, and the two sides of the Poly electrode repel surrounding electrons during reverse blocking, so that a depletion region of the upper N-drift layer is expanded, the electric field intensity at a Schottky interface is reduced, the Schottky effect is weakened, and electric leakage is reduced. And meanwhile, the P-type masking layer extends into the N-drift layer by utilizing an etched groove and is connected with the positive electrode at an equal potential, and when the device is reversely blocked, an electric field peak value moves downwards from the surface and is far away from a Schottky interface, so that electric leakage is reduced.

An inverter device includes a housing, a switching element mounted to an inner surface of the housing, a capacitor arranged and mounted along a first direction on the inner surface and connected to the switching element, a first busbar extending along the first direction and connecting the switching element and the capacitor, a second busbar located on a side opposite to the inner surface across the first busbar, extending along the first direction, and connecting the switching element and the capacitor, a first solder mark extending on the first busbar in a second direction intersecting the first direction, and a plurality of second solder marks extending on the second busbar in a direction along the second direction and located on both sides of the first solder mark when viewed in a normal direction of the inner surface.

This invention discloses a cement-based electrode with optimized pore structure based on polyacrylamide, its preparation method, capacitor, assembly method, and applications. It belongs to the field of cement-based functional materials and electrochemical energy storage technology. The cement-based electrode is prepared from the following raw materials: anionic polyacrylamide, conductive nanomaterials, deionized water, KOH solution, and ordinary silicate cement. This invention significantly reduces the charge transfer impedance at the electrode / electrolyte interface by introducing anionic PAM into the cement-based electrode and using a PAM-containing electrolyte for vacuum impregnation, resulting in a more continuous ion transport channel. At the optimal PAM doping level, the areal capacitance at 10 mV / s can be increased by approximately 52%, and the areal capacitance and surface energy density reach a maximum of 136.00 mF / cm², respectively. 2 With 0.0189 mWh / cm 2 This system exhibits a clearly defined optimal performance range, and the doping amount can effectively control the pore structure and electrochemical response. After 8000 cycles, the electrode capacity retention rate still exceeds 60%, demonstrating good long-term cycling stability.

The invention provides a wafer bearing module, a post-processing unit, a post-processing method and processing equipment, the wafer bearing module is used for overturning a wafer in a water environment, the wafer bearing module comprises a bearing bracket, the bearing bracket comprises a driving assembly and a main body, the driving assembly drives the main body to overturn along a driving shaft, a pair of upper limiting parts and a pair of lower limiting parts are arranged on the first surface of the main body at intervals, the upper limiting piece and the lower limiting piece are located on the two sides of the driving shaft and used for limiting and bearing the wafer; the detection assembly comprises a shell and a capacitive proximity switch packaged in the shell, and the capacitive proximity switch outputs a signal according to the variation of the equivalent capacitance on one side of the detection surface so as to determine whether the wafer is in place or not; wherein the detection assembly is installed on the second surface of the main body, the detection face of the capacitive proximity switch faces one side of the first surface and is located between the pair of upper limiting pieces, and the second surface is opposite to the first surface. The wafer bearing module can effectively prevent the manipulator from colliding with the wafer.

The present application belongs to the technical field of non-destructive testing of non-metallic materials, and particularly relates to a coplanar capacitive sensor defect detection capability evaluation method. The defect detection capability evaluation method scans defects with different buried depths and sizes, calculates the distortion rate of the detection signal, gives a predetermined threshold to determine whether the defect is detected, and then draws a visual chart to evaluate the coplanar capacitive sensor defect detection limit capability. The coplanar capacitive sensor defect detection capability evaluation method comprises: determining the positive sensitivity area, the negative sensitivity area and the zero sensitivity area of the coplanar capacitive sensor; constructing a non-metallic material defect test group; establishing an electrostatic field simulation model; calculating the distortion rate D of the detection signal; drawing the relationship curve of the detection signal distortion rate D under different buried depths and different defect sizes; giving a predetermined threshold A and recording the comparison results; and drawing the comparison results on a visual chart.