An analog to digital (A / D) converter
system and method which provides improved resolution and reduced
noise for integrating-type ADCs, including dual slope, multi slope, and sigma-
delta type A / D
converters. After the ramp-up interval of either a dual slope or multi slope integrating A / D converter, the ramp-down interval occurs, wherein a reference
signal is then applied to the
integrator to return the
integrator to its original value. The
clock cycles are counted while the reference
voltage is applied to determine a primary slope count value. During the ramp-down interval, while the reference
voltage is applied, two or more
integrator voltages are measured. In one embodiment, a first integrator
voltage is measured before the original value and a second integrator voltage is measured after the original value, e.g., before and after the
zero crossing. The method then determines a fractional slope count based on the measured two or more integrator voltages, i.e., the fractional slope count occurring before the return of the integrator to its original value. The fractional slope count is determined by extrapolating or interpolating the return of the integrator to its original value using the measured two or more integrator voltages. The total slope count is then calculated using the primary and fractional slope counts, and the output digital value is determined using the total slope count value.