A gate wiring including a gate line, a gate electrode and a gate pad and extending in a lateral direction is formed on the substrate. A gate insulating layer is subsequently formed, and a semiconductor layer and an ohmic contact layer are sequentially formed thereon. A conductive material is deposited and patterned to form data wiring including data lines intersecting the gate lines, source electrodes, drain electrodes, and data pads. A first insulating layer made of silicon nitride is deposited on the substrate, and a second insulating layer made of photosensitive organic insulating material is coated on the first insulating layer. The second insulating layer is patterned to form a convex-concave pattern and a first contact hole opposite to the drain electrode exposing the first insulating layer on a surface thereof. Subsequently, the first insulating layer and the gate insulating layer are patterned together by photolithography using a photoresist pattern to form contact holes exposing the drain electrode, the gate pad, and the data pad, respectively. Next, indium tin oxide (ITO) or indium zinc oxide (IZO) is deposited and patterned to form light-transmitting electrodes, sub-gate pads, and sub-gate pads connected to drain electrodes, gate pads, and data pads, respectively. data pad. Finally, a reflective conductive material is deposited on the light-transmitting electrode and patterned to form a reflective film with corresponding holes in the pixel area.