13results about How to "Reduce electrical stress" patented technology

The invention provides a design of a low-voltage large-current multi-path interleaved parallel direct-current converter. High-voltage output is achieved through a train storage battery, multi-path interleaving parallel connection is adopted, output current ripples and power loss are effectively reduced, large-current output and power density improvement are achieved, electrical stress borne by power devices is reduced, device loss is reduced, the service life of the devices is prolonged, branch inductive current ripples are mutually restrained at the input end, and the output voltage is improved. And the input current ripples are effectively reduced. And moreover, automatic switching of voltage control modes is realized through software control, the adaptability to voltage regulation under different working conditions such as light load and normal conditions is obviously improved, and the output voltage requirements under various conditions are met. Meanwhile, when a branch fault occurs, the fault branch is quitted from running, other branches are organized to continue running, and the running reliability of the equipment is improved.

This invention belongs to the field of electrical measurement technology, specifically relating to a method for detecting the lifespan of AC charging piles based on dynamic resistance analysis. The method includes: simultaneously acquiring the contact terminal voltage, charging current, and real-time contact temperature of the AC contactor and performing standardized preprocessing; using physical parameters from each sampling period to obtain an evaluation model including the thermistor coefficient of the contact material, to eliminate thermal interference and determine the contact resistance; combining the change in contact resistance, charging current, and characteristic coefficients to obtain a lifespan degradation index characterizing the energy stress accumulation; determining the output current scaling factor based on the deviation between the lifespan degradation index and the lifespan safety protection threshold, and adjusting the duty cycle of the power switch signal accordingly. This invention solves the technical problems of existing methods being unable to decouple thermal drift and wear loss, and lacking active protection, achieving accurate identification and closed-loop safety management of contactor lifespan degradation.

The invention discloses a heat dissipation structure of a power module, belongs to the technical field of heat dissipation of the power module, aims at achieving efficient heat dissipation and improving the output performance of the power module on the basis of achieving miniaturization of the power module, and provides a heat dissipation structure based on a PCB, the power module based on the heat dissipation structure and an inverter system based on the heat dissipation structure. The integrated inverter system in a full-PCB mode can be achieved, the compact type is high, heat dissipation of the power chip is good, three-dimensional packaging of the inverter system and the power chip is achieved through device embedding type design, loop inductance is effectively reduced through lamination design of the PCB, the electric stress in system operation is reduced, the safety and reliability of operation are improved, and the reliability of the inverter system is improved. Meanwhile, the improvement design of the system performance is also facilitated; meanwhile, the designed heat dissipation structure based on the PCB is different from a traditional metal heat dissipation structure, and a driving circuit and a control circuit in the inverter system can stretch across the structure for heat dissipation.

The invention provides an acceleration power supply of an electronic curtain, which comprises a three-phase rectifying circuit, a high-frequency inverter circuit, a boosting transformer and a driving circuit, and is characterized in that the three-phase rectifying circuit is used for receiving three-phase alternating current from a power grid and outputting direct current; the high-frequency inverter circuit is used for inverting direct current into alternating current and comprises a first bridge arm composed of a first switching tube and a second switching tube and a second bridge arm composed of a third switching tube and a fourth switching tube, and the two ends of the first bridge arm and the two ends of the second bridge arm are connected with the positive output end and the negative output end of the three-phase rectifier circuit respectively; the boosting transformer is connected with the high-frequency inverter circuit and is used for boosting the alternating current and outputting direct-current high voltage; and the driving circuit is connected with the control ends of the first switch tube, the second switch tube, the third switch tube and the fourth switch tube, and is used for controlling the first switch tube, the second switch tube, the third switch tube and the fourth switch tube based on a phase shift control technology.

The embodiment of the invention relates to the technical field of power electronics, in particular to a power conversion system, a control method thereof and a controller. The power conversion system comprises a booster circuit, a dual-active bridge DC conversion circuit, an inverter circuit and a controller. Under the condition that the grid-connected switch is switched off and the input voltage of the booster circuit is smaller than a first preset voltage, the controller controls the booster circuit to perform open-loop slow start until the voltage of the first capacitor reaches the first preset voltage; controlling the dual-active-bridge direct-current conversion circuit to slowly start until the voltage of the second capacitor reaches a second preset voltage; and controlling the inverter circuit to slowly start until the voltages at the two ends of the grid-connected switch meet a first preset difference value, and closing the grid-connected switch. Thus, corresponding voltages of the booster circuit, the dual-active-bridge DC conversion circuit and the inverter circuit are slowly started to preset voltages in sequence, current and voltage overshoot and peak during charging and grid connection are avoided, the reliability of the system is improved, and the service life of the system is prolonged.

The invention relates to the technical field of industrial and commercial energy storage system intelligent control, and discloses an industrial and commercial energy storage system intelligent control method and system. And estimating the amplitude and duration of the instantaneous power peak according to a preset equipment power characteristic file to obtain a pre-judged instantaneous power peak parameter. According to the method, the electric quantity state of the energy storage battery can be adjusted in advance, it is ensured that the battery has sufficient power response capacity during pulse load output, and the risks of voltage sag and equipment shutdown caused by insufficient electric quantity are effectively avoided.

This invention discloses a single-tube power chip with self-protection function and its connection structure, belonging to the field of power electronics technology. Addressing the failure risk of power modules exploding or catching fire under short-circuit conditions, the chip includes a chip body, electrodes, and a copper strip. The electrodes are positioned above the chip body, and the copper strip has a fusible aperture for melting and cutting off the circuit when overheated by short-circuit current. The copper strip and the electrodes are fixed together by a conductive connection layer. This invention employs a dual protection mechanism of software and hardware protection. The software protection responds rapidly within 0.1ms at the initial stage of a short circuit, while the hardware protection forcibly disconnects the circuit within 10ms via the copper strip's fusible aperture. Even if the software protection fails, the hardware protection still ensures system safety, achieving absolute safety protection against short-circuit interruption under 1000V high voltage. This completely avoids failures such as continuous arcing, explosion, and fire. The use of copper strip instead of traditional binding wire, combined with nano-silver sintering technology, significantly reduces the thermal resistance of the connection structure.

The invention relates to the technical field of wind power converter monitoring, in particular to a wind power converter direct current bus capacitor ripple current measurement method, device and equipment and a computer storage medium. According to the method for measuring the ripple current of the direct current bus capacitor of the wind power converter, the ripple current in the direct current bus capacitor can be accurately predicted, which is crucial to type selection of the capacitor and system design; by means of accurate ripple current calculation, the capacitor more suitable for specific application requirements can be designed, the risk that the capacitor is damaged due to overheating or overload can be reduced, and system instability or shutdown caused by capacitor faults is reduced. The thermal stress and the electric stress of the capacitor can be reduced through accurate ripple current calculation, so that the service life of the capacitor is prolonged.

The present invention discloses a method for reducing output ripple of a modular parallel high-power direct current power supply. By dividing a pulsation cycle into different time delays, the output current ripple peaks and valleys are staggered to achieve the purpose of reducing ripple. The method is mainly aimed at a research system composed of 12 three-phase isolated AC-DC-DC power supply modules connected in parallel. By combined control of each module, the 12 modules are divided into 4 groups of control units, each control unit controls 3 modules, and the modules and controllers are respectively delayed at different times to reduce the system output ripple, thereby realizing a control method for delayed current sharing. The present invention can stagger the current ripple peaks by reasonably selecting the delay time, thereby reducing the system output ripple, and can stagger the current ripple peaks by reasonably selecting the delay time, which can effectively reduce the system output ripple amplitude, thereby reducing the ripple, improving the output current quality and improving the power quality.

The invention discloses an H-bridge low-frequency switch control method of a cascaded half-bridge converter, which is characterized in that a direct-current side adopts an in-phase carrier laminated modulation strategy, zero level duration is increased at a signal zero crossing point, the action times of a direct-current side switching device near the zero crossing point are reduced, and the switching loss of an H-bridge under closed-loop control is effectively inhibited. An alternating current side phase control algorithm is provided for multiple bridge arms, the bridge arms are divided into a leading group and a lagging group, control signals of sub-modules are redistributed based on fundamental wave phases, meanwhile, two groups of phase-complementary power frequency control signals are distributed for H bridges of the bridge arms, and on the premise that the output characteristics of the converter are not affected, the control signals of the sub-modules are distributed to the H bridges of the bridge arms. All H-bridge switching tubes only act twice in a fundamental wave period, strict power frequency switching and zero voltage switching are achieved, and switching loss is reduced to the minimum. And meanwhile, a battery online energy balancing function based on SOC sorting is integrated, so that the reliability of the converter is improved and the service life of the converter is prolonged on the premise of keeping relatively high output waveform quality, and the switching frequency of an H bridge under closed-loop control is reduced.

The invention discloses a deep groove silicon capacitor structure, and belongs to the technical field of semiconductor capacitors, the deep groove silicon capacitor structure comprises a silicon substrate, an insulating medium layer, a conductive medium layer and a metal layer, the silicon substrate is provided with a groove pattern, the groove pattern comprises at least one unit cell, and the unit cell comprises groove structures with the same width; the insulating dielectric layer covers the bottom and the side wall of the groove structure and the surface of the silicon substrate outside the groove structure; the groove structure covered with the insulating dielectric layer is filled with the conductive dielectric layer; and the metal layer is connected with the conductive medium layer. The trench structures with the same width are arranged on the silicon substrate, so that formation of sharp corners at the bottoms of the trench structures is reduced or avoided, concentration of electric stress and mechanical stress is reduced, and manufacturing quality and performance stability of the capacitor are improved.

The invention provides an MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) cellular structure and a manufacturing method thereof, and relates to the technical field of semiconductors. Comprising an N-type substrate; the N-type epitaxial layer is positioned on the surface of the substrate; the first JFET region, the second JFET region and the P-type shielding layer are located on the surface of the epitaxial layer, and the interface between the P-type shielding layer and the first JFET region and the interface between the P-type shielding layer and the second JFET region are arranged to be of an inclined structure; the first gate oxide layer and the first gate polycrystalline silicon layer are located at the top of the first JFET region, and the second gate oxide layer and the second gate polycrystalline silicon layer are located at the top of the second JFET region; the current channel expansion layer is located at the bottom corner of the first gate oxide layer and the second gate oxide layer; the first doped region, the second doped region, the third doped region and the fourth doped region are located on the side edges of the first gate oxide layer and the second gate oxide layer. The method has the advantages that the electric stress borne by the oxide layer at the corner position of the trench gate is reduced, the gate oxide failure probability is reduced, and the reliability and robustness of the device are greatly improved.

The present invention discloses a power module and a packaging method thereof, comprising an upper power module and a lower power module; the upper power module comprises a copper-clad ceramic substrate unit, a signal collection area unit and a chip parallel unit; the copper-clad ceramic substrate unit comprises a gate, a source, an auxiliary source and a drain copper-clad ceramic substrate; the drain and source copper-clad ceramic substrates are stacked; the signal collection area unit comprises a gate, a source, an auxiliary source and a drain signal collection area; the signal collection areas are respectively arranged on the copper clad of the corresponding copper-clad ceramic substrate; the chip parallel unit comprises three parallel MOSFET chips; the gate, source, auxiliary source and drain of the MOSFET chip are respectively connected to the corresponding signal collection area; the upper power module and the lower power module have the same structure; the source signal collection area of ​​the upper power module is connected to the drain signal collection area of ​​the lower power module. The present invention can improve the uniformity of current distribution.