33results about How to "Improve output drive capability" patented technology

The invention relates to a reset circuit, which comprises a voltage distribution unit, a voltage detection unit and an output unit; the voltage distribution unit comprises a first PMOS (P-channel Metal Oxide Semiconductor) tube and a first NMOS (N-channel Metal Oxide Semiconductor) tube; the threshold voltage of the first NMOS tube is smaller than the absolute value of the threshold voltage of the first PMOS tube; the grid electrode of the first PMOS tube is grounded, the source electrode of the first PMOS tube is connected with power source and the drain electrode of the first PMOS tube is connected with that of the first NMOS tube; the grid electrode and the drain electrode of the first NMOS tube are connected with each other, the source electrode of the first NMOS tube is grounded and the drain electrode of the first NMOS tube outputs a first control signal; the voltage detection unit comprises a first CMOS (Complementary Metal Oxide Semiconductor) phase inverter which receives thefirst control signal and outputs a second control signal; and the output unit comprises a first phase inverter which receives the second control signal and outputs a first reset signal. The reset circuit effectively reduces influence of the technology and the temperature on the reset voltage threshold, and ensures effective resetting of an integrated circuit chip.

A ripple wave amplitude modulating compensation method is first to real-time sample the DC bus voltage transient value CVD with ripple signals; according to the sampled CVD and the rated DC bus voltage value US, calculate the correction coefficient K=Us/CVD which multiplies the operation factor of pulse-width modulation before pulse-width modulation calculation to make correction compensation, ormultiply the gained pulse-width value after pulse-width modulation operation to make correction compensation; therefore to real-time sample the bus ripple wave in each carrier period to real-time correct pulse-width modulation so as to solve the problems of sine pulse-width modulation or spacing vector-width modulation distortion resulted from ripple wave amplitude modulation to lower the output current, increase output driving performance of frequency converter.

A linear amplifier is configured with a current-feedback amplifier followed by a voltage-feedback amplifier to drive a totem-pole output stage. The output stage includes a series arrangement of an npn transistor and a pnp transistor with their emitters coupled in series and to an output node. The voltage amplifier driving the output stage is also configured with totem-pole elements, wherein a conductive path between the voltage-feedback amplifier and an output transistor is included to reduce conduction of the output transistor when the opposing output transistor is driven to increase conduction as a result of a high-frequency input signal. A capacitor may be included between the collector and base of a transistor in the circuit path that drives an output transistor in the output stage to briefly reduce its conduction when the opposing output transistor is driven to increase conduction.

The invention discloses a bus interface circuit based on a serial bus structure and a bus communication protocol thereof; the bus interface circuit uses a logic combination, formed by an emission data line, an emission control line and a competition control line, to realize strong pull up, weak pull up and strong pull down drive output of a bus level; the bus interface circuit combines a bus logic level read back function, and supports the bus communication protocol allowing bus nodes to compete the bus control right in a non-destructive arbitration and automatic back off mode; the nodes monitor the bus state, determine bus idle state, and bus level preset and assignment based on node address bits can ensure the information sent to the bus by the node with the minimum address value not to be destroyed in a bus control right compete process of competing nodes; the bus control right can be re-competed by nodes until all application data is sent, thus realizing node multi-host communication based on the serial bus structure, and ensuring bus communication real-time and reliability.

The invention is applicable to the field of an integrated circuit and provides a radiation-proof ultrahigh-speed triggering circuit and a spaceflight ultrahigh-speed trigger. The radiation-proof ultrahigh-speed triggering circuit comprises a first sensitive amplifier, a second sensitive amplifier, a logic gate circuit and an RS (reset-set) latch, wherein the first and second sensitive amplifiers have double interlocking structures, data is stored into different nodes through two-way interlocking, the logic gate circuit carries out SEU (single particle upset) interference resistance processing on data in different nodes, and generates pre-charging signals, setting signals or resetting signals, the RS latch with a crossed coupling structure forms a phase inverter pair structure when receiving the pre-charging signals for realizing the data latching, or the output time delay avoidance is realized through a symmetrical structure during setting signal or resetting signal receiving. The radiation-proof ultrahigh-speed triggering circuit and the spaceflight ultrahigh-speed trigger have the advantages that the two sensitive amplifiers adopting the DICE structures are used as the front stage of the trigger for preventing the SEU influence, in addition, the front stage output is output to a later stage of RS latch through the logic gate operation, the ascending and descending edge difference-free output is realized through the two symmetrical RS latches with the crossed coupling structures, and the functions of high-speed data transmission is realized.

The invention relates to a parallel analog-digital signal conversion device, which comprises a power voltage generation module, a cascaded voltage subtractor, a power voltage comparer, an input end and N digital output ends; and all the parts and connecting wires among the parts are arranged on the same PCB (Printed Control Board). The power voltage generation module is used for generating a power voltage; the cascaded voltage subtractor is used for carrying out voltage subtraction on an input analog voltage; and the power voltage comparer is used for generating an output digital comparison signal. Due to adoption of the parallel analog-digital signal conversion device, all the components and the connecting wires among the components are arranged on the PCB, layout modes, connecting wire widths and wiring modes can be freely selected, the conversion precision can be achieved by increasing the levels of the subtractor and the comparer; and the parallel analog-digital signal conversion device can achieve high precision and high speed simultaneously by cooperatively selecting a comparer with strong output drive.

The overshoot output prevention power supply circuit with power factor correction (PFC) and the pulse width modulation (PWM), relates to the output driving, it belongs to the PFC and the PWM output domain of the environmental protection power. It has many merits such as the little output overshoot (or without the over clash), the little disturb of the electromagnetism radiate, the high system switching efficiency, the stabilization of the output and the high reliability. The output of the outputting module (3) connect the first measuring machine (41), the second output measuring machine (42), the third output measuring machine (43) of the output measuring module (4), the output of the first output measuring machine (41) connects the pushing controlling module (5) to close the process controlling machine(51), the second output measuring machine (42) connects the unlocking process controlling machine(52) of the pushing controlling module (5), the output of the third output measuring(43) connects the unlocking fulfilling controlling machine(53) of the pushing controlling module(5), shutting the output of the process controlling machine(51) connects the below duct driving machine(23) of the output pushing module(2), the output of the unlocking process machine(52) and the unlocking fulfilling controlling machine(53) are connected to connect the above duct driving machine(22) of the output pushing module(2).

The invention relates to a band-gap reference voltage source circuit. The circuit comprises a core circuit, a negative feedback loop, a current mirror structure and a starting circuit, wherein the core circuit is used for generating band gap voltage, an input end of the core circuit is connected with the starting circuit, an output end of the core circuit is connected with the current mirror structure, and the output driving capacity of the voltage source circuit is improved through the current mirror structure; and the negative feedback loop is arranged among the core circuit, the starting circuit and the current mirror structure, and stability of the output voltage is ensured by the negative feedback loop. The band-gap reference voltage source is processed through the CMOS technology, the voltage source circuit can effectively increase the loading capacity and reduce the temperature coefficient of the output voltage on the basis of reducing the output noise, and the band-gap reference voltage source has advantages of being low in output noise, low in temperature coefficient and large in output driving capacity. The circuit can be widely applied to super-large-scale integrated circuits in the fields of microelectronics and solid-state electronics.

The invention discloses a wide-range input-output interface circuit, and belongs to the field of integrated circuits. Under the condition that the output driving unit (101) serves as an output interface, the gate-source voltage of a PMOS transistor in the output driving unit (101) is equal to the voltage of a kernel working power supply through the dual-mode level conversion unit by means of opening and closing of the auxiliary voltage generation unit (103). Under the condition that a voltage-withstanding input buffer unit (104) is used as an input interface, the gate-source voltage of the PMOS transistor in the voltage-withstanding input buffer unit (104) is enabled to be equal to the power supply voltage of the input/output interface by utilizing the opening and closing of the auxiliaryvoltage generation unit (103) and the opening and closing of the voltage-withstanding input buffer unit (104) and the voltage-withstanding input buffer unit.

The embodiment of the invention discloses a drive unit of an insulated gate power control device. The drive unit comprises a drive circuit connected with the insulated gate power control device. The drive circuit includes a drive power supply, a high-side drive loop for controlling pull-up driving of the insulated gate power control device, and a low-side drive loop for controlling pull-down driving of the insulated gate power control device. According to the invention, the drive unit has characteristics of low working voltage, high power supply efficiency, low cost, high driving current, fast speed, simple circuit, high reliability, easy integration, and convenient promotion.

The invention discloses a composite amplifier. Voltage amplification is carried out on a direct current signal, a low-frequency signal and a high-frequency signal of input signals through a direct current amplification module and a broadband amplification module respectively, wherein the direct current amplification module adopts a high-precision operational amplifier. The amplification times of the direct current and low-frequency signals are adjusted through a first feedback module. The characteristic of high direct current precision is realized. The broadband amplification module amplifiesthe high-frequency signal and an output signal of the direct current amplification module by adopting amplification devices such as a transistor and the like. The characteristic of high bandwidth is realized. The transistor has good heat dissipation performance, can bear higher voltage , and has the characteristic of high voltage. The impedance of an output signal of the amplified signal is reduced through an output driving module. The output driving capability of the composite amplifier is improved, and the amplification factor of a high-frequency signal is adjusted through a second feedbackmodule, so that the composite amplifier has the characteristics of high bandwidth, high precision, high driving capability and high direct current precision at the same time.

The invention provides a light load detection and power tube partial conduction control method and circuit. The method is applied to an occasion where multiple power tubes are connected in parallel for use, and comprises the following steps: a voltage detection step: detecting a drain voltage when the power tubes are conducted, comparing a drain voltage signal with a voltage detection threshold with a return difference, and outputting a comparison result signal; a drive control step of generating a drive signal according to the comparison result signal output in the voltage detection step, andperforming control of full conduction or partial conduction of the power tube; and a power tube output step: controlling the conduction of the power tube according to the driving signal output in thedriving control step, and outputting the drain voltage of the power tube. According to the invention, the drain voltage of the power tube is detected, and when the converter is in a light load state,part of the power tube is turned off, so that the conduction internal resistance of the power tube is increased, the output voltage of the converter is reduced, the output voltage difference betweenthe light load and the heavy load is reduced, and the load adjustment rate is improved.

A multiple op amp IC with a single low noise op amp configuration comprises at least two op amp circuits fabricated on a common substrate. The IC can be configured such that the multiple op amps are connected in parallel to form a single op amp having output drive and input-referred noise characteristics which are superior to those of the constituent op amps. The IC can be fabricated with either first or second metallization patterns, with the first pattern providing multiple op amps with separate inputs and outputs, and the second pattern interconnecting the amplifiers to form a single op amp. The second pattern also preferably interconnects at least one set of corresponding high impedance nodes to prevent a difference voltage which might otherwise arise between the nodes due to component mismatches between the multiple op amps.