31 results about "Proton implantation" patented technology

A method for producing a semiconductor device includes providing a semiconductor substrate having a first conductivity type; implanting protons through a rear surface of the semiconductor substrate of the first conductivity type; and forming a first semiconductor region of the first conductivity type in the semiconductor substrate by performing an annealing process in an annealing furnace in a hydrogen atmosphere having a volume concentration of hydrogen that is equal to or greater than 0.5% and less than 4.65%, the first semiconductor region having a higher impurity concentration than that of the semiconductor substrate after the implantation step. The method reduces crystal defects in the generation of donors during proton implantation and improves the rate of change into a donor.

Planar index guided vertical cavity surface emitting laser (PIG VCSEL) utilizes index guiding to provide improved optical confinement and proton implantation to improve current confinement. Index guiding is achieved by etching index guide openings (holes or partial ridges) around the optical confinement region and may be adjusted by varying the etched volume of the index guide openings (holes and partial ridges). The top contact surface area is increased in the PIG VCSEL thereby lowering contact and device resistance to improve VCSEL performance further. The PIG VCSEL is a substantially planarized device for ease of manufacture.

A photonic device designed with an intermittent absorption profile along a waveguide. The absorption profile is divided into low-absorption and high-absorption segments that are distributed axially in order to decrease the maximum local temperature in the device. The distribution of low-absorption segments can be controlled through techniques such as proton implantation or selective-area quantum well intermixing. The lengths of low-absorption and high-absorption segments can be adjusted to optimize heat dissipation along the device length.

A method of producing a seminconductor device is disclosed in which, after proton implantation is performed, a hydrogen-induced donor is formed by a furnace annealing process to form an n-type field stop layer. A disorder generated in a proton passage region is reduced by a laser annealing process to form an n-type disorder reduction region. As such, the n-type field stop layer and the n-type disorder reduction region are formed by the proton implantation. Therefore, it is possible to provide a stable and inexpensive semiconductor device which has low conduction resistance and can improve electrical characteristics, such as a leakage current, and a method for producing the semiconductor device.

The invention discloses optical beam scanning chips integrated on VCSEL coupled array and a surface optical phase shifter array sheet, and belongs to the cross technical field of semi-conductor lasertechnologies and optical beam scanning technologies. A proton implantation technology, a photonic crystal or cavity induction reverse waveguide technology and the like are adopted, coupling among VCSEL array units is achieved, and coherent light with the same power can be generated by each array unit. By using characteristics of the VCSEL array plane structure, through technologies such as photolithography, sputtering, PECVD, ICP and evaporation, a transmissive optical phase shifter array is integrated on the surfaces of the VCSEL coupled array, and accordingly the optical beam scanning chipswith small size, compact structure and high integration level are obtained. The problems such as large size, low reliability and complex installation due to space separation of a laser source and thephase shifter array in a traditional optical phased array beam scanning device are solved, and the application prospects of the optical phase shifter sheet are wide.

The invention discloses a vertical-cavity surface-emitting semiconductor laser structure, and the structure comprises: an optical oxidation limiting layer which is located at a standing wave antinodeof a laser and plays an optical limiting role; an electrical oxidation limiting layer which is located at the standing wave node of the laser and plays a role in limiting current; a proton injection layer which is positioned on the electrical oxidation limiting layer and the optical oxidation limiting layer and is used for increasing the information transmission rate of the laser; and a buffer layer epitaxially grown on the substrate, wherein an N-surface electrode, an N-type DBR, an N-type space layer, an active region, a P-type space layer, a P-type DBR layer and a P-surface electrode form alaser resonant cavity. The vertical-cavity surface-emitting laser adopts a proton injection and separation limited oxidation structure, the structure improves the uniformity of current injection, reduces the parasitic capacitance of the device, has the low threshold current and stable single-transverse-mode or multi-transverse-mode output, and improves the high-speed performance of the device.

The present disclosure relates to a method for manufacturing a semiconductor device. The method includes introducing at least one first dopant into a semiconductor body (102) through a first surface (104) of the semiconductor body (102). One or more proton implants are then performed. The method also includes introducing a second dopant into the semiconductor body (102) through a second surface (106) opposite the first surface (104) using a plasma-based ion implantation method, wherein the plasma-based ion implantation method is carried out using a composite of the second dopant and hydrogen as a process gas.

A method for forming a semiconductor device comprises implanting a defined dose of protons into a semiconductor substrate and tempering the semiconductor substrate according to a defined temperature profile. At least one of the defined dose of protons and the defined temperature profile is selected depending on a carbon-related parameter indicating information on a carbon concentration within at least a part of the semiconductor substrate.

The present invention relates to the field of semiconductor device manufacture and in particular to a semiconductor device buffer layer manufacturing method. The semiconductor device comprises a semiconductor substrate, a first n-type buffer layer and a second n-type buffer layer. The first n-type buffer layer is formed by performing selenium implantation on the back surface of the semiconductor substrate and an annealing treatment after implantation. The second n-type buffer layer is formed by performing proton implantation or phosphorus implantation or a combination of proton implantation and phosphorus implantation on the back surface of the semiconductor substrate, and an annealing treatment after implantation. The method forms the first n-type buffer layer by implanting selenium elements capable of forming an n-type doping and having a high diffusion coefficient into the back surface of the semiconductor substrate, and forms a second n-type buffer layer by proton implantation witha small atomic mass or a common phosphorus implantation. Under a relative low-energy ion implantation condition, by the combination of the ion implantation of the above two elements and the annealingactivation, the depth of the n-type buffer layer is increased and the carrier concentration distribution of the n-type buffer layer and the device performance of the FS-IGBT are optimized.

The invention provides a manufacturing process of a high-voltage fast recovery diode (FRED), which comprises the following steps of: (1) forming an N + cut-off ring region, and injecting phosphorus impurities; (2) forming an active region and injecting and annealing an N well of the active region, wherein the injected impurity of the N well is phosphorus impurity; (3) forming a P + voltage dividing ring, injecting boron impurities, and annealing; (4) forming a P well, injecting boron impurities, and annealing; (5) opening a lead hole, enriching P + on the surface of the hole, injecting boron into the P +, and annealing; (6) Pt heavy metal doping and annealing are carried out, and minority carrier lifetime is adjusted; (7) front metal is formed, aluminum-silicon-copper is adopted, and the thickness is about 4 microns; (8) forming a passivation layer; (9) thinning the back surface; (10) carrying out heavy doping injection on the back surface, wherein the injected impurities are phosphorus-based alloy; (11) performing proton injection and annealing on the back surface, wherein the thickness of the whole N-region buffer layer is 10-15 microns; and (12) processing metal on the back surface to obtain the high-voltage fast recovery diode FRED. According to the method, the FRED processing cost can be effectively reduced.

A method of manufacturing a semiconductor device includes reducing an oxygen concentration in a first part of a CZ semiconductor body by a thermal treatment. The first part adjoins a first surface ofthe semiconductor body. The semiconductor body is processed on the first surface. A thickness of the semiconductor body is reduced by thinning the semiconductor body at a second surface relative to the first surface. Thereafter, in the semiconductor body, a field stop zone is formed by proton implantations through the second surface and annealing of the semiconductor body. The field stop zone extends into the first part of the CZ semiconductor body.

The present invention relates to the field of semiconductor device manufacture and in particular to a back side processing method of a power semiconductor device. The method comprises a first step ofperforming a second conductive type of collector region manufacturing process: implanting a first type of ions into the back side of the first conductive type of semiconductor substrate; performing alaser annealing treatment on the semiconductor substrate to form a second conductive type of first region having a higher carrier concentration than the first conductive type of semiconductor substrate on the back side of the semiconductor substrate; and a step of performing a buffer layer manufacturing process: performing proton implantation on the back side of the first conductive type of semiconductor substrate; and performing a annealing treatment on the semiconductor substrate. On the basis of performing proton implantation to form a buffer layer, the method performs an activation treatment after the ion implantation in the collector region in combination with a laser annealing method. Compared with the thermal annealing activation by implanting ions such as boron ions into the collector region, the laser annealing has a greatly increased activation rate, so that a higher collector region carrier concentration can be obtained while forming the buffer layer by proton implantation.

The new features of an accelerator driven subcritical reactor disclosed by this invention include the multiple intake ports connected to the reactor vessel for delivering protons from one or more accelerators to accommodate the full length LWR spent fuels for furnishing the desirable neutron distribution in a subcritical core to incinerate nuclear wastes. This is based on the notion of adopting the spent fuels in intact form to feed directly to the newly designed subcritical core. External modulators in the proton intake ports have the ability of splitting the fluxes and adjusting their energy from one or more accelerators to form multiple proton streams arriving at different axial locations in the spallation target for creating multiple neutron sources. The new design could combine the cycles of reprocessing spent fuels, manufacturing fuels for reuse, and incinerating minor actinides into one single cycle.