Patents
Literature
Patsnap Eureka AI that helps you search prior art, draft patents, and assess FTO risks, powered by patent and scientific literature data.

38results about How to "Reduce dishing" patented technology

A method for fabricating a semiconductor structure and the semiconductor structure.

This invention provides a method for fabricating a semiconductor structure and the semiconductor structure itself, relating to the field of semiconductor technology. The method for fabricating the semiconductor structure includes the following steps: providing a substrate, the substrate comprising a substrate, a pad oxide layer, a pad nitride layer, and at least one trench, wherein the pad oxide layer is formed on the surface of the substrate, the pad nitride layer is formed on the surface of the pad oxide layer, and the trench is disposed within the substrate, with an opening extending through the pad oxide layer and the pad nitride layer at its upper part; forming a piezoelectric material layer at the bottom of the trench; filling the trench with an isolation oxide until the isolation oxide covers the trench and the pad nitride layer; applying an electric field to the substrate in a direction perpendicular to the upper surface of the substrate, and planarizing the isolation oxide under the action of the electric field until the isolation oxide on the surface of the pad nitride layer is removed, and then removing the electric field to obtain a shallow trench isolation structure. The method for fabricating the semiconductor structure of this invention can improve the dish-shaped depressions on the surface of the shallow trench isolation structure and improve the yield of the semiconductor structure.
Owner:NEXCHIP SEMICON CO LTD