33 results about "Tunnelling effect" patented technology

The invention discloses a fiber composite material based on hydrogen bond self-repairing and conductive self-diagnosis and a preparation method of the fiber composite material, and belongs to the technical field of intelligent diagnosis and self-repairing fiber reinforced resin-based composite materials and preparation of the intelligent diagnosis and self-repairing fiber reinforced resin-based composite materials. According to the method, the problem that the self-healing effect cannot be timely obtained on the internal damage of the material due to the fact that the damage area cannot be accurately positioned and identified before the damage of the existing fiber composite material is repaired is solved. According to the invention, a quantum tunnel effect and a three-dimensional conductive skeleton are constructed by using a micro-nano multi-stage conductive filler composed of a nano carbon nanotube, micron flake graphite powder and unidirectional short carbon fiber, a damage occurrence position is realized based on an electro-mechanical corresponding relation, a self-sensing function is given, and accurate positioning of the damage is realized (the error is less than 1mm). A multiple reversible hydrogen bond system formed by acrylamide, polyethyleneimine and epoxy resin is further utilized, the self-repairing effect of the composite fiber material is achieved, and the test result shows that the self-repairing efficiency of at least 90% or above is achieved at the normal temperature.

The application discloses a space charge distribution calculation method based on tunneling effect and hole extraction restriction, and belongs to the technical field of electrical engineering, and comprises the following steps: a one-dimensional finite element structure model is established, taking polymer material as a main body and electrodes as boundaries; a periodic polarity reversal voltage is applied at the electrode boundary by coupling Maxwell electromagnetic field theory and Nernst-Planck theory, and a recombination carrier injection model and a hole extraction restricted boundary condition are introduced, so that a polymer material space charge distribution model based on tunneling effect and hole extraction restriction mechanism is obtained; and the polymer material space charge distribution model is solved to obtain the space charge distribution and electric field distortion law of the polymer material under the conditions of strong electric field and polarity reversal. The method solves the problem that the existing space charge model cannot effectively depict the tunneling emission and hole extraction restriction effect at the electrode interface, and provides important support for the polymer insulation aging research under the conditions of strong electric field and polarity reversal.

Examples of the present application disclose a memory, a storage system and an electronic product. The memory comprises a control circuit, a voltage loading circuit, a first driver, and a second driver. The voltage loading circuit, in response to a block selection signal received by a control terminal, is configured to load a first voltage to a control terminal of the first driver through a first output terminal, and load a second voltage to a control terminal of the second driver through a second output terminal. Because starting voltages may be loaded by different output terminals, all the drivers do not share the same starting voltage any longer, and performance degradation caused by a tunneling effect is avoided. Therefore, based on the memory provided by the examples of the present application, the performance degradation of various drivers can be improved.

The invention discloses an amplitude detection method for eliminating a multi-beam sounding sonar tunneling effect. The method comprises the following steps: collecting array element data of a receiving array; generating a beam forming amplitude data matrix according to the array element data; calculating a double-domain dynamic gain normalization matrix; calculating a sampling moment index corresponding to the amplitude maximum value of each receiving beam by using the double-domain dynamic gain normalization matrix, and calculating an amplitude detection time gate by using the index; and calculating propagation time: after the amplitude detection time gate is determined, solving the positions of the centroids of the beam forming amplitude data in all the receiving beam time gates by adopting a weighted average time method, and obtaining the propagation time corresponding to all the receiving beams. The improved amplitude detection method based on the double-domain dynamic gain normalization algorithm provided by the invention has the advantages of obvious tunnel effect inhibition, simple algorithm, no need of parameter setting, and convenience for engineering realization and application.

A non-volatile memory circuit includes a matrix of memory cells. Each memory cell includes a state transistor having a control gate and a floating gate. The state transistor is selected by a vertical selection transistor buried in a substrate and including a buried selection gate. The buried selection gate is common between the selection transistors of one and the same pair of memory cells. The buried selection gate is formed in one and the same selection gate region. The buried selection gate region has a surface indentation between each pair of twin memory cells. The surface indentation reduces a coupling by tunnel effect between the floating gates of the state transistors and the selection gate region.

In accordance with some embodiments of the present disclosure a tunneling-based selector is provided. The selector includes a multilayer barrier structure fabricated between a first electrode and a second electrode. The multilayer barrier structure includes a first layer of a first van der Waals (vdW) material; a second layer of a second vdW material; and a third layer of a third vdW material. The first layer of the first vdW material is fabricated between the second layer of the second vdW material and the third layer of the third vdW material. The electron affinity of the first layer of the first vdW material is lower than the second electron affinity of the second layer of the second vdW material and the electron affinity of the third layer of the vdW material.

A dielectric layer of a semiconductor device may be treated using an oxidation treatment process to tune the dielectric constant of the dielectric layer. For example, an etch stop layer (ESL) in an interconnect layer of the semiconductor device may be formed of a high dielectric constant (high-k) dielectric material, which provides etch selectivity for the ESL relative to other dielectric layers in the interconnect layer. A recess may be formed through the ESL and through the dielectric layers, and a conductive structure may be formed in the recess. Prior to formation of the conductive structure, an oxidation treatment operation may be performed to oxidize the exposed ends of the ESL in the recess. The oxidation treatment may lower the dielectric constant of the ends of the ESL, which may result in the ends of the ESL being less susceptible to current leakage through tunneling, hot-carrier injection, and / or thermionic emission.

Plasmonic biosensor device comprising a first and second electrode, a charge carrier tunnelling junction for providing charge carriers for generating electroluminescent light emission, that is in electrical connection with the first and second electrodes for application of a voltage potential difference. The second electrode comprises or forms a plasmonic structure including a plurality of optical nanoantennas or a plurality of electrically interconnected optical nanoantennas configured to generate plasmons and light emission via the charge carriers provided by charge carrier tunneling in the charge carrier tunnelling junction. The plurality of optical nanoantennas extend thereon.

The invention discloses a reconfigurable two-dimensional floating gate memory which is of a layered structure, and a reconfigurable memory mechanism mainly depends on the photosensitive characteristic of a floating gate layer material, that is, illumination can improve the off-state current of the floating gate layer material. In a dark-state small gate voltage range, the floating gate layer is in a closed state, and at the moment, a storage mechanism is a capacitance coupling effect and shows short-term memory; under the action of illumination, the floating gate layer is opened, and a storage mechanism is switched to a Fowler-Nordheim tunneling effect, which is represented as long-term memory. The invention aims to solve the defects of single function and limited regulation and control means of the existing memory, realizes short-term and long-term memory dual-mode in the device through the '2T1C' layered structure design and the photosensitive characteristic of the two-dimensional material, can realize flexible switching of the two modes through external voltage or illumination, has the advantages of high-speed response of a DRAM and long-term maintenance of a Flash, and has the advantages of high-speed response of the DRAM and long-term maintenance of the Flash. And an efficient and flexible storage solution is provided for the fields of intelligent storage, brain-like computing and the like.

This invention relates to the field of computer storage technology and discloses a storage cell wear equalization method based on tunneling effect compensation. The method includes: monitoring the characteristic offset of the write and erase durations of the physical address cells to be equalized with the number of operation cycles to determine the tunnel oxide aging factor; constructing a topological interference model by combining the spatial spacing between physical address cells and the data update frequency, and performing interference boundary calculations to determine the physical stress divergence profile generated by the compensation voltage pulse; selecting idle physical address cells with stress values ​​below a safety threshold as cold zone nodes, and then correcting the address mapping conversion logic and implementing write redirection. This invention utilizes address mapping conversion logic to resolve physical stress conflicts in the logical dimension, suppresses the loss of induced charge caused by tunnel oxide damage, and effectively improves the data retention characteristics and system stability of the storage medium at the end of its lifespan.

The application discloses a kind of mobile manipulator dynamic collision detection method and device based on time-varying volume model.The mobile manipulator dynamic collision detection method based on time-varying volume model includes the following steps: based on the pose of mobile platform and the joint angle data of manipulator obtained in real time, construct the digital twin joint body model that is completely consistent with the current physical state of real mobile manipulator;Based on the planned path, the swept volume of the digital twin joint body model in the process of simulating the execution of the planned path is calculated;Volume intersection operation is carried out on the swept volume and the three-dimensional environment map in three-dimensional space, and whether the planned path is safe is determined according to the operation result.The application solves the technical problems of the collision detection method in the prior art, such as being too conservative, low efficiency, unable to cover extreme pose risks and having tunnel effect security vulnerabilities.

The present application relates to the technical field of transistor, and relates to a P-type field effect transistor based on tunneling effect, which comprises a substrate, a buffer layer, a channel layer, a barrier layer and a first P-type material layer arranged in sequence; a second P-type material layer, a dielectric layer and a third P-type material layer are arranged above the first P-type material layer; a source electrode is arranged above the second P-type material layer; a drain electrode is arranged above the third P-type material layer; the dielectric layer covers the source electrode, the second P-type material layer, the third P-type material layer and the drain electrode; a gate electrode is arranged on the dielectric layer; the drain electrode and the third P-type material layer form an ohmic contact, and the source electrode and the second P-type material layer form a Schottky contact. The present application further provides a preparation method, which comprises the following steps: S1, providing an epitaxial structure; S2, depositing a drain electrode; S3, depositing a source electrode; S4, selectively etching a P-type material layer; S5, depositing a dielectric layer; S6, selectively removing the dielectric layer; and S7, depositing a gate electrode. The present application can guarantee the always-off characteristic and reduce the on-resistance.

To provide a polarization superjunction field effect transistor capable of significantly reducing the gate leakage current that flows when a positive voltage is applied to the gate electrode. 【Solution means】This field effect transistor includes a first undoped GaN layer 11, Al x , x , 1-x , x , 1-x , x , 1-x , 1-y , 1-x , 1-x , y Ga 1-x N layer 12 (0.17 ≤ x ≤ 0.35), a second undoped GaN layer 13, a p-type GaN layer 15, Al x Ga 1-x An intermediate layer 14 between the Al x Ga 1-x N layer and the second undoped GaN layer, a source electrode 18 and a drain electrode 19 on the Al x Ga 1-x N layer, and a gate electrode 17 on the p-type GaN layer. The intermediate layer is a graded Al x Ga 1-x N layer (x ≤ y < 0.5) in which the bandgap increases continuously and / or stepwise from the bandgap of the Al y Ga 1-y N layer at the interface between the N layer and the intermediate layer towards the interface between the second undoped GaN layer and the intermediate layer, and has a thickness such that carriers do not substantially move due to the tunneling effect.

The invention discloses a quantum annealing attack method for resisting the solution of an LWE problem in quantum cryptography. The quantum annealing attack method comprises the following steps: accelerating the solution of the problem by using the unique quantum tunneling effect of a quantum annealing algorithm; the method comprises the steps that an LWE problem is reduced into an SIS problem, and the SIS problem is mapped into an SVP problem to be solved; in the BKZ block reduction, an Ising Hamiltonian is only constructed for a sub-lattice window, and candidate short vectors are searched by quantum annealing; and the candidate vectors are used for lattice basis updating, and iteration is carried out to obtain the shortest vector of the SVP problem so as to complete LWE problem solving. According to the method, a quantum calculation step is used for solving SVP in a sublattice, and quantum bits and calculation overhead are increased along with the dimension of the sublattice instead of the scale increase of the whole lattice. According to the method and the device, the quantum resource consumption for solving the large-scale LWE problem is remarkably reduced, the implementability of solving the large-scale LWE problem on the current quantum computing equipment is improved, and a new thought is provided for evaluating the security of anti-quantum cryptography based on the LWE problem.

The application discloses a kind of based on hydrogen bond self-repairing-conductive self-diagnosis fiber composite material and preparation method thereof, belong to intelligent diagnosis and self-repairing fiber reinforced resin matrix composite material and its preparation technical field.The present application solves the problem that the existing fiber composite material cannot accurately locate and identify damage area before damage repair, which leads to the damage inside the material cannot be timely healed.The present application uses micro-nano multi-level conductive filler composed of nanometer carbon nanotube, micrometer flaky graphite powder and unidirectional short-cut carbon fiber to construct quantum tunnel effect and three-dimensional conductive framework, realizes damage location based on electro-mechanical correspondence and gives self-sensing function, realizes accurate positioning of damage (error <1mm square).And further using multiple reversible hydrogen bond system composed of acrylamide, polyethylene imine and epoxy resin, achieve self-repairing effect of composite fiber material, test results show that at least 90% or more self-repairing efficiency is realized at room temperature.

The invention provides a tunneling field effect transistor with a vertical channel, a preparation method of the tunneling field effect transistor and electronic equipment. The transistor comprises a substrate, a first source-drain layer, a channel layer and a second source-drain layer, a first transverse groove surrounding the first channel region and a second transverse groove surrounding the second channel region are formed between the first source-drain layer and the second source-drain layer; a gate dielectric layer; and a gate layer including a first gate region parallel to the surface of the substrate and a second gate region extending in a vertical direction. According to the invention, the tunneling field effect transistor with the vertical channel is realized, the area occupied by the device in the horizontal direction is reduced, and the density of the device is improved; and meanwhile, the control effect on the tunneling effect of the channel layer is improved by utilizing the ring gate design, the first channel region and the second channel region are combined, the preparation of the channel with the controllable length is realized, meanwhile, self-alignment during the preparation of the gate layer is formed, the requirement of the device on a photoetching process is effectively reduced, and the performance of the device is improved.

This invention relates to an anti-crystallization light molecular solution with an ultrawide supercooling window and its preparation method. The method first involves heating a mixture of a low-molecular-weight polyol and a quaternary ammonium salt to obtain a deep eutectic solvent, which is then uniformly mixed with water. This invention constructs a "competitive hydrogen bond network" composed of the polyol, quaternary ammonium salt, and water, and utilizes the nuclear quantum tunneling effect at low temperatures to synergistically suppress the ordered crystallization of water molecules. The resulting anti-crystallization light molecular solution has a glass transition temperature as low as -130°C, maintains a stable liquid state over an ultrawide temperature range, and possesses low viscosity, high fluidity, and good conductivity, making it widely applicable as a cryogenic functional medium in polar, deep-sea, and aerospace fields.

Examples of the present application disclose a memory, a storage system and an electronic product. The memory comprises a control circuit, a voltage loading circuit, a first driver, and a second driver. The voltage loading circuit, in response to a block selection signal received by a control terminal, is configured to load a first voltage to a control terminal of the first driver through a first output terminal, and load a second voltage to a control terminal of the second driver through a second output terminal. Because starting voltages may be loaded by different output terminals, all the drivers do not share the same starting voltage any longer, and performance degradation caused by a tunneling effect is avoided. Therefore, based on the memory provided by the examples of the present application, the performance degradation of various drivers can be improved.

The invention provides a solar cell, a preparation method thereof and a photovoltaic module. The solar cell comprises a silicon substrate, a first doped polycrystalline silicon layer, a second doped polycrystalline silicon layer and a conduction block, the back surface of the silicon substrate is provided with a first doped region, a second doped region and an isolation region, and the isolation region is located between the first doped region and the second doped region; the first doped polycrystalline silicon layer is arranged on the back surface of the silicon substrate and located in the first doped region, the second doped polycrystalline silicon layer is arranged on the back surface of the silicon substrate and located in the second doped region, and the doping types of the first doped polycrystalline silicon layer and the second doped polycrystalline silicon layer are opposite; the conduction block is arranged on the back face of the silicon substrate and located in the first doped region, the conduction block comprises a third doped polycrystalline silicon layer, the third doped polycrystalline silicon layer is the same as the second doped polycrystalline silicon layer and the silicon substrate in doping type, and the third doped polycrystalline silicon layer is electrically contacted with the first doped polycrystalline silicon layer and the silicon substrate through the tunneling effect. The solar cell is not easy to have a hot spot phenomenon, and the influence on the efficiency of the module is small.

The application relates to a preparation method of a low specific contact resistance p-type III-V semiconductor material and an ohmic contact of a conductive electrode. The method uses a delta doping technology to grow a Mg high-doping contact layer of a p-type III / V nitride semiconductor material, effectively improves the doping concentration of Mg, thereby improving the hole concentration of a contact interface, thinning the potential barrier of the semiconductor interface, enabling electrons to pass through the interface potential barrier through a tunneling effect, forming a good ohmic contact, reducing the contact resistance, and further reducing the heat generation, and improving the device life. The application has excellent effects on reducing the specific contact resistance, and has the characteristics of high preparation efficiency and more extensive material adaptability, thereby being more valuable.

The application relates to the technical field of low-temperature batteries, and discloses a preparation method of a low-temperature-resistant organic liquid flow battery electrolyte, which comprises the following steps: S1, optimizing the composition and proportion of the electrolyte, selecting a bipolar porphyrin molecule as an active material, a low-viscosity ionic liquid as a supporting electrolyte, an ultralow-freezing-point solvent as a cosolvent, and adding a pi-pi stacking enhancer; S2, optimizing the active molecule structure through quantum chemical calculation, calculating the HOMO-LUMO energy level difference, and making the HOMO-LUMO energy level difference be in the interval of 3.0 eV to 5.0 eV; and S3, adjusting the molecular configuration and bond length through quantum tunneling effect calculation. The technical scheme combining quantum tunneling effect and electrochemical stability is introduced, so that the effect of maintaining the stability of the battery in a low-temperature environment is achieved, an accurate low-temperature battery performance evaluation method is provided through the combination of molecular dynamics simulation and experimental verification, and the shortcomings of traditional technologies in predicting the behavior of the battery in a low-temperature environment are overcome.

The invention relates to a selective emitter and a solar cell. The selective emitter comprises a metal grid line area and a non-metal grid line area, and the height of the metal grid line area is different from that of the non-metal grid line area; the doping concentration of the non-metal grid line region is greater than or equal to 0, and the doping concentration of the metal grid line region is greater than that of the non-metal grid line region; the transition region is located between the metal grid line region and the non-metal grid line region; the top surface of the transition region is an inclined surface, and the transition region is undoped. According to the selective emitter provided by the invention, the undoped transition region is formed between the metal grid line region and the non-metal grid line region, so that the problem of carrier recombination aggravation caused by an irregular inclined plane structure can be improved; a tunneling effect and a local breakdown phenomenon caused by doping can be avoided; according to the selective emitter provided by the invention, the open-circuit voltage and the fill factor of the solar cell can be remarkably improved, and the photoelectric conversion efficiency is improved.

The present application belongs to the field of information security, and relates to a malware adversarial training defense method and device based on analog quantum annealing, a computer device and a storage medium. The method comprises the following steps: extracting structured discrete features of malware and binarizing to generate a binary feature vector; constructing a quadratic unconstrained binary optimization function containing an adversarial term, a functionally equivalent constraint and a format legality penalty, and converting adversarial sample generation into a discrete optimization problem; mapping the function to an Ising model, simulating quantum tunneling effect through Trotter-Suzuki decomposition, performing analog quantum annealing search, and solving the optimal flip vector to generate an adversarial sample; using a benign and original malicious sample to pre-train a WGAN-GP discriminator; calling the aforementioned search to generate an adversarial sample from the original malicious sample, iteratively completing the training, and obtaining a final detector. The method can adapt to a wider range of adversarial strategy distribution, and improve the generalization ability and defense robustness against unknown evasion attacks.

The invention discloses a space charge distribution calculation method based on tunneling effect and hole extraction limitation, and belongs to the technical field of electrical engineering, and the method comprises the steps: building a one-dimensional finite element structure model with a polymer material as a main body and an electrode as a boundary; coupling a Maxwell electromagnetic field theory and a Nernst-Planck theory, applying a periodic polarity reversal voltage at an electrode boundary, and introducing a composite carrier injection model and a hole extraction limited boundary condition to obtain a polymer material space charge distribution model based on a tunneling effect and a hole extraction limited mechanism; and solving the polymer material space charge distribution model to obtain the space charge distribution and electric field distortion rule of the polymer material under the conditions of strong electric field and polarity reversal. The method solves the problem that an existing space charge model cannot effectively describe the tunneling emission and hole extraction limited effect at an electrode interface, and provides important support for polymer insulation aging research under the conditions of a strong electric field and polarity reversal.

The invention relates to an ohmic contact electrode based on an ultrathin barrier layer and a preparation method thereof. Comprising a GaN heterojunction substrate, a Ta barrier layer, an insertion layer, a Ti metal layer, an Al metal layer, a Ni metal layer and an Au metal layer which are sequentially arranged from bottom to top, and the material of the insertion layer is a IVA group metal or semiconductor material in the periodic table of chemical elements. Therefore, on one hand, the Ta barrier layer can inhibit an excessive diffusion phenomenon between Al and Au metals during high-temperature annealing, and the surface roughness is improved; and on the other hand, the insertion layer can form a low-resistance alloy structure to further deplete the barrier layer, so that the tunneling effect of electrons is promoted to form effective ohmic contact, and the resistance is reduced.

The invention discloses a method for updating process objects in an engineering design system, and relates to the technical field of engineering design systems.The method comprises the steps that a to-be-updated process object set and a dependency graph are obtained; mapping the to-be-updated process object set and the dependency graph into Hamiltonian of an Isin model, solving a voltage pulse signal corresponding to the lowest energy state through a quantum tunneling effect, and generating a deadlock-free updating sequence; the non-deadlock update sequence is converted into a biomarker instruction, interference fringes are generated through excitation of a micro-fluidic chip, and a time-varying optical signal is generated; an optical sensor array sensing area is divided based on interference fringes, time-varying optical signals are sensed through optical sensors, abnormal events are detected, fault points are identified, and fault coordinates and fault types are recorded; according to the method, the to-be-updated process object set and the dependency graph are mapped into the Hamiltonian quantity of the Isin model, so that the problem of updating sequence failure caused by static modeling is solved.

This invention discloses a method for monitoring the aging of connectors in energy metering boxes based on loop impedance identification. The steps are as follows: Step S01, injecting a broadband composite excitation signal into the loop containing the connector; Step S02, synchronously capturing the reflected and transmitted signals generated at the loop interface and collecting the loop load current in real time to construct an original impedance response dataset; Step S03, identifying the chemical composition and growth thickness of the oxide layer at the contact interface; Step S04, calculating the effective contact point area density using an interface quantum tunneling effect mapping model; Step S05, calculating the bolt tightening torque retention rate using a thermomechanical deformation evolution model; Step S06, matching the oxide layer growth thickness, effective contact point area density, and bolt tightening torque retention rate with a preset health fingerprint grading standard to output a diagnostic conclusion. The beneficial effect of this invention is that it can distinguish the causes of aging and detect early aging, significantly improving the accuracy and reliability of monitoring the aging of connectors in energy metering boxes.

This invention discloses a gallium oxide field-effect transistor based on the tunneling effect and its fabrication method, relating to semiconductor technology. It addresses the problem of insufficient electrical characteristics in existing short-channel gallium oxide radio frequency devices by proposing this solution. A silicon carbide substrate has an N-type doped region below the source and a P-type doped region below the gate; the N-type and P-type doped regions are arranged adjacently to form a tunneling diode; and both the N-type and P-type doped regions are electrically contacted with the lower end face of the gallium oxide epitaxial layer. The advantage is that the tunneling effect provides a fast discharge path for holes generated by impact ionization, thereby reducing the hole concentration in the channel region, improving the electric field distribution, and reducing the electric field peaks near the gate and drain. By controlling the doping concentration and thickness distribution of the tunneling layer, the depletion region of the channel can be effectively expanded, reducing the gate-source and gate-drain parasitic capacitances, thus improving the transconductance, cutoff frequency, and maximum oscillation frequency performance of the device.

The invention discloses a Schottky transistor for realizing a metal-semiconductor tunneling Schottky junction and a preparation method of the Schottky transistor, and belongs to the technical field of semiconductor electronic devices. According to the invention, based on the characteristic that the width of the depletion layer is inversely proportional to the tunneling strength in an exponential manner, Schottky contact and ohmic contact between metal and a semiconductor are constructed, and a semiconductor material with extremely thin physical thickness is obtained through an external physical means to limit the width of the depletion layer; and grid voltage is applied to modulate the width of a Schottky barrier of the metal-semiconductor Schottky junction in Schottky contact, so that the tunneling effect of electrons from a semiconductor material to a metal material is realized. And the barrier width of the metal-semiconductor interface is dynamically modulated through the grid voltage, so that the tunneling current is accurately controlled.

This invention discloses a gallium oxide surface passivation method based on PEALD-grown ultrathin SiO2 passivation layer and a gallium oxide Schottky diode based thereon, belonging to the field of semiconductor power device manufacturing technology. The passivation method of this invention includes the following steps: S1: in-situ ozone plasma pretreatment of the gallium oxide substrate; S2: growing an ultrathin SiO2 passivation layer on the gallium oxide surface after in-situ ozone plasma pretreatment using plasma-enhanced atomic layer deposition (PEALD); S3: depositing Schottky anode metal on the surface with the grown ultrathin SiO2 passivation layer, depositing ohmic contact cathode metal on the back side of the gallium oxide substrate, and then performing post-annealing. This invention utilizes the synergistic mechanism of in-situ defect repair and quantum tunneling effect to achieve surface depinning without increasing the device's series resistance.