92results about How to "Increased switching losses" patented technology

A device for converting alternating voltage to direct voltage and, conversely, direct voltage into alternating voltage. A series connection between the poles of a direct voltage side has at least four units each having a semiconductor element of turn-off type and a first diode connected in anti-parallel therewith. A first midpoint of the series connection is connected to an alternating voltage phase line and forms a phase output. Second midpoints of the series connection are connected to a midpoint of the direct voltage side through such units. An apparatus is adapted to control the semiconductor elements with a pulse width modulation frequency of at least one order of magnitude higher than the fundamental frequency of the alternating voltage of the phase line and the rest of the semiconductor elements with a frequency substantially lower and within or close to the frequency range of one or a couple of times of the fundamental frequency.

A control unit controls cascaded PFC and LLC converters, the LLC converter having an input coupled to an output, of the PFC converter and providing an output voltage that decreases with increasing switching frequency. The control unit produces a sawtooth waveform with a linear ramp for controlling the LLC converter switching frequency, and hence its output voltage, in dependence upon a feedback signal. It also produces for the PFC converter a PWM signal with a frequency that is the same as or an integer fraction of the LLC converter switching frequency, by comparing two thresholds with the linear ramp in respective different cycles of the sawtooth waveform to turn on and off a switch of the PFC converter during these different cycles. Logic circuits prevent PFC converter switch transitions from occurring simultaneously with switching transitions of the LLC converter.

The invention relates to a unified power energy quality controller based on the serial-connection multiplicity of transformers and a chain structure, which belongs to the technical filed of flexible AC transmission and distribution of an electric power system and the power electronic. The unified power quality controller comprises a single-phase serial-connection multiple transformer bank and a single-phase chain H bridge converter, wherein the transformer bank consists of m single-phase transformers which form the serial-connection multiple transformer bank together with n voltage source converters connected with n secondary windings of m single-phase transformers respectively; the single-phase chain H bridge converter is provided with n chains and is formed by connecting n DC voltage supporting units and n power source converters, and an AC port of the n-chain single-phase chain H bridge converter is directly connected with the electric fence through a reactor, m and n are signless integrals equal to or more than 2, and m is less than or equal to n. The invention can realize accurate current control, has high dynamic responding speed, and can solve the problems of the traction substation of an electrified railway that the three-phase voltage is unstable and fluctuates, the power factor is low and the harmonic pollution exists, and the like.

A power semiconductor device comprising a base, a trench, a heavily doped polysilicon structure, a polysilicon gate, a gate dielectric layer, and a heavily doped region is provided. The trench is formed in the base. The heavily doped polysilicon structure is formed in the lower portion of the trench. At least a side surface of the heavily doped polysilicon structure touches the naked base. The polysilicon gate is located in the upper portion of the trench. The gate dielectric layer is interposed between the polysilicon gate and the heavily doped polysilicon structure. The dopants in the heavily doped polysilicon structure are diffused outward to form a heavily doped region.

The invention belongs to the technical field of a power semiconductor device and specifically relates to a groove gate charge storage type IGBT (insulated gate bipolar transistor). The bottom and side surfaces of a gate electrode in a groove of the device are provided with a double-split electrode equipotential with an emitter and a dielectric layer between the double-split electrode and the gate electrode, so that under the condition of not influencing threshold voltage and turning on of the IGBT device, grid capacitance is reduced, switching speed of the device is improved, and switching loss of the device is reduced; and meanwhile, the side-surface split electrode and a floating p-type base region at one side of the side-surface split electrode improve short circuit safety operation area of the device and carrier concentration distribution of the whole N drifting region, thereby improving performance and reliability of the device. The double-split groove gate charge storage type IGBT manufacturing method does not need extra processing steps, and is compatible with a conventional CSTB manufacturing method.

An inverter for driving a motor includes one or more power stages for producing one or more power signals for energizing the motor, each power stage including first and second III-nitride based bi-directional switching devices connected in series between a DC voltage bus and ground.

The invention discloses a reverse blocking type IGBT and a manufacturing method therefor, and belongs to the technical field of a power semiconductor device. By introducing a floating P type body region on one side of a trench gate and introducing a trench collector structure in a collector region and a field stop layer, the positive breakdown voltage of a device is improved without influencing the threshold voltage and switch-on of an IGBT device; the gate-collector capacitance is lowered, and adverse influence caused by a Miller effect can be relieved; the overall gate capacitance is lowered, the switching speed of the device is improved, the switching loss of the device is lowered, and the compromising relation between forward switch-on voltage drop and switch-off loss of the conventional CSTBT device is improved; the problems of current, voltage oscillation and EMI in the device starting dynamic process can be avoided, and device reliability is improved; the current carrier enhancement effect at the emitter end of the device is improved, the current carrier concentration distribution in a drift region can be improved, and compromising between forward switch-on voltage drop andswitch-off loss can be further improved; and the reverse breakdown voltage of the device is improved, and high forward characteristic of the device is ensured while excellent reverse blocking performance is obtained.

A gate drive circuit includes a driver for driving a gate of a switching element, a peak voltage detector, and a drive capacity calculator. The peak voltage detector detects a peak voltage at a main terminal of the switching element when the switching element is OFF. The drive capacity calculator calculates a voltage difference value between the detected peak voltage and an allowable voltage value at the main terminal of the switching element, where the allowable voltage is based on the specifications of the switching element. The drive capacity calculator changes a drive capacity of the driver to gradually decrease the difference between the detected peak voltage and the allowable voltage.

An illumination system has at least two light sources of which at least one light source includes an LED, and a driver device designed to operate at least the one LED with a DC signal; a sensor device for determining at least one feature of the light output; an actual value storage device connected to the sensor device for storing an actual value of the feature; a setpoint selection device for storing a setpoint of the feature; and a control device connected on the input side to the actual value storage device for of transmitting the actual value, and to the setpoint selection device for transmitting the setpoint, and which provides the driver device with a control signal that changes a characteristic of the DC signal used for driving the LED such that the actual value approaches the setpoint.

An IGBT module is configured with a plurality of IGBT cells connected to each other. The IGBT chips are each configured a plurality of unit cells connected to each other. The unit cells each include one IGBT element. Gate voltage is applied to the gate of the IGBT element from a common gate terminal through a gate pad and a gate resistor. Emitter voltage is applied to the emitter of the IGBT element from a common emitter terminal through an emitter pad. Collector voltage is applied to the collector of the IGBT element from a common collector terminal. The gate pad, gate transistor and emitter pad are provided for each of the unit cells. Thus obtained is an IGBT module capable of suppressing gate voltage oscillation without significantly increasing switching loss.

The present invention relates to a trench gate IGBT device and a manufacturing method thereof, and belongs to the power semiconductor device technology field, and relates to an insulated gate bipolar transistor. According to the present invention, by introducing a composite trench structure and a carrier storage layer which are coupled mutually, and introducing an electrode connected with an emitter at the bottom of a gate electrode of an injection enhanced gate transistor (IEGT) device, on one hand, the depth and width of the gate electrode are reduced under a certain trench depth and width, on the other hand, by the shielding effect of the introduced electrode connected with the emitter, the gate capacitance, especially the gate-collector capacitance of the device is reduced, the switching speed of the device is improved, the switching loss of the device is reduced. Meanwhile, by introducing the coupled carrier storage layer, the adverse effect to the positive conduction characteristic of the device which is caused by introducing the gate electrode connected with the emitter is compensated, further the carrier concentration distribution of a whole drift region is improved, and the better compromise of the device positive conduction voltage drop and the switching loss is obtained.

The invention discloses a novel three-level NPC current converter modulation and midpoint level control strategy comprising the steps of 1, firstly acquiring an upward modulating wave U*p and a downward modulating wave U*n; 2, decomposing the upward modulating wave U*p into U*p1 and U*p2, decomposing the downward modulating wave U*n into U*n1 and U*n2, and thus acquiring an analytic expression ofthe downward modulating waves under different modulating degrees m; 3, using a model prediction control method, and predicting the midpoint voltage of a (k+1) moment and a (k+2) moment; and 4, comparing the midpoint voltage of the (k+1) moment and the (k+2) moment with a reference voltage Uref, and then deciding whether to switch the modulating wave; then outputting a final PWM pulse to the three-level NPC current converter after the modulating wave is compared with a carrier wave. The control strategy provided by the invention selects the modulating wave through predicting the midpoint voltage values of two future moments to serve as a criterion; and provided is the three-level NPC current converter modulation and midpoint level control strategy which achieves balanced midpoint voltage, small switching loss and high efficiency under full modulating degrees and full power factors.

The invention discloses a trench-gate charge storage type IGBT and a manufacturing method therefor, and belongs to the technical field of semiconductor power devices. A trench-gate emitter structure connected with a P-type volume region is introduced to an N-type drift region at one side of a trench gate in a conventional CSTBT device, thereby enabling the gate-collector capacitance into gate-emitter capacitance, and improving the adverse effect of Miller capacitance. A thick dielectric layer of the trench-gate emitter structure avoids an electric field concentration effect at the bottom of atrench, and improves the breakdown voltage of a device. The depth of a gate electrode is enabled to be less than the junction depth of an N-type charge storage layer, thereby reducing the overall gatecapacitance under the condition that the connection of an IGBT is not affected, improving the switching speed of the device, reducing the switching loss of the device, and improving the compromise characteristics between a positive conduction voltage and the switching-off loss. According to the invention, the existing of the P-type volume region can reduce the extraction area of a hole, and improves the carrier concentration distribution of the whole N-type drift region. Moreover, the noise impact is reduced, and the EMI effect is avoided.

A semiconductor device (11) having a switching function of being turned on or off according to a voltage (Vge) of a driving signal supplied to a gate thereof is driven by generating a feedback voltage (VFE) based on a time change (dI / dt) of a collector current (Ic) of the semiconductor device (11) and applying the feedback voltage (VFE) as part of the voltage (Vge) of the driving signal when the semiconductor device (11) is switched from on to off.

A turn-off feedback unit (23OFF) of a semiconductor device driving unit generates a feedback voltage as part of a voltage of a drive signal for establishing electrical continuity or disconnection in a bus according to a temporal variation of a collector current of a first semiconductor device (11U) when the first semiconductor device (11U) is turned off from on. A turn-on feedback unit (23ON) generates the feedback voltage according to a commutation current flowing through a free wheeling diode (12D) connected to a second semiconductor device (11D) when the first semiconductor device (11U) is turned on from off.

This semiconductor device is characterized in being provided with: a first gate electrode (22a), which is provided on the inner side of a first insulating film, said first gate electrode being provided along one side wall of a first trench (21), and which is provided inside of a second trench (40); a shield electrode (22b), which is provided on the inner side of a second insulating film, said shield electrode being provided along the other side wall of the first trench (21), and which is provided inside of a third trench (50); a gate runner, which has a part thereof provided on the first gate electrode (22a) by having the second trench (40) extended, and which is connected to the first gate electrode (22a); and an emitter polysilicon layer (25a), which has a part thereof provided on the shield electrode (22b) by having the third trench (50) extended, and which is connected to the shield electrode (22b). Consequently, turn-on characteristics are improved with an increase of a small number of process steps, while suppressing cost increase and deterioration of yield rate.

The invention discloses an optimal DC ripple wave mixed type modulation method of a current source type converter. The optimal DC ripple wave mixed type modulation method of the current source type converter comprises the step of calculating various parameters of a system, wherein the parameters include an AC voltage amplitude Vtm of the converter, an initial phase gamma of an AC A-phase voltage of the converter, a modulation ratio m, an angular displacement initial value theta0 of the reference current and the like. In comparison with a separate five-stage type modulation way, the switch loss of the system is basically in accordance, but the peak value and effective value of the ripple wave are minimized; in comparison with the traditional ripple wave suppression technology, only the modulation algorithm of the converter rather than increase of DC inductance and obvious increase of switch loss is needed by the new technology, and great superiority is obtained.

A power conversion system is presented. The system includes a power source coupled to a power converter and a controller. The controller is configured to determine a value of at least one parameter corresponding to the power source. Additionally, the controller is configured to provide a first portion of the at least one parameter to the power converter and modify an operating frequency of the power converter, duty ratio of the power converter, or a combination thereof. Furthermore, the controller is configured to obtain an electrical quantity at an output of the power converter based on the modified operating frequency, the modified duty ratio, or a combination thereof. Also, the controller is configured to deliver a combination of the electrical quantity obtained at the output of the power converter and a second portion of the at least one parameter to a load. Method for converting power is also presented.

Method for generating an amplified high-power alternating voltage that follows a digital input data stream in terms of shape and amplitude, preferably in the known I2S format, whereby a direct-voltage supply that takes an essentially sine-shaped current is provided as the power supply. In order to achieve a high degree of effectiveness and a high level of congruency between the input data stream and the output signal, it is provided that the input data stream is converted into a digital signal sequence, and this signal sequence is amplified by switching, whereby a digital signal is derived from the amplified output signal, and compared with a digital signal that corresponds to the input data stream, and the amplification of the input data stream is influenced, in the sense of a congruency of the amplified signal with the input data stream, by means of switching by a digital difference signal that might be determined, whereby a signal that corresponds to the ripple of the direct-voltage supply is mixed into the input data stream or a signal derived from it.

The invention discloses a trench gate charge storage type IGBT, and belongs to the technical field of semiconductor power devices. A conventional trench gate structure is widened, and a side wall gateelectrode structure is employed for forming a mesa structure located below a base region. moreover, a shielding trench structure for shielding the electric field of a charge storage layer is introduced, thereby improving the carrier injection enhancement effect, and improving the compromise between a forwarding ON voltage drop Vceon and the OFF loss Eoff. The electric field concentration effect at the tip of the bottom of a trench is alleviated, and the breakdown voltage of a device is effectively improved. The gate capacitance of the device, especially the Miller capacitance CGC and the gatecharge QG, is reduced, the switching speed of the device is improved, the switching loss of the device is reduced, and the requirements for the capability of a gate drive circuit are reduced. The constraint on the doping concentration of an N-type charge storage layer and the withstand voltage of the device from the thickness are avoided, the saturation current density is reduced, and a short-circuit safe operating region (SCSOA) of the device is improved. Moreover, an EMI effect is effectively inhibited when the device is turned on. In addition, the manufacturing method is compatible with aconventional trench gate charge storage type IGBT manufacturing method.

The invention provides a bi-directional trench gate charge storage type IGBT (insulated-gate bipolar transistor) and belongs to the technical field of a semiconductor power device. By means of widening of a traditional trench gate structure, formation of a mesa structure below a base region by a side wall gate electrode structure as well as introduction of a shielding trench structure, carrier injection enhancement effect is increased while symmetric forward / reverse conduction and turn-off characteristics of the device are realized, and compromise between forward voltage drop Vceon and turn-off loss Eoff is improved; electric field concentration effect at a sharp corner of the bottom of a trench is reduced, and breakdown voltage of the device is effectively increased; gate capacitance of the device is reduced, so that switching speed of the device is increased, switching loss of the device is reduced, and the requirement for capacity of a gate driven circuit is reduced; limitation of doping concentration and thickness of an N-type charge storage layer to device withstand voltage is avoided; saturation current density is reduced, and a short circuit safe operating area of the deviceis improved; further, EMI (electro-magnetic interference) effect produced when the device is conducted is effectively inhibited. Besides, a manufacturing method is compatible with a traditional CSTBTmanufacturing method.

The invention relates to a system with a driver circuit and at least one power switch and its driving method. A system with driver circuit and at least one power switch is provided, wherein, a parallel circuit of a first switched power semiconductor element and a second switched power semiconductor element is formed by the power switch. The invention is characterized in that the first power semiconductor element has smaller switch loss and / or oscillation tendency than the second power semiconductor element, while the second power semiconductor element has smaller conduction loss than at leastone first power semiconductor element. In the method, the first power semiconductor element is conducted and retained at the specific period under the switch pulse, while inn the period, the second power semiconductor element can also receive the switch pulse. By means of the method according to the invention, the total loss in the on-off process is obviously smaller than that in the structure mode of the power switch in the prior art.

A SGT MOSFET having ESD diode and a method of manufacturing the same are disclosed. The SGT trench MOSFET according to the present invention, has n+ doped shielded electrode in an N channel device and requires only two poly-silicon layers, making the device can be shrunk with reducing shielded gate width for Rds reduction without increasing switching loss and having dynamic switching.

Routing of a gate signal for controlling a discrete power switching device (such as in an inverter for an electric vehicle drive) is configured to compensate for the common source inductance inherent in the switching device as a result of its integrated circuit packaging. The power device has a gate signal path via a gate pin and a power signal path via first and second power pins, wherein the gate signal path and the power signal path have a first mutual inductance. A circuit board apparatus provides a gate wiring loop juxtaposed with the power signal path, wherein the gate wiring loop and the power signal path have a second mutual inductance substantially canceling the first mutual inductance. The resulting reduction in common source inductance avoids the reductions in switching speed and the increased switching losses otherwise introduced by the common source inductance.

In a semiconductor device, a plurality of semiconductor chips included in an upper-arm circuit are connected in parallel between a pair of upper-arm plates, while a plurality of semiconductor chips included in a lower-arm circuit are connected in parallel between a pair of lower-arm plates. In each of the arm circuits, the plurality of semiconductor chips are arranged in a direction perpendicular to a direction in which emitter electrodes and pads are arranged, the pads are disposed on the same side of the emitter electrodes, and signal terminals extend in the same direction. A series-connecting part between the upper- and lower-arm circuits includes a joint part 20 continued to respective side surfaces of the corresponding upper- and lower-arm plates. Each of inductances of respective parallel-connecting parts of the upper- and lower-arm plates which connect the semiconductor chips in parallel is smaller than an inductance of the series-connecting part.

The highest-power switches now available are based on thyristor-type devices: GTOs (Gate turn-off thyristors), MTOs (MOS controlled turn-off thyristors), IGCTs (Integrated gate commutated thyristors), and the new ETOs (Emitter turn-off thyristors). These devices handle kilovolts and kiloamperes for megawatt inverters / converters. Measurements by the inventors show that conduction losses of MOSFETs and switching losses of IGCTs are drastically decreased by cryo-cooling. IGCTs, ETOs, and MTOs, together with many small, low voltage MOSFETs for gate and emitter turn-off circuitry, are cryo-cooled to attain much higher switching speeds and a reduction in size, weight and cost of high-power (megawatt range) equipment.

In a switching power source, in a state where a second voltage smaller than a first voltage is output from an output unit by intermittently driving a switching unit, the switching unit changes a number of driving times of the switching unit for each driving cycle when the switching unit is intermittently driven.

The invention relates to an inverter device adopting a multi-winding transformer and a multi-H-bridge structure and a voltage output method of the inverter device. According to the method, firstly, a H-bridge inverter with three same direct-current voltage sources is provided and synchronized to a direct current bus at a voltage grade of Vo; the overall output voltage value of a secondary side of a transformer can meet the equation V=k1*(x+y+z)*Vo / 3; secondly, an ideal sine wave synchronized with a power grid is preset in a synchronization controller in the inverter system; thirdly, the ideal sine wave and a signal are modulated, corresponding switches of corresponding H bridges are respectively driven by a switch state of a modulated power switch according to the step condition in the signal, so that the overall output voltage waveform of the secondary side of the transformer approaches to the ideal sine wave after a wave filtering link. Under the condition of guaranteeing the output voltage performance, the switch loss can be largely reduced, and the energy transforming efficiency can be improved.

The invention discloses a buck-boost converter and a method for controllng the same. A buck-boost converter includes an inductor including a first terminal and a second terminal, a first switch, a second switch, a third switch, a fourth switch and a fifth switch, wherein the first switch is coupled between an input voltage and a first terminal of the inductor, the second switch is coupled between a reference voltage and the first terminal of the inductor, the third switch is coupled between an output voltage and a second terminal of the inductor, the fourth switch is coupled between the reference voltage and the second terminal of the inductor, and the fifth switch is connected in parallel with the third switch. When the buck-boost converter operates in a buck mode, the first switch and the second switch are turned on alternately, and the fifth switch is turned on; when the buck-boost converter operates in a boost mode, the third switch and the fourth switch are turned on alternately, and the fifth switch is turned off. The buck-boost converter can improve the efficiency and reduce switch loss.