43results about How to "Reduce manufacturing process complexity" patented technology

The present invention discloses an optical multiplexer and a transmitter optical subassembly, and relates to the field of optics communications. A light-combining part is formed by using at least one light combiner that can combine two beams of light into one beam of light, and at least two levels of light-combining parts are used to constitute an optical multiplexer, so that 2 N beams of light are combined into one beam by using N level of light-combining parts, thereby reducing a package size and packaging loss, and reducing the complexity of a manufacturing process.

The invention belongs to the technical field of microelectronics, and discloses a memristor with a two-dimensional material heterojunction and a preparation method of the memristor. The memristor comprises a substrate, a bottom electrode layer, a two-dimensional material heterojunction layer and a top electrode layer from bottom to top, wherein the two-dimensional material heterojunction layer serves as an intermediate dielectric layer and is of a two-layer laminated structure composed of two different metal sulfur compounds, and each layer in the laminated structure corresponds to one metal sulfur compound. Compared with the prior art, the novel memristor is constructed completely based on a two-dimensional material by improving a key functional layer material adopted by the device, the overall structural design of the device and the like, the traditional MIM structure is overturned, and the memristor has the characteristics of low working voltage, fatigue resistance and cycling stability. In addition, the memristor shows high similarity with synapses in information transmission on the aspect of simulating information transmission of neuron, and has a great application prospect onthe development of brain-like structures in the future.

The embodiment of the invention provides a single and dual axis magnetic field sensor, a preparation method thereof and equipment. The single axis sensor comprises a first Wheatstone bridge located ona substrate, the first Wheatstone bridge comprises two first magnetoresistive module groups and two second magnetoresistive module groups; the two first magnetoresistive module groups are located onfirst opposite bridge arms of the first Wheatstone bridge, and the reference layer magnetization directions of first magnetoresistive modules in each first magnetoresistive module group are the same with the first direction of the first sensing axis of the single-axis magnetic field sensor; the two second magnetoresistive module groups are located on second opposite bridge arms of the first Wheatstone bridge, and each second magnetoresistive module group includes two second magnetoresistive modules connected in series; the angle bisector of a first included angle formed by the reference layermagnetization directions of the two second magnetoresistive modules is parallel to the first sensing axis; the first included angle is greater than 0 and smaller than 180 degrees; and the reference layer magnetization directions of the first magnetoresistive module and the second magnetoresistive module are perpendicular to respective easy magnetization axes. According to the technical scheme, thecomplexity of the preparation process of the single-axis magnetic field sensor can be reduced.

The invention discloses a semiconductor layout structure. The semiconductor layout structure comprises at least one first signal line and a pair of low-power supply potential lines, wherein the first signal line and the low-power supply potential lines extend along a first direction, the low-power supply potential lines are arranged along a second direction, the first direction and the second direction are perpendicular to each other, and more importantly, the low-supply potential lines are formed at two opposite sides of the first signal line.

The invention discloses a light-emitting diode (LED) power source with an inversed LED chip and a method for producing the LED power source with the inversed LED chip. The LED power source with the inversed LED chip provided by the invention comprises the LED chip and a base plate, wherein the LED chip comprises a transparent substrate, an N-type coating, an active layer, a P-type coating and a transparent conducting thin film which are sequentially superposed together; an N-type electrode pad is arranged in an exposed area of the N-type coating, and a metal salient point is arranged on the N-type electrode pad; a P-type electrode pad is arranged on the transparent conducting thin film, and a metal salient point is arranged on the P-type electrode pad; the base plate is a transparent base plate, and metal bosses, and a positive electrode and a negative electrode which are used for being connected with an external circuit are arranged on the base plate; and the metal salient points on the N-type electrode pad and the P-type electrode pad are respectively and correspondingly connected with the metal bosses on the base plate, and an encapsulation glue is also arranged on the base plate and covers the LED chip. The light-emitting efficiency of the chip is increased, the chip structure is simplified, and the production technological complexity of the chip is lowered.

The invention discloses a manufacturing method for leading-out terminals of a ceramic integrated circuit encapsulation casing and a special lead framework. The special lead framework comprises an outer frame 1 and leads 2, and forms a grid bar structure with a frame, wherein the leads 2 are grid bars; the outer ends of the leads 2 are connected with the outer frame, and the inner ends of the leads 2 are in one-to-one correspondence to bonding pads on a ceramic casing 4; after the inner ends of the leads 2 are connected with the bonding pads, the redundant part of the lead framework is cut and separated; and the inner ends of the leads 2 remain on the bonding pads to form bulges so as to form leading-out terminals. Owing to the structure, convenient and accurate positioning is ensured when the leads 2 are welded with the bonding pads, so that a welding die is simplified; and besides, the outer frame can be utilized to achieve direct rack plating, so that the manufacturing technique complexity of the fine-pitch casing is greatly reduced, the production efficiency is improved and the product yield and quality are improved.

The invention discloses a method for manufacturing a longitudinal dual-grid MOS component, which comprises the following steps: firstly, an ion implantation technology is adopted on a silicon face at the top layer of a SOI substrate to form an N-P-N structure, wherein an N area is highly doped, and a P area is lowly doped; secondly, an electron beam exposure method and an ICP etching method are adopted to form a longitudinal trench at the position of the interface of the N area and the P area where the N-P-N structure is formed; thirdly, a thermal oxidation technology is adopted to form a layer of silicon oxide on the silicon face at the top layer of the longitudinal trench; fourthly, a low pressure chemical vapor deposition technology is adopted to combine a tetra ethyl ortho silicate TEOS source to be filled with the silicon oxide to the longitudinal trench; fifthly, the photoetching is operated on the surface of the filled silicon oxide, the silicon oxide is corroded and the N area and the P area are exposed; sixthly, metal is evaporated on the surface of the exposed N area and P area, and an electrode is formed through the photoetching corrosion. Through adopting the invention, the high speed information transmission in the optical communication and inside a chip system is realized.

The invention provides a wafer structure, a manufacturing method thereof and a chip structure. The manufacturing method comprises the steps of bonding the front of a first chip with a photosensitive unit array and the front of a second chip with a logic device; arranging an electric connection through hole in a pad area at the back of the first chip, wherein the electric connection through hole passes through a top connecting line layer in the first chip from the back of the first chip and penetrates to a top connecting line layer in the second chip; and arranging a pad on the electric connection through hole. Therefore, the embodiment of the invention realizes the integration of the stacked photosensitive device, has the advantages of high integration degree and simple structure, can effectively improve the transmission efficiency of the device and reduces the complexity of the manufacturing process.

The invention discloses a TSV-based accumulative MOS variable-capacitance diode, which comprises a P-type silicon substrate, wherein a through hole is disposed in the silicon substrate; a metal pillarand a dielectric layer are arranged in the through hole from the inside to the outside; a terminal a extends out of the metal pillar; a P-type doped region is disposed between the dielectric layer close to the end of the through hole and the silicon substrate; and a terminal b extends out of the end surface of the P-type doped region. The invention also discloses a preparation method of the TSV-based accumulative MOS variable-capacitance diode. The TSV-based accumulative MOS variable-capacitance diode has a higher quality factor, lower parasitic resistance, lower phase noise and better tuninglinearity than a planar accumulative MOS variable-capacitance diode.

The invention relates to the technical field of carbon materials, in particular to a preparation method and application of a heat conduction material and a maleic anhydride grafted graphene material.The preparation method comprises the steps that maleic anhydride and graphene are evenly mixed, and a prefabricated mixture is obtained; uniformly mixing the prefabricated mixture with a peroxy initiator, heating to react for a certain time, cleaning a product, and drying to obtain the maleic anhydride grafted graphene material. According to the preparation method, graphene is grafted with strong polar groups to serve as a connecting bridge between the graphene and a plastic matrix, so that the strong bonding capacity between the graphene and the plastic matrix is obtained, then the toughness, surface smoothness, breaking strength and other mechanical properties of the corresponding plastic heat-conducting composite material are improved, and meanwhile the heat-conducting property of the heat-conducting composite material is remarkably improved. In addition, maleic anhydride and graphene are directly mixed without the help of an organic solvent or a dispersing agent and the like, the process is simple and pollution-free, the environmental protection property is improved, and the complexity of the preparation process is reduced.

The invention discloses a two-dimensional turbulence sensor of an orthogonal cantilever beam structure, comprising a probe, a sheath, a front beam, a first sensitive component, a conversion connector,a back beam, a second sensitive component, a rear seat, a sealing rod and a conditioning circuit; The probe is mounted on the front end of the sheath, the front beam is mounted inside the front section of the sheath and placed vertically, the first sensitive component is mounted on the front beam; the front end surface of the conversion connector is provided with a vertical notch, the tail of thefront beam is inserted into the vertical notch, the rear end face of the front beam is horizontally provided with a horizontal notch, the head of the rear beam is inserted into the horizontal notch,the second sensitive component is mounted on the rear beam; the front beam and the rear beam are orthogonally distributed in a space to form a cantilever beam structure; the first sensitive element and the second sensitive element are both connected to the conditioning circuit. The two-dimensional turbulence sensor with orthogonal cantilever beam structure achieves high-resolution observation fortwo-dimensional physical characteristics and spatial features of turbulent flow, and provides high-reliability detection means for research on formation and disappearance mechanisms and motion trajectory of micro-scale turbulence.

The invention provides a visual absolute type rotation angle measurement method and device, and the device comprises a CCD camera and an annular code disc, and the middle part of the code disc rotatesthrough a connection rotating shaft; n concyclic gray scale identifiers are uniformly distributed on a circular ring of the code disc, and the gray scale value of each gray scale identifier corresponds to n stages of gray scale values which are uniformly set at intervals in a 0-255 gray scale value interval; and and the CCD camera is arranged above the code disc, the shooting visual field of theCCD camera is aligned with the gray scale identifiers, and at least one complete gray scale identifier exists in the shooting visual field of the CCD camera at any moment. The measurement device provided by the invention has absolute positioning capability and extremely low rotation angle measurement resolution.

The invention discloses a manufacturing method for leading-out terminals of a ceramic integrated circuit encapsulation casing and a special lead framework. The special lead framework comprises an outer frame 1 and leads 2, and forms a grid bar structure with a frame, wherein the leads 2 are grid bars; the outer ends of the leads 2 are connected with the outer frame, and the inner ends of the leads 2 are in one-to-one correspondence to bonding pads on a ceramic casing 4; after the inner ends of the leads 2 are connected with the bonding pads, the redundant part of the lead framework is cut and separated; and the inner ends of the leads 2 remain on the bonding pads to form bulges so as to form leading-out terminals. Owing to the structure, convenient and accurate positioning is ensured when the leads 2 are welded with the bonding pads, so that a welding die is simplified; and besides, the outer frame can be utilized to achieve direct rack plating, so that the manufacturing technique complexity of the fine-pitch casing is greatly reduced, the production efficiency is improved and the product yield and quality are improved.

The invention discloses a dual-encoding high-precision magnetic encoder and a motor comprising such encoder. The magnetic encoder comprises a first magnetic main body, a second magnetic main body, a first position sensor corresponding to the first magnetic main body, a second position sensor corresponding to the second magnetic main body and an integrated circuit board for processing output signals of the first position sensor and the second position sensor; the first magnetic main body comprises a plurality of N poles and S poles which are alternatively arranged to form a circle; the second magnetic main body comprises a pair of N pole and S pole arranged oppositely, the second magnetic main body is arranged at a center of the circle formed by the first magnetic main body and synchronously rotates with the first magnetic main body; and the number of magnetic pole pairs of the first magnetic main body is related to an A / D sampling digits of the second magnetic main body. According to the magnetic encoder provided by the invention, by arranging a center magnetic body and an excircle magnetic body, a dual-encoding structure is formed, thus, precision of the magnetic encoder is the product of sampling precision of two magnetic main bodies.

The invention belongs to the technical field of hybrid integrated circuits, and discloses a servo control circuit, a quartz flexible accelerometer based on the servo control circuit and a manufacturing method. The servo control circuit comprises a differential capacitance detector, a current integrator, an RC low-pass filter, a transconductance / compensation amplifier, a resistance-capacitance feedback network and a capacitor; the quartz flexible accelerometer comprises a connection quartz watch head and a servo assembly. The quartz watch head comprises a shell, a pendulous reed, a differentialcapacitance sensor and a torquer are arranged in the shell, the differential capacitance sensor and the torquer are coaxially arranged with the pendulous reed, the servo assembly comprises an outer shell, the outer shell is connected with the shell, a base plate is arranged between the outer shell and the shell, one side of the base plate is connected with the outer shell, and a servo control circuit and a cover plate covering the servo control circuit are arranged on the other side. The shell is provided with a first binding post and a plurality of second binding posts, the first binding post is electroplated with a gold layer, and the first binding post is in bonding connection with a thick film bonding pad connected with the capacitor through gold wires. The defect that an existing quartz flexible accelerometer is poor in anti-interference capacity is overcome, and the measurement precision of the quartz flexible accelerometer is improved.

The present invention relates to a communication antenna. The communication antenna comprises a first radiator and a second radiator. The first radiator includes a first substrate and a first radiation fin arranged on the first substrate; the second radiator includes a second substrate and a second radiation fin arranged on the second substrate; the first radiator has a first feed portion and a second feed portion; the second radiator has a third feed portion and a fourth feed portion; and the first radiator and the second radiator are arranged at the same installation surface, and the radiation surfaces of the first radiation fin and the second radiation fin are planes.

The invention relates to the technical field of ceramic materials, in particular to a porous conductive ceramic material for heating and a preparation method thereof. The porous conductive ceramic material comprises the following raw materials in parts by weight: 5-10 parts of ceramic powder, 1-5 parts of a binder, 0.5-2.5 parts of a pore forming agent, 20-30 parts of conductive bone meal, 5-10 parts of nanometer silicon powder, 10-20 parts of an organic carrier and 1-5 parts of an auxiliary conductive agent. According to the porous conductive ceramic material, the conductive mode of the porous ceramic material is used for replacing the conductive mode that the surface of a traditional ceramic material is coated with electronic paste, and a resistance heating wire or a printing heating circuit does not need to be additionally arranged; and when the porous conductive ceramic material prepared by the invention is used as a heating material of an electronic smoking set, a heating area is large, a heating surface is diversified and controllable, atomization is sufficient, the complex conductive mode of a traditional electronic smoking set heating material is changed, and the complexity of the preparation process of the heating material is reduced.

The invention discloses an optical multiplexer and an optical emitting device, and relates to the field of optical communication. At least one optical combiner capable of combining two light beams into one light beam is used to form a light combining component, and at least two stages of light combining components are formed. The optical multiplexer enables 2N beams of light to be combined into one beam through N-level light combining components, which reduces the packaging volume and packaging loss, and reduces the complexity of the manufacturing process.

The invention provides a visual absolute rotation angle measurement method and device, the device includes a CCD camera and a ring-shaped code disc, the middle part of the code disc is rotated by connecting a rotating shaft; the circular ring of the code disc is uniform There are n co-circular gray marks distributed, and the gray value of each gray mark corresponds to the n-level gray value set at uniform intervals in the gray value range of 0‑255 respectively; the CCD camera is arranged on the code disc Above, make its shooting field of view align with the gray mark, and at any time there is at least one complete gray mark in its shooting field of view. The measuring device of the present invention has absolute positioning capability and at the same time has extremely small rotation angle measurement resolution.

Disclosed is a method for manufacturing a dielectric isolation structure based on SOI and a dielectric isolation structure, the manufacturing method comprising: performing oxidation pretreatment on the upper surface of the top silicon of the SDB silicon wafer to obtain a silicon dioxide layer, and then depositing a silicon nitride layer; depositing a photoresist film on the silicon nitride layer, and using negative photoresist contact exposure; dry etching the silicon nitride layer, wet etching the silicon dioxide layer, and then deep trench etching; degumming; oxidation growth of 1.7-1.8μm thick silicon dioxide on the inner side wall of the groove formed by etching, the air pressure of the growth environment is greater than ten standard atmospheres; low-pressure chemical vapor deposition of polysilicon, and the polysilicon fills the groove formed by etching; surface flattening of the polysilicon; removing the silicon nitride layer, and then field oxidation. The manufacturing process of the present invention is low in complexity, the insulation performance between the high and low voltage areas of the dielectric isolation structure is good, and the breakdown voltage reaches more than 880V.

The present invention provides an enhanced Flash chip and a chip packaging method. The Flash chip includes: FLASH packaged together and a response protection monotone counter RPMC; each of the FLASH and the RPMC also includes a first internal IO pin pin and / or the second internal IO pin; the FLASH and / or RPMC is also provided with a jumper window, and one end of the jumper window is interconnected with the first internal IO pin of the FLASH and / or RPMC, The other end of the jumper window is interconnected with the first internal IO pin of the RPMC and / or FLASH; the second internal IO pin of the FLASH is interconnected with the second internal IO pin of the RPMC. The Flash chip provided by the invention effectively reduces design complexity and chip manufacturing cost, and avoids lead wire crossing in chip packaging, thereby improving the yield rate of chip packaging.

The invention belongs to the field of microelectronic technology, and discloses a two-dimensional material heterojunction memristor and a preparation method thereof. The memristor includes a substrate, a bottom electrode layer, and a two-dimensional material heterojunction layer from bottom to top And the top electrode layer, wherein, the two-dimensional material heterojunction layer is used as the intermediate dielectric layer, which is a two-layer laminated structure composed of two different metal sulfur compounds, and each layer in the laminated structure corresponds to one of the metal sulfur compounds. The present invention improves the key functional layer materials used in the device and the overall structure design of the device. Compared with the prior art, a new type of memristor is constructed entirely based on two-dimensional materials, which subverts the traditional MIM structure and has a lower The working voltage, fatigue resistance and cycle stability characteristics of the memristor; moreover, the memristor shows a high degree of similarity to the synapse transmission information in the simulated neuron transmission information, and has great application in the development of brain-like structures in the future prospect.

The invention provides a super-junction fast-recovery planar gate silicon carbide VDMOS and a preparation method thereof, metal is deposited on the lower side surface of a silicon carbide substrate to form a drain metal layer, and a drift layer is formed on the upper side surface of the silicon carbide substrate through epitaxial growth; forming a barrier layer, etching, performing ion implantation, and forming a diffusion region, a follow current region and an N-type source region; re-forming a barrier layer, etching the barrier layer to form a through hole, and depositing to form a gate dielectric layer; a barrier layer is formed again, the barrier layer is etched to form a through hole, metal is deposited, and a gate metal layer is formed; the preparation method comprises the following steps: re-forming a barrier layer, etching the barrier layer to form a through hole, depositing metal, forming a source metal layer, removing the barrier layer, and completing preparation, so that a super junction structure constructed by a P-type diffusion region and an N-type current sharing region is constructed in the device, the voltage endurance capability of the device can be effectively improved under the conditions of fixed thickness and area, and a Schottky diode is constructed; the reverse recovery time of the device can be effectively reduced, and fast recovery is realized.

The invention discloses a TSV-based accumulation type MOS varactor diode, which includes a P-type silicon substrate, and a through hole is opened on the silicon substrate, and a metal column and a dielectric layer are sequentially arranged in the through hole from the inside to the outside, and the metal column leads out There is a terminal a, a P-type doped region is set between the dielectric layer near the end of the through hole and the silicon substrate, and a terminal b is drawn out from the end surface of the P-type doped region. The invention also discloses a preparation method of the accumulation type MOS varactor diode based on TSV. Compared with the planar accumulation type MOS varactor diode, the accumulation type MOS varactor diode of the present invention has higher quality factor and lower Parasitic resistance, lower phase noise and better tuning linearity.

The invention discloses a method for manufacturing a vertical double-gate MOS device. The method includes: A. forming an N-P-N structure by ion implantation technology on the top silicon surface of an SOI substrate, wherein the N region is highly doped and the P region is low doped; B. Using electron beam exposure and ICP etching methods to form a vertical deep groove at the interface between the N region and the P region of the formed N-P-N structure; C. Using thermal oxidation technology to form a layer of oxidation on the top silicon surface forming the vertical deep groove Silicon; D. Using low-pressure chemical vapor deposition technology combined with tetraethyl orthosilicate TEOS source to fill the vertical deep groove with silicon oxide; E. Perform photolithography on the surface of the filled silicon oxide, and corrode the silicon oxide to expose the N region and the P region ; F, evaporating metal on the surface of the exposed N region and P region, and forming electrodes by photolithography and etching. The invention realizes the high-speed transmission of information in the optical communication and inside the chip system.

The invention provides a full-on-chip integrated three-axis multiplexing silicon optical gyroscope, which is characterized by comprising an X sensitive axis silicon-based silicon nitride double-layer waveguide ring 1, a Y sensitive axis silicon-based silicon nitride double-layer waveguide ring 2; a multifunctional integrated photon chip 3; a semiconductor chilling plate (TEC) 4; an ASIC circuit (5); an X sensitive axis waveguide ring photon lead 6; the X sensitive axis silicon-based silicon nitride double-layer waveguide ring 1 is connected with the multifunctional integrated photon chip 3 through the photon lead wire 6; the Y-sensitive axis silicon-based silicon nitride double-layer waveguide ring 2 is connected with the multifunctional integrated photon chip 3 through a photon lead 7; and the ASIC circuit 5 and the TEC 4 are connected with the multifunctional integrated photon chip 3 through a photoelectric co-packaging technology.

The invention belongs to the field of machinery, and particularly relates to a side edge rubber buckling chain belt. The side edge rubber buckling chain belt comprises a conveying belt, a driving chain and a chain connecting conveying belt piece, the conveying belt comprises a fixed chain link shaft rubber belt or a fixed annular chain rubber belt, the driving chain comprises a roller chain or an annular chain, the roller chain comprises a chain buckling wheel shaft, the chain connecting conveying belt piece comprises a fixed buckle chain wheel shaft piece or a connecting annular chain piece, the fixed buckle chain wheel shaft piece connects a buckle chain wheel shaft and a fixed chain link shaft adhesive tape to form a side edge shaft belt, the fixed buckle chain wheel shaft piece and the buckle chain wheel shaft are connected in a split mode or in an integrated mode, the side edge of the fixed chain link shaft adhesive tape is provided with a fixed chain link shaft through hole, or a fixed chain link shaft sewing edge, or a fixed chain link shaft buckling edge, or a fixed chain link shaft side edge folding belt, or a fixed chain link shaft side edge steel wire belt, or a fixed chain link shaft side edge strong adhesive tape, or a fixed chain link shaft zipper, the buckle chain wheel shaft comprises a buckle chain wheel rack and a side edge belt buckling piece, and the buckle chain wheel rack and the side edge belt buckling piece are connected in a split or integrated mode.

This invention relates to the field of building materials technology, and more specifically, to a high-fluidity, micro-expansion multi-solid waste grouting repair material and its preparation process, comprising a cementitious material system, composite solid waste admixture, aggregate, water, and water-reducing agent, characterized in that it is composed of the following components by weight: 48-60 parts of the cementitious material system, which is compounded from 42.5 ordinary Portland cement, 42.5 composite Portland cement, and 42.5R rapid-hardening sulfoaluminate cement in a ratio of (20-60)%: (20-60)%: (5-15)%; 12-20 parts of the composite solid waste admixture, including... The material is composed of lithium slag powder, metakaolin, titanium slag powder, limestone powder, and steel slag powder, with a mass ratio of (20-40)%: (10-20)%: (17-25)%: (10-18)%: (10-23)%; 18-25 parts of aggregate, including continuously graded sand (0-4.75mm) composed of spherical steel slag sand and titanium slag aggregate; 17-23 parts of water; and 0.2-0.5 parts of water-reducing agent. This invention solves the problems of insufficient early strength, high cost, large loss of fluidity, and dependence on admixtures for expansion in existing grouting repair materials.

The invention discloses a light emitting diode structure and a method for manufacturing thereof. The method for manufacturing the light emitting diode structure comprises the following steps: providing a transparent substrate, wherein the transparent substrate comprising a first surface and an opposite second surface; forming a light emitting structure on the first surface; performing thinning processing on the second surface of the transparent substrate so as to reduce thickness of the transparent substrate; performing planarization processing on the second surface after the thinning processing; and forming a metal mirror covering the second surface which is processed by the planarization processing.

The invention provides an epitaxial channel field effect transistor device and a preparation method thereof. The preparation method comprises the following steps: sequentially forming a first sacrificial layer, a second sacrificial layer and a third sacrificial layer on a substrate; forming a dummy gate groove and a channel; etching part of the third sacrificial layer and all the second sacrificial layer; forming a control gate; removing the third sacrificial layer; forming a first side wall, a source electrode, a source electrode metal interconnection and a source electrode isolation layer; removing the substrate and the first sacrificial layer; and forming a second side wall, a drain electrode, drain electrode metal interconnection and a drain electrode isolation layer. The gate length of the transistor is accurately defined through the growth thickness of the second sacrificial layer, and the channel is protected from being influenced by the subsequent process through the first sacrificial layer and the third sacrificial layer, so that the accurate control of the channel length is realized, and the process deviation in the preparation process of the vertical field effect transistor is effectively reduced, thereby reducing the process complexity and simultaneously improving the production efficiency of the vertical field effect transistor. The device performance of the field effect transistor is ensured, and the problems that an existing vertical field effect transistor is poor in device performance and complex in preparation process are solved.