A
high pressure, high
throughput, single
wafer,
semiconductor processing reactor is disclosed which is capable of
thermal CVD,
plasma-enhanced CVD,
plasma-assisted etchback,
plasma self-cleaning, and deposition
topography modification by
sputtering, either separately or as part of in-situ multiple step
processing. The reactor includes cooperating arrays of interdigitated
susceptor and
wafer support fingers which collectively remove the
wafer from a
robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas
inlet manifold, then return the wafer to the blade. A combined RF / gas feed-through device protects against process gas leaks and applies RF energy to the gas
inlet manifold without internal breakdown or deposition of the gas. The gas
inlet manifold is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and
decomposition and deposition on the external surface. The reactor also incorporates a uniform radial pumping gas
system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust gases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform
processing over a wide range of pressures including very high pressures. A low temperature CVD process for forming a highly conformal layer of
silicon dioxide is also disclosed. The process uses very high
chamber pressure and low temperature, and TEOS and
ozone reactants. The low temperature CVD
silicon dioxide deposition step is particularly useful for planarizing underlying stepped
dielectric layers, either alone or in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized
silicon dioxide layer uses (1)
high rate silicon dioxide deposition at a low temperature and
high pressure followed by (2) the deposition of the conformal
silicon dioxide layer also at
high pressure and low temperature, followed by (3) a
high rate isotropic etch, preferably at low temperature and high pressure in the sane reactor used for the two
oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.