The invention provides a long bit width time sequence accumulation multiplying unit, which comprises a clock, a data operation module and a carry register, wherein the data operation module carries out operation on data to finish various types of work; a full adder is arranged in the data operation module; the full adder segments products obtained by accumulation, and multiplicands into different intervals according to bit width, the bit widths of full adders in different intervals are subjected to addition calculation when the data operation module enters an accumulation working state, and carry information is stored in the carry register; and when a next clock edge comes, the product of the shifted multiplicand and carry data of a previous level is accumulated to generate a new product and carry data, the new product and carry data can be stored in the carry register, and circulation is carried out in the above way until data in a multiplier is completely shifted. The data bit width calculated by the multiplying unit can be infinitely increased so as to get rid of limitation, which is caused by the multiplication data bit width, for the maximum work clock frequency of the multiplying unit, and the multiplying unit can stably work under extremely high clock frequency.