239 results about "Cascade circuits" patented technology

An arrangement with a control circuit for controlling a numerical value for patient respiration as well as to a process for controlling the numerical value. The numerical value is controlled on the basis of an evaluation of the EEG (electroencephalogram) of the patient (1) by an EEG sensor (2), e.g., by determining the so-called BIS (bispectral index). A control of the inspiratory gaseous anesthetic concentrations is cascaded to the control of the EEG value in the manner of a cascade circuit. This has the advantage that a metering device (6) belonging to the arrangement meters a gaseous anesthetic mixture directly according to the patient's needs. As an alternative, the control of the numerical value is performed on the basis of an evaluation of the expiratory gaseous anesthetic concentrations resolved for individual breaths at the Y-piece (19) of the respiration circuit (12) by a gaseous anesthetic sensor (8a), preferably an infrared optical gas sensor.

The invention relates to a capacitive micro-accelerometer which adopts the design of a bulk-silicon processed micro-mechanical structure and the design of an integrated circuit, which pertains to the field of MEMS micro-inertial instruments. The capacitive micro-accelerometer adopts two chips of a micro-mechanical sensor and a signal processing circuit for respective integration, the capacitive micro-accelerometer is carried out by the overall packaging and finally realizes an internal structure of the packaged system; the micro-mechanical sensor of the invention adopts a full-differential micro-mechanical structure sensitive element to be matched with a follow-up circuit; the signal processing circuit comprises a full-differential switched capacitor charge amplifier front-end circuit module with adjustable gain, a back-end cascade circuit module which is composed of a first-order switched capacitor low-pass filter and an instrument amplifier and an auxiliary circuit module which is composed of a reference voltage and bias current generating circuit, a self-test circuit and a clock generating circuit. The two-chip proposal of the system of the invention carries out the respective integration and overall packaging, thus simplifying the complexity of the system, reducing the processing cost and the difficulty and improving the performance and the yield.

A differential cascode amplifier has first and second cascode circuits, driven by two differential signal sources including input resistances.The first cascode circuit includes a first input transistor having a first collector, a first emitter, and a first base, and a first output transistor having a second collector, a second base, and a second emitter coupled to the first collector. The second cascode circuit includes a second input transistor having a third collector, a third emitter, and a third base, and a second output transistor having a fourth collector, a fourth base, and a fourth emitter coupled to the third collector. The amplifier has a first connection connecting the first base to the fourth base, and a second connection connecting the second base to the third base.This cross-connected differential cascode architecture provides doubled output bandwidth and current gain (in dB), further increasing input impedance and output swing.

An improved refrigerant system incorporates at least two circuits arranged in a cascaded relationship. Preferably, the upper circuit utilizes a hydrocarbon refrigerant and preferably the lower circuit utilizes CO2 refrigerant. Preferably, the CO2 cascaded circuit mainly operates in a subcritical region. To improve the efficiency and capacity control of the cascaded refrigerant system, at least one of the circuits is equipped with performance enhancement features such as, for example, an economized function provided by a flash tank or economizer heat exchanger. Additional enhancement features can also include a liquid-suction heat exchanger and bypass function.

The invention discloses an energy storage capacitor-based cascaded inverter circuit. The energy storage capacitor-based cascaded inverter circuit consists of an asymmetrical three-level circuit and an H bridge circuit, which are cascaded, wherein the voltage output points of the asymmetrical three-level and the H bridge circuit are modulated through a switching device, and then are connected. The energy storage capacitor-based cascaded inverter circuit is characterized in that the asymmetrical three-level circuit is connected with a direct current power supply; the H bridge circuit is connected with an energy storage capacitor; and the output of the inverter circuit is the superposition of the output of the two cascaded circuits, and multi-level output can be realized by different modulation methods. Therefore, in a certain operating mode, a flying capacitor can transfer a part of electric energy of the direct current power supply into the energy storage capacitor for storage; and when a load is in a reactive state, electric energy absorbed by the direct current power supply is partially or totally transferred into the energy storage capacitor for storage.