22 results about "Electron drift" patented technology

The invention provides a construction method and system of a non-reciprocal emission / absorption device with a Fizeau dragging effect. The construction method comprises the following steps: selecting a metal substrate, a dielectric grating and a two-dimensional material; applying a bias voltage in the x-axis direction to the two-dimensional material layer to generate a Fizeau dragging effect; the bias voltage is adjusted under TM polarization, so that the electron drift speed is close to the Fermi speed, asymmetric surface plasmon resonance is excited, and unequal emissivity and absorptivity are achieved; an adjustable singular point is generated in an angle-frequency space by adjusting the filling ratio of the grating, so that the numbers of spectral formants of emissivity and absorptivity near the singular point are different, and the wavelength integral nonreciprocity intensity is improved. The non-reciprocal heat radiation characteristic can be realized through voltage regulation and control without an external magnetic field.

Disclosed are a power semiconductor device and a preparation method thereof, which belongs to the field of power semiconductor devices. By introducing a punch-through triode structure for electron extraction in a drift region, the frontside hole injection efficiency is reduced, and hole currents from emitters are converted into electron drift currents without significantly increasing on-state voltage drop. In addition, by changing the density and topography of a frontside trench, the adjustment of punch-through area and position is achieved, which in turn changes the electron extraction and frontside hole injection efficiency. The disclosed method increases the design flexibility and design dimension of the device.

The application provides a semiconductor laser element with a topological phonon state layer, comprising, from bottom to top, a substrate, a lower limiting layer, a lower waveguide layer, an active layer, an upper waveguide layer and an upper limiting layer. The application is characterized in that a topological phonon state layer with a multilayer structure is arranged between the lower waveguide layer and the lower limiting layer of the semiconductor laser element, and the saturation electron drift velocity distribution characteristics, the electron affinity energy distribution characteristics and the polarized optical phonon energy distribution characteristics of each layer of the topological phonon state layer are designed, so that the topological quantum state and the topological phase change of the phonon spectrum can be adjusted, the quantum state and the lattice vibration mode can be changed, the Stokes shift loss of the difference between the photon energy of the pump light and the oscillation light can be reduced, and the thermal stress and the temperature quenching problem of the laser can be inhibited.

The application belongs to the technical field of spintronics, and specifically forms a vortex of electron drift velocity at the interface of a magnetic layer and a metal layer by a difference in conductivity, further utilizes a spin vortex coupling effect to realize conversion of charge current to spin current, and thereby drives a magnetic moment to flip through a spin-orbit moment. As an example, the application deposits a Cu layer with high conductivity on a PtCo alloy layer with lower conductivity through magnetron sputtering, and constructs a heterostructure with a PtCo / Cu interface spin vortex coupling effect. By increasing the thickness of the Cu layer to improve the conductivity of the Cu layer, a significant improvement in the orbital moment efficiency can be observed. Not only does this provide valuable experimental evidence for in-depth understanding of the physical mechanism of interface-induced spin current, but also enriches the conversion approach between charge current and spin current, and opens up a simple and efficient new path for the research and design of a new generation of spintronic devices.

The application provides a gallium oxide device and a preparation method thereof, and the device comprises a Schottky device, an insulating high-thermal-conductivity layer and a heat dissipation substrate; the Schottky device comprises a substrate, an epitaxial layer, a dielectric layer, a Schottky contact metal layer, an ohmic contact metal layer and an electrode pin; the insulating high-thermal-conductivity layer is arranged on both sides of the electrode pin; and the heat dissipation substrate is connected with the electrode pin in the Schottky device through a soldering pad. The gallium oxide device provided by the application is covered with the insulating high-thermal-conductivity layer material on the electrode and the functional area of the device, and the device is connected on the packaging heat dissipation substrate in an inverted manner, and the external circuit is realized through the heat dissipation substrate. The heat dissipation capacity of the device is improved, the influence of temperature on the electron drift is reduced, the heat generated by the gallium oxide device is timely dissipated, the temperature of the device itself is reduced, and the voltage resistance performance, reliability and working stability of the gallium oxide device are improved.

The present invention provides a semiconductor structure comprising: a silicon substrate in [100] orientation; a scandium oxide layer over the substrate, in [111] orientation; and a scandium-rare earth-oxide layer over the scandium oxide layer. The scandium-rare earth-oxide layer can have a graded composition to transition lattice constant to match to a subsequent layer, such as an indium nitride layer having very high electron drift velocity. InN over Si (100) offers transistors, photonics and passive electronics that operate in the terahertz frequency range.

This invention discloses a method for measuring the electron drift velocity of a group III nitride heterostructure in multiple physical environments, belonging to the field of semiconductor technology. The method first forms an H-shaped channel in the group III nitride heterostructure and symmetrically prepares rectangular test electrodes on both sides of the channel to obtain the sample to be tested. Then, the sample is placed in one or more physical environments and connected to a test circuit. A voltage is applied to the test electrodes, and the current flowing through the H-shaped channel is measured to obtain the electron drift velocity v. The variation of the electron drift velocity v with the electric field E under external physical environments such as temperature field, light field, magnetic field, and different gas atmospheres is obtained. Measuring the 2DEG electron drift velocity in a group III nitride heterostructure under different physical fields is of great significance for comprehensively evaluating and optimizing the performance of group III nitride devices, providing guidance for device design and optimization.

The present invention discloses a method, apparatus, terminal device, and storage medium for evaluating the dielectric strength of a binary gas mixture. The method comprises: obtaining the gas content, electron drift velocity, and average electron energy of each pure gas in the binary gas mixture under different reduced electric fields; solving the net effective ionization rate function of the mixed gas to obtain the common average electron energy corresponding to when the net effective ionization rate crosses zero; determining the electron drift velocity and corresponding reduced electric field strength of each pure gas under the common average electron energy; substituting the gas content, electron drift velocity, and corresponding reduced electric field strength of each pure gas into a preset reduced electric field strength function expression to determine the corresponding critical reduced field strength; and evaluating the dielectric strength of the mixed gas based on the critical reduced field strength. By implementing the present invention, the dielectric strength of a binary gas mixture can be evaluated.

The invention discloses a SiC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device integrated with a punch-through NPN (Negative-Positive-Negative) diode, which is characterized in that an NPN punch-through JFET (Junction Field Effect Transistor) region is used as a reverse through-flow path, and on the premise of ensuring the reliability of a grid electrode of the device and relatively low specific on-resistance, the conduction voltage drop of reverse through-flow is further reduced, the conduction of a body diode is inhibited, and the switching loss is reduced by reducing reverse recovery charges. Compared with a traditional JFET structure, through a punch-through type breakdown electric field, the electron drift rate is increased, meanwhile, the reverse current path is increased, and the reverse flow capacity is improved. According to the invention, the bipolar degradation of the device can be effectively prevented, the reverse recovery charge is obviously reduced, the reverse through-current capability is enhanced, the switching speed is greatly improved, and the switching loss is reduced.

The invention relates to an electric imaging system, in particular to a large-dynamic-range time amplification framing imaging system, and solves the technical problems that an existing traveling wave gating framing image converter tube is limited by the electron transit time extension effect of a micro-channel plate, the time resolution can only reach 60 ps at most, and the laser driving fusion diagnosis requirement cannot be met. The system comprises a vacuum container, an optical input window, a traveling wave gating framing tube, a photoelectric cathode, a grid mesh, a coil and a power supply module, the first coil, the second coil and the third coil form an electron emission magnetic field, an electron drift magnetic field and an electron receiving magnetic field after being electrified, the magnetic field intensity of the electron emission magnetic field and the magnetic field intensity of the electron receiving magnetic field are both larger than the magnetic field intensity of the electron drift magnetic field, and the electron emission magnetic field is used for conducting spatial position constraint on the photoelectron group emission process. The electron drift magnetic field is used for carrying out spatial position constraint on the photoelectron group drift process, and the electron receiving magnetic field is used for carrying out spatial position constraint on the photoelectron group imaging process.

The invention provides a single-photon avalanche diode and a preparation method thereof, and a photoelectric detector, and the single-photon avalanche diode comprises an N-type substrate layer which is provided with a light incident side and a backlight side; the device structure layer is embedded in the N-type substrate layer; the device structure layer comprises an N-type doped avalanche multiplication region and a P-type heavily-doped light absorption region which are sequentially arranged in the direction from the light incident side to the backlight side, and the N-type doped avalanche multiplication region surrounds the P-type heavily-doped light absorption region. Holes of the P-type heavily-doped light absorption region can be quickly relaxed by dielectric, and after electrons drifting to the N-type doped avalanche multiplication region generate electrons and holes after an avalanche multiplication effect occurs, the generated holes can be quickly relaxed by dielectric after drifting back to the P-type heavily-doped light absorption region. And the problem that the response rate of the device is limited due to the fact that the hole mobility of the semiconductor material is lower than the electron mobility can be solved.

The invention discloses a light-emitting diode epitaxial wafer with a double-gradient electron limiting layer and a preparation method of the light-emitting diode epitaxial wafer. According to the epitaxial wafer, an electron limiting layer composed of three n-type AlGaN sub-layers is arranged between an n-type GaN layer and an active layer. The average Al component and Si doping concentration between the sub-layers are increased in a stepped manner, and the Al component and the Si in each sub-layer are increased in a continuous gradient manner along the growth direction. According to the invention, the Al component gradient is utilized to construct an electron deceleration barrier, the electron drift speed is reduced, and the carrier capture probability is improved; the Si concentration gradient is matched to compensate the resistivity rise and the DX center effect caused by the high Al component, the increase of the working voltage is avoided, meanwhile, the structure can induce dislocation bending, and the crystal quality of the epitaxial layer is remarkably improved.

This invention proposes a gallium nitride-based semiconductor laser with a gradient peak rate electric field waveguide layer. The fitting curves of the In ion intensity distribution or In atom concentration distribution, the fitting curve of the peak rate electric field distribution, and the fitting curve of the saturated electron drift velocity distribution obtained from SIMS testing of the upper and lower waveguide layers with the gradient peak rate electric field all satisfy any one of the Logistic function, Logistic 5 function, or Nelder function, forming a high electric field barrier. Electrons transporting from the active region to the p-type layer must overcome this barrier height, suppressing electron leakage from the active region to the p-type layer. The low electric field matches the low-velocity transport of holes, avoiding enhanced hole scattering. High injection efficiency allows carriers in the active region to quickly reach the stimulated emission threshold. The saturated electron drift velocity gradually decreases from high to low, and the low saturated electron drift velocity on the active region side avoids punch-through leakage caused by high-speed electrons rushing through the active region.

The invention relates to the technical field of radio navigation, and discloses an AI optimization indoor distribution unit electrical element integration system for 5G and Beidou fusion positioning, which comprises a main working path, a static calibration reference path and a signal sampling module, according to the system, internal electron drift is calibrated by comparing signal differences between a main working path and a static calibration reference path, additional phase drift introduced by external environment coupling is compensated by analyzing reflected signals of an antenna port, and then the two drifts are superposed to generate a full-link compensation instruction to pre-adjust the signals. According to the invention, internal electronic calibration and external physical environment perception are combined, and an end-to-end calibration closed loop from an electronic link to a physical transmitting aperture is constructed, so that the system can actively adapt to dynamic change of a deployment environment, and a communication unit is converted into a navigation reference point with reliable space-time reference.

The invention provides a block-type irresistible cathode silicon drift detector, which adopts a block-type irresistible cathode, expands outwards in a spiral irresistible manner, increases the length of each circle and widens the width at the same time, and retains the autonomous voltage division characteristic of the whole spiral ring, so that the whole detector is formed by combining a plurality of blocks. Each block can independently regulate and control the cathode potential, so that uniform and non-interfering independent transverse electric field distribution is formed, electron drift path distortion is effectively reduced, a variant is designed, a center collection anode is optimized into a distributed anode array surrounding the whole perimeter of the detector, and the detection efficiency is improved. According to the design, the large-area SDD can provide accurate position resolution through multi-channel signal acquisition reading and position analysis.

This invention proposes a nitride semiconductor light-emitting diode (LED), comprising, from bottom to top, a substrate, an n-type semiconductor, a quantum well, and a p-type semiconductor. The quantum well is a periodic structure composed of a well layer and a barrier layer. A p-type contact layer is disposed above the p-type semiconductor. The p-type contact layer exhibits saturated electron drift velocity distribution characteristics, effective light hole mass distribution characteristics, deformation potential distribution characteristics, and polarized optical phonon energy distribution characteristics. This invention can enhance hole transport and conduction in the p-type contact layer, improve the lateral and longitudinal expansion capabilities of holes in the p-type contact layer, and improve the surge capability and human body mode electrostatic discharge (HBD) immunity of the LED. The HBD immunity is improved from a pass rate of over 90% for 100–200V to over 90% for 200–500V.

This invention discloses a method, apparatus, and dielectric for extracting parameters from a GaN HEMT source-drain channel region resistance model, belonging to the field of power device technology. The method includes: dividing the GaN HEMT source-drain channel region resistance model parameters into blocks to obtain the fitting parameters to be extracted; wherein the fitting parameters include c1, c2, λ, and γ; and calculating the source-drain channel region resistance R under low bias conditions based on the known structural parameters of the device. D0,S0 Static I-V testing was performed on GaN HEMTs, and the results were obtained through static I-V testing. DS -V DS The fitting parameters c1 and c2 are obtained by extracting the output characteristic curves; the electron drift velocity v in the source-drain channel region is used to obtain the fitting parameters c1 and c2. acc -V DS The curves are extracted to obtain the fitting parameters λ and γ. This invention can quickly and accurately extract the relevant fitting parameters of the GaN HEMT source-drain channel region resistance model, improving the efficiency of GaN HEMT source-drain channel region resistance modeling.

The invention discloses an S-band transit time oscillator and a method thereof, and belongs to the technical field of high-power microwave devices. Comprising an anode structure, an annular cathode and an output circular waveguide, the anode structure is a wheel-shaped metamaterial unit array which is coaxially arranged up and down, an electron drift channel and three electromagnetic regulation and control cavities are formed through unit arrangement, and the drift channel among the cavities is in a cut-off state for working electromagnetic waves and is coupled only through bunching electrons; the annular cathode and the anode are vertically arranged to generate radial current, a cut-off cavity is arranged at a cathode port, the output circular waveguide is connected with the electromagnetic regulation and control cavity to form a single port, a TM01 mode is radiated, and the maximum size is smaller than the wavelength of the mode. An external magnetic field is not needed, the output power can reach 1.03 GW under the external 460kV voltage and 2.8 kA current, the highest conversion efficiency is 80%, the device compactness is high, light and small equipment is adapted, and the problems that traditional dual-port deployment is difficult and the size is large are solved.

The invention provides a semiconductor laser element with a topological phonon state layer. The semiconductor laser element comprises a substrate, a lower limiting layer, a lower waveguide layer, an active layer, an upper waveguide layer and an upper limiting layer which are sequentially arranged from bottom to top. According to the semiconductor laser element, the topological phonon state layers of a multi-layer structure are arranged between the lower waveguide layer and the lower limiting layer of the semiconductor laser element, and the saturated electron drift rate distribution characteristic, the electron affinity distribution characteristic and the polarized optical phonon energy distribution characteristic of each topological phonon state layer are designed; according to the invention, the topological quantum state and the topological phase change of the phonon spectrum can be adjusted, the quantum state and the lattice vibration mode can be changed, the Stokes frequency shift loss of the photon energy difference between the pump light and the oscillation light can be reduced, and the thermal stress and temperature quenching problems of the laser can be inhibited.

The invention relates to the technical field of semiconductor photoelectric devices, in particular to a nitride semiconductor laser element which sequentially comprises a substrate, a lower coating layer, a lower waveguide layer, an active layer, an upper waveguide layer, an electron blocking layer and an upper coating layer from bottom to top, and is characterized in that the lower waveguide layer is the lower waveguide layer; the lower waveguide layer is any one or any combination of InGaN, GaN, InN, AlInGaN, an InGaN / GaN superlattice, an InGaN / AlGaN superlattice, an InGaN / AlGaN superlattice, an InGaN / AlInN superlattice and an InGaN / AlInGaN superlattice; the peak rate electric field distribution of the lower waveguide layer is arc-shaped distribution; the peak rate electric field distribution of the lower waveguide layer has a function y = logax (a is greater than 1) curve distribution; the saturated electron drift rate distribution of the lower waveguide layer has arc-shaped distribution; the saturated electron drift rate distribution of the lower waveguide layer has a function y = x-b (b is greater than an odd number of 1) third quadrant curve distribution; the valence band effective state density distribution of the lower waveguide layer has a function y = (cx + 1) / (cx-1) (c > 1) third quadrant curve distribution.

The present invention discloses a small pixel array detector with a Schottky floating electrode, relating to the field of semiconductor device technology. The detector comprises a detector body, wherein an anode and a floating electrode are provided on the top surface of the detector body, and a cathode is provided on the bottom surface of the detector body. The anode is an array pixel electrode. The floating electrode comprises an edge grid, a common grid, and a guard ring. The edge grid is positioned around the array pixel electrode, the guard ring is positioned around each pixel electrode in the array, and the common grid is positioned between each guard ring. The small pixel array detector with a Schottky floating electrode proposed in the present invention can effectively prevent carriers from being collected by metal electrodes other than the anode pixel electrode, thereby reducing charge loss. Moreover, unlike conventional guard ring electrode structures, the Schottky floating electrode structure can form a surface transverse electric field without applying pressure, thereby reducing carrier injection, promoting electron drift toward the anode pixel electrode, and improving charge collection efficiency.

A detection device for detecting radiation includes a container including a first portion, a second portion facing the first portion in a first direction, and a side portion extending from the first portion toward the second portion. A gas is contained in the container. An electron detector located inside the container detects an electron generated by Compton scattering. A drift electrode is located inside the container closer to the second portion than the electron detector and facing the electron detector. A radiation detector is located closer to the second portion than the drift electrode, and detects scattered radiation. The container contains plastic that allows radiation to pass through, or metal that allows radiation to pass through.