The present invention provides an array substrate, the peripheral circuit area of which includes a peripheral region substrate, a peripheral region TFT layer, a peripheral region passivation layer, a color resist layer, a peripheral region PFA layer, and a connecting line layer arranged in sequence from bottom to top. The resistance layer is provided with a first via hole, and the PFA layer in the peripheral area is correspondingly provided with a second via hole in the first via hole, and the hole wall of the second via hole belongs to the PFA layer in the peripheral area, and the peripheral area The passivation layer is correspondingly provided with a third via hole connected to the second via hole under the second via hole, and the corresponding second via hole and the third via hole together form a transfer via hole, and the connecting line The layer is in contact with the TFT layer in the peripheral area through the transfer via hole, and the color resistance layer is set between the passivation layer in the peripheral area and the PFA layer in the peripheral area, and the via hole for transfer in the PFA layer in the peripheral area is set in the color In the barrier layer, the adhesion of the PFA layer in the peripheral area can be improved, and the risk of peeling off of the PFA layer in the peripheral area can be reduced, thereby improving the yield of PFA products.