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29 results about "Ferroelectric semiconductors" patented technology

Ferroelectric semiconductor devices and methods of fabricating thereof

Described herein is a method of fabricating a ferroelectric material, comprising the steps of: providing a semiconductor substrate; treating the semiconductor substrate with an oxidant to form an oxidized surface; depositing a metal on top of the oxidized surface to provide a film; and annealing the film at a temperature between 700°C and 900°C, thereby forming a metal oxide layer on top of the semiconductor substrate, wherein the interface between the semiconductor substrate and the metal oxide layer does not contain any remnant oxidized surface, and a ferroelectric material and a ferroelectric transistor or capacitor comprising said ferroelectric material.
Owner:YALE UNIVERSITY

Self-rectifying ferroelectric memristor based on ferroelectric out-of-plane polarization and preparation method thereof

The application discloses a self-rectifying ferroelectric memristor based on ferroelectric out-of-plane polarization and a preparation method thereof. The memristor is vertically structured from top to bottom as an upper electrode layer, a ferroelectric layer and a semiconductor layer. The ferroelectric layer is a ferroelectric semiconductor with out-of-plane ferroelectric polarization. The out-of-plane polarization direction of the ferroelectric layer is perpendicular to the upper electrode layer / ferroelectric layer interface and the ferroelectric layer / semiconductor layer interface at the same time. Two contact surfaces form an asymmetric potential barrier. The out-of-plane polarization state of the ferroelectric layer is changed by an external voltage, thereby changing the potential barrier height of the two contact surfaces and the carrier transport characteristics of the semiconductor layer, and further achieving the regulation function of the conductive state of the memristor. The on-current of the memristor is measured by a peripheral circuit as a storage value. The application realizes the switching of high resistance and low resistance and the rectification characteristic by using the change of the contact potential barrier of the ferroelectric layer and the silicon interface in the polarization reversal process. The memristor has simple structure, is easy to integrate and has low power consumption.
Owner:ZHEJIANG UNIV

Ferroelectric semiconductor floating gate transistor and preparation method thereof

PendingCN122073835ACondensed matter physicsFerroelectric semiconductors
The invention provides a ferroelectric semiconductor floating gate transistor. The ferroelectric semiconductor floating gate transistor sequentially comprises a floating gate layer, a tunneling layer and a channel layer from bottom to top, wherein the channel layer is made of a ferroelectric semiconductor material. The invention also provides a method for preparing the ferroelectric semiconductor floating gate transistor. The ferroelectric semiconductor floating gate transistor provided by the invention can realize multi-valued storage, and has reconfigurable three-terminal and two-terminal operation modes. In addition, the ferroelectric semiconductor floating gate transistor can also realize floating gate adjustable ferroelectric resistance change (FRS) and three-valued logic of optical and electric pulse mixed input, so that the function of the device is further expanded, and the ferroelectric semiconductor floating gate transistor is expected to be applied to memristors and memory logic.
Owner:INSTITUTE OF PHYSICS CHINESE ACADEMY OF SCIENCES

Two-dimensional germanium-based perovskite ferroelectric semiconductor materials, methods of preparation, and applications thereof

PendingCN122277418AExcellent physical and chemical propertiesExcellent semiconductor propertiesCrystallographySemiconductor materials
This application discloses a two-dimensional germanium-based perovskite ferroelectric semiconductor material, its preparation method, and its applications, belonging to the field of materials science. The molecular formula of the two-dimensional germanium-based perovskite ferroelectric semiconductor material is [CH3(CH2)]. n The molecule is NH3]2CsGe2I7, where n = 2, 3, or 4. This material possesses excellent physicochemical properties, such as semiconductor characteristics, ferroelectricity, and piezoelectricity. The preparation method of this invention allows for the preparation of this material using a simple solution method at low cost. This material has potential applications in ferroelectric, optoelectronic, and other fields.
Owner:MINDU INNOVATION LAB

Ferroelectric / semiconductor heterojunction-based photoelectric detector and preparation method thereof

The invention belongs to the technical field of photoelectric detectors, discloses a photoelectric detector based on ferroelectric / semiconductor heterojunction and a preparation method thereof, and solves the problems of limited carrier separation efficiency, complex device structure, insufficient interface regulation and control means and the like in the photoelectric detector. The photoelectric detector comprises a substrate, a planar electrode pair arranged on the surface of the substrate, and a two-dimensional heterojunction active layer which covers and is attached to the planar electrode pair and a channel region between the planar electrode pair; wherein the two-dimensional heterojunction active layer is formed by vertically stacking a CuInP2S6 thin film and a GeSe thin film in sequence. By constructing a Van der Waals heterojunction active layer and utilizing a built-in electric field formed on a heterojunction interface by ferroelectric polarization, the generation, separation and transmission processes of photon-generated carriers are effectively regulated and controlled, so that the photoelectric detection performance of the device is improved on the premise of not introducing a complex process.
Owner:HENAN INST OF ENG

Heterogeneous phototransistor based on double ferroelectric layers and preparation method and application thereof

ActiveCN121013425AHeterojunctionIndium
The invention provides a heterogeneous phototransistor based on double ferroelectric layers and a preparation method and application of the heterogeneous phototransistor, and belongs to the technical field of high-performance sensing and sensing, storage and calculation integration. The heterogeneous phototransistor comprises a bottom gate substrate, a bottom gate dielectric layer and a heterostructure which is sequentially stacked on the bottom gate dielectric layer, the heterostructure is composed of a ferroelectric semiconductor bismuth oxygen selenium layer, a bismuth selenite dielectric layer and a ferroelectric semiconductor alpha-phase indium selenide layer, and source and drain electrodes are arranged on the two sides of the ferroelectric semiconductor alpha-phase indium selenide layer. According to the invention, the directional sensitive response to linear polarized light is realized by utilizing the structural symmetry breaking characteristic of the ferroelectric semiconductors in the double-ferroelectric-layer structure, and meanwhile, through the polarization coupling effect between the two layers of ferroelectric semiconductors and the assistance of the middle bismuth oxyselenite dielectric layer for inhibiting electrostatic energy and blocking carrier migration, the linear polarized light can be effectively absorbed. And the polarization state is effectively stabilized, so that the device has remarkable non-volatile electrical characteristics. According to the invention, in-situ encryption of the optical information at the sensing end can be realized.
Owner:PEKING UNIV

Novel device structure based on two-dimensional ferroelectric semiconductor material

The invention discloses a novel device structure based on a two-dimensional ferroelectric semiconductor material. The novel device structure based on the two-dimensional ferroelectric semiconductor material comprises a back gate layer; the first insulating layer is positioned on the surface of the back gate layer; the control gate electrode / floating gate is positioned on the surface of the first insulating layer; the second insulating layer is positioned on the surface of the control gate / floating gate; the ferroelectric semiconductor layer is positioned on the surface of the second insulating layer; the source electrode and the drain electrode are located on the surface of the ferroelectric semiconductor layer. According to the ferroelectric semiconductor-floating gate field effect transistor (FeS-FGFET) structure, the excellent ferroelectric characteristic of a two-dimensional ferroelectric semiconductor is fused, the advantages of a floating gate structure are combined, carrier distribution in a channel is allowed to be accurately regulated and controlled by applying grid voltage, and then adjustability in the hysteresis direction of a transfer characteristic curve is achieved; the internal mechanism relates to the conversion of the ferroelectric effect from local polarization to all polarization, and the mutual competition between ferroelectricity and floating gate charge storage.
Owner:BEIJING INST OF TECH

Ferroelectric semiconductor junction field effect transistor, preparation method and application

The application discloses a ferroelectric semiconductor junction field effect transistor, a preparation method and application, the transistor can utilize physical characteristics of itself to realize simultaneously optical sensor, storage, synapse, logic in a single device, and the structure comprises source and drain, control gate, channel layer, ferroelectric gate layer, oxide layer and substrate from top to bottom.The channel layer adopts two-dimensional transition metal sulfide semiconductor material, the ferroelectric gate layer adopts two-dimensional ferroelectric semiconductor material, the source and the drain are respectively located at two layers of two-dimensional semiconductor channel, and the control gate is just above the ferroelectric gate layer.The preparation method and application of the ferroelectric semiconductor junction field effect transistor provided by the application can integrate optical signal sensing, data storage, synapse calculation and self-switching logic function in a single transistor, break through the functional division limitation of traditional devices, provide a new path for high-density integrated reconfigurable electronic devices, and effectively balance structural complexity and function density.
Owner:ZHEJIANG UNIV

Light-operated ferroelectric semiconductor field transistor and preparation method thereof

The invention provides a light-operated ferroelectric semiconductor field transistor and a preparation method thereof. A gate-free device comprises a light-induced deformation substrate, a dielectric layer formed on the substrate, a ferroelectric semiconductor layer located on the dielectric layer and source and drain electrodes arranged on the ferroelectric layer. According to the back gate device, a first dielectric layer, a back gate electrode, a second dielectric layer, a ferroelectric semiconductor layer located on the second dielectric layer and source and drain electrodes arranged on the ferroelectric layer are sequentially formed on the photoinduced deformation substrate. The photoinduced deformation substrate serves as a regulation and control unit, the photothermal effect caused by direct irradiation of a semiconductor material in traditional light regulation and control is avoided, the problem of carrier mobility attenuation is solved, meanwhile, the device has the capacity of responding to multi-wavelength non-contact light regulation and control, and the working accuracy and stability of the device are improved.
Owner:CHONGQING XINLIAN MICROELECTRONICS CO LTD

NON-VOLATILE TRANSISTOR, NON-VOLATILE TRANSISTOR ASSEMBLY, AND NON-VOLATILE TRANSISTOR MATRIX

NON-VOLATILE TRANSISTOR, ASSEMBLY OF NON-VOLATILE TRANSISTORS AND MATRIX OF NON-VOLATILE TRANSISTORS The invention relates to a non-volatile transistor (10) comprising a ferroelectric semiconductor layer (11) comprising a ferroelectric domain (12) exhibiting a spontaneous electrical bias (13) capable of taking a plurality of distinct states, a source (14), a gate (15) and a drain (16).The source (14), gate (15), and drain (16) are spaced apart and arranged such that an electrical potential applied between the source (14) and the gate (15) applies an electric field to the ferroelectric domain (12). The drain (16) is in electrical contact with the ferroelectric layer (11). The source (14) forms, with the ferroelectric layer (11), a Schottky barrier (17) at an interface between the source (14) and the ferroelectric layer (11). This barrier has an electrical resistance that is a function of the electrical bias (13). The transistor is such that the ferroelectric semiconductor layer (11) is degenerate at the interface between the source (14) and the ferroelectric layer (11), and the ferroelectric semiconductor layer (11) has an electrical conductivity independent of the spontaneous bias (13). Figure to be published with the abbreviation: Figure 1.
Owner:COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES +3

A two-dimensional semiconductor ferroelectric gate transistor structure photoelectric detection device based on oxygen plasma treatment

A two-dimensional semiconductor ferroelectric gate transistor structure photodetector based on oxygen plasma treatment belongs to the field of photoelectric detection technology. Using silicon / silicon dioxide as a substrate, the two-dimensional ferroelectric semiconductor material α-In₂Se₃ is placed on the silicon dioxide. An interfacial insulating dielectric layer is formed on the surface of the α-In₂Se₃ material after oxygen plasma treatment. A two-dimensional transition metal chalcogenide is prepared on the insulating dielectric layer using a mechanical exfoliation method. Metal electrodes are bonded to the two-dimensional ferroelectric semiconductor material and the two-dimensional transition metal chalcogenide through electrode adhesion layers. Under the action of the two-dimensional ferroelectric gate, the device exhibits photoelectric detection performance with low dark current and high responsivity. The device also has a certain optical memory function, making it suitable for multifunctional devices integrating detection and memory. The gate dielectric layer preparation method of this invention is simple, suitable for large-scale preparation, and low in cost. It can be applied to the fields of photoelectric detection technology and artificial vision bionics.
Owner:BEIJING UNIV OF TECH +1

Surface acoustic wave filter based on periodic ferroelectric domain and implementation method thereof

The invention discloses a surface acoustic wave filter based on a periodic ferroelectric domain and an implementation method thereof. A ferroelectric domain polarizer is adopted to enable a ferroelectric semiconductor film to be subjected to polarization overturning, a plurality of concentric annular narrow ferroelectric domains which are alternately arranged in ferroelectric polarization directions are formed on the ferroelectric semiconductor film below the position between every two adjacent polarized electrodes, and a periodic ferroelectric domain film is obtained; a sheet-shaped filter input electrode is formed on the periodic ferroelectric domain film, and when the same-phase voltage is received, ferroelectric domains with opposite ferroelectric polarization directions automatically generate oscillation with opposite directions to form surface acoustic wave standing waves; the working frequency of the filter is determined by the width of the narrow ferroelectric domain, the width of the narrow ferroelectric domain is modulated by the voltage and frequency of the applied amplitude modulation alternating current, and the narrow ferroelectric domain with small width is easy to prepare, so that the working frequency of the filter is not limited, and the filter can work at a higher frequency; the method is applied to the fields of radio frequency communication, 6G network transmission, high-precision radar, remote sensing monitoring and the like.
Owner:PEKING UNIV

Photoelectric conversion element, optical sensor, power generation device, and photoelectric conversion method

PCT designated stageWO2026058867A1Semiconductor materialsEngineering
A photoelectric conversion element (10) according to one embodiment of the present disclosure has a photoelectric conversion unit (1), wherein: the photoelectric conversion unit (1) has a light-receiving surface (1a); the photoelectric conversion unit (1) contains a ferroelectric semiconductor material; the ferroelectric semiconductor material is polarized in an in-plane direction of the light-receiving surface (1a), thereby breaking the spatial inversion symmetry of the photoelectric conversion unit (1); the ferroelectric semiconductor material contains one or both of a halogenated metal perovskite semiconductor material and a haolgenated perovskite semiconductor material containing formamidinium ions; and radiation light radiated onto the light-receiving surface (1a) is photoelectrically converted, thereby generating a photocurrent that flows in the polarization direction of the ferroelectric semiconductor material.
Owner:SUMITOMO CHEM CO LTD +1

Ferroelectric semiconductor devices and methods of fabricating thereof

Described herein is a method of fabricating a ferroelectric material, comprising the steps of: providing a semiconductor substrate; treating the semiconductor substrate with an oxidant to form an oxidized surface; depositing a metal on top of the oxidized surface to provide a film; and annealing the film at a temperature between 700°C and 900°C, thereby forming a metal oxide layer on top of the semiconductor substrate, wherein the interface between the semiconductor substrate and the metal oxide layer does not contain any remnant oxidized surface, and a ferroelectric material and a ferroelectric transistor or capacitor comprising said ferroelectric material.
Owner:YALE UNIVERSITY

Two-dimensional JFET device and manufacturing method thereof

The invention relates to a two-dimensional JFET device and a manufacturing method thereof. The two-dimensional JFET device comprises: an insulating substrate; the few-layer two-dimensional ferroelectric semiconductor film is located on the surface of the insulating substrate; the two-dimensional semi-metal thin film is located in the middle area of the surface of the few-layer two-dimensional ferroelectric semiconductor thin film; the metal electrodes are divided into a source electrode, a drain electrode and a gate electrode, the source electrode and the drain electrode are located on the surfaces of the few-layer two-dimensional ferroelectric semiconductor films on the two sides of the two-dimensional semimetal film respectively, and the gate electrode is located on the surface of the two-dimensional semimetal film. According to the two-dimensional JFET device, the high conductivity of the two-dimensional semimetal and the spontaneous polarization, adjustable and controllable characteristics, low work function, no dangling bond and other characteristics of the two-dimensional ferroelectric semiconductor material are utilized, the Schottky barrier height of a junction region and the working voltage range of the device are reduced, the voltage drop sharing phenomenon is avoided, and the device reliability is improved. And nearly ideal sub-threshold swing and accurate control on channel conductivity are realized.
Owner:ZJU HANGZHOU GLOBAL SCI & TECH INNOVATION CENT

A highly durable fefet based on ferroelectric semiconductor channel and anti-ferroelectric gate dielectric and a method of making the same

The application discloses a high-durability FeFET based on a ferroelectric semiconductor channel and an antiferromagnetic gate dielectric and a preparation method thereof. A back gate electrode layer, an antiferromagnetic gate dielectric layer, a ferroelectric semiconductor channel layer, a top gate high-k gate dielectric layer and a top gate electrode layer are sequentially stacked in the FeFET structure. The antiferromagnetic gate dielectric layer serves as a back gate dielectric layer, and the top gate high-k gate dielectric layer serves as a top gate dielectric layer. The thickness of the back gate dielectric layer is greater than that of the top gate dielectric layer, and an asymmetric double-gate structure is formed. In the application, a hafnium oxide-based antiferromagnetic film is used to replace a ferroelectric film as a gate dielectric of the FeFET, so that the operating voltage is effectively reduced. There is no interface layer between the ferroelectric semiconductor channel and the antiferromagnetic gate dielectric, and the durability failure caused by the charge trapping and defect generation associated with the interface layer of the traditional FeFET is inhibited. The out-of-plane spontaneous polarization of the ferroelectric semiconductor channel is continuously and accurately adjustable, and the FeFET has a gate storage mode and a channel storage mode which are switched with each other based on the asymmetric double-gate structure of the FeFET, so that the FeFET is expected to exhibit higher durability.
Owner:PEKING UNIV

A two-dimensional jfet device and method of fabrication thereof

The application relates to a two-dimensional JFET device and a manufacturing method thereof. The two-dimensional JFET device comprises an insulating substrate, a few-layer two-dimensional ferroelectric semiconductor thin film located on the surface of the insulating substrate, a two-dimensional semimetal thin film located on the middle region of the surface of the few-layer two-dimensional ferroelectric semiconductor thin film, and a metal electrode, which is divided into a source electrode, a drain electrode and a gate electrode. The source electrode and the drain electrode are respectively located on the surface of the few-layer two-dimensional ferroelectric semiconductor thin film on the two sides of the two-dimensional semimetal thin film, and the gate electrode is located on the surface of the two-dimensional semimetal thin film. The two-dimensional JFET device utilizes the high conductivity of the two-dimensional semimetal, the spontaneous polarization, the adjustable control characteristics, the low work function and the absence of dangling bonds of the two-dimensional ferroelectric semiconductor material, reduces the Schottky barrier height of the junction region and the working voltage range of the device, avoids the sharing pressure drop phenomenon, and realizes the nearly ideal sub-threshold swing and the accurate control of the channel conductance.
Owner:ZJU HANGZHOU GLOBAL SCI & TECH INNOVATION CENT

High-performance photoactive synaptic device using two-dimensional ferroelectric semiconductor with asymmetric energy band structure

Proposed is a high-performance photoactive neuromorphic synaptic device using a two-dimensional ferroelectric semiconductor with an asymmetric energy band structure, the synaptic device including a gate electrode layer, a buffer insulating layer arranged on the gate electrode layer, a channel layer arranged on the buffer insulating layer, a source electrode of a conductor arranged on the channel layer, and a drain electrode of a conductor arranged on the channel layer, and spaced apart from the source electrode, wherein the channel layer is made of the two-dimensional ferroelectric semiconductor, the buffer insulating layer is made of an insulating material having a lower dielectric constant than that of the channel layer, the gate electrode layer is configured to control an electric field of the channel layer by an applied electrical bias, and the photoactive neuromorphic synaptic device increases a Fermi level as increased electron-hole pairs.
Owner:THE IND & ACADEMIC COOP IN CHUNGNAM NAT UNIV (IAC)

Non-volatile transistor, non-volatile transistor array, and non-volatile transistor array

The invention relates to a non-volatile transistor (10) comprising a ferroelectric semiconductor layer (11) comprising a ferroelectric domain (12) exhibiting a spontaneous electrical bias (13) capable of taking a plurality of distinct states, a source (14), a gate (15) and a drain (16).The source (14), the gate (15) and the drain (16) are spaced apart and arranged so that an electrical potential applied between the source (14) and the gate (15) applies an electric field to the ferroelectric domain (12), the drain (16) being in electrical contact with the ferroelectric layer (11), the source (14) forming, with the ferroelectric layer (11), a Schottky barrier (17) at the interface between the source (14) and the ferroelectric layer (11) having an electrical resistance that is a function of the electrical bias (13), the transistor being such that the ferroelectric semiconductor layer (11) is degenerate at the interface between the source (14) and the ferroelectric layer (11) and the ferroelectric semiconductor layer (11) has an electrical conductivity independent of the spontaneous bias (13).
Owner:COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES +3

Method for synthesizing a ferroelectric-semiconductor composite material for enhanced electrocatalytic and energy storage applications

PendingUS20260008687A1Hybrid capacitor electrodesVanadium compoundsFerroelectric semiconductorsSemiconductor
A method for synthesizing a ferroelectric-semiconductor composite material with enhanced electrocatalytic and energy storage properties. The process involves synthesizing BiVO4 powder by mixing Bi2O3 and V2O5 with ethanol, grinding the mixture for about 3 hours, pressing into a pellet, and calcining it between 500-1000° C. for 2-6 hours, followed by re-calcination at 700° C. for 2 hours. In parallel, BaTiO3 powder is synthesized by mixing and grinding BaCO3 and TiO2 for 4 hours, pelletizing the mixture, and calcining it at 1300° C. for 4 hours. The resulting BiVO4 and BaTiO3 powders are mixed in molar ratios of (1−x):x and ground for approximately 1 hour to form a uniform mixture, which is then pressed into a pellet and calcined at 700° C. for 4 hours. Upon cooling, a (1−x)BaTiO3+xBiVO4 composite is obtained. This composite exhibits synergistic properties advantageous for electrocatalysis and energy storage applications.
Owner:PRINCESS NORA BINT ABDULRAHMAN UNIV

Imidazole reconstructed tin-based ferroelectric perovskite semiconductor film, ferroelectric transistor and preparation method

The invention discloses an imidazole reconstructed tin-based ferroelectric perovskite semiconductor thin film, a ferroelectric transistor and a preparation method, and the preparation method of the thin film comprises the steps: firstly, preparing a tin-based perovskite precursor solution, introducing polar imidazole molecules into the tin-based perovskite precursor solution, and then preparing the tin-based ferroelectric perovskite semiconductor thin film through a spin-coating method, the ferroelectricity of the thin film is verified through a piezoelectric atomic force microscope, a second harmonic signal and a ferroelectric analysis tester, and then the thin film is used as a ferroelectric semiconductor layer to prepare the transistor through the following steps. A layer of the tin-based ferroelectric perovskite semiconductor thin film is prepared on a heavily-doped silicon gate electrode substrate with an insulating layer by using a spin-coating method, and a source electrode and a drain electrode are formed on the surface of the tin-based ferroelectric perovskite semiconductor thin film by vapor plating through a mask plate. Compared with a non-ferroelectric transistor, the ferroelectric transistor prepared by the invention has the advantages that the subthreshold swing is reduced from 120 mV / decto 67 mV / dec, and the threshold voltage is reduced from 7.83 V to 6.17 V. The method has the advantages that the implementation method is simple, and the prepared device is low in subthreshold swing.
Owner:FUDAN UNIVERSITY

A method for modeling a metal-ferroelectric-semiconductor epitaxial heterostructure tunable capacitor

The application discloses a metal-ferroelectric-semiconductor epitaxial heterostructure tunable capacitor modeling method, in which a function relationship among a ferroelectric layer electric field, a semiconductor surface charge area density and a ferroelectric body polarization intensity is obtained based on Maxwell equations and a potential displacement vector continuous equation of the ferroelectric-semiconductor layer, a numerical solution of a ferroelectric body dipole polarization differential equation is carried out through a second-order Rosenbrock formula, and a C-V curve of a thin film capacitor under a high-frequency state is simulated through voltage forward scanning and reverse scanning, so that the model can accurately depict the influence of capacitor parameters on the capacitance tunability. The application has great significance for parameter optimization design of a surface acoustic wave (SAW) filter based on the MFS tunable capacitor.
Owner:SOUTHEAST UNIV

A surface acoustic wave filter based on periodic ferroelectric domains and a method for implementing the same

This invention discloses a surface acoustic wave (SAW) filter based on periodic ferroelectric domains and its implementation method. The invention employs a ferroelectric domain polarizer to cause polarization reversal in a ferroelectric semiconductor thin film. Multiple concentric ring-shaped narrow ferroelectric domains with alternating ferroelectric polarization directions are formed beneath the ferroelectric semiconductor thin film between two adjacent polarization electrodes, resulting in a periodic ferroelectric domain thin film. A sheet-like filter input electrode is formed on the periodic ferroelectric domain thin film. Upon receiving an in-phase voltage, the ferroelectric domains with opposite polarization directions automatically generate oscillations in opposite directions, forming a surface acoustic wave standing wave. The operating frequency of the filter is determined by the width of the narrow ferroelectric domains, which is modulated by the voltage and frequency of the applied amplitude-modulated alternating current. Narrow ferroelectric domains with smaller widths are easier to fabricate; therefore, the operating frequency of the filter in this invention is not limited and can operate at higher frequencies. This invention has applications in fields such as radio frequency communication and 6G network transmission, high-precision radar, and remote sensing monitoring.
Owner:PEKING UNIV

In2Se3 wurtzite ferroelectric semiconductor material and preparation method thereof

The invention discloses an In2Se3 wurtzite ferroelectric semiconductor material and a preparation method thereof, and the preparation method comprises the steps: taking a two-dimensional Van der Waals layered In2Se3 semiconductor as a precursor, regulating and controlling the phase change from two-dimensional layered In2Se3 to non-layered 6H type or 3R type In2Se3 by adopting an electron beam irradiation, laser irradiation or heating mode, and further obtaining a non-layered In2Se3 ferroelectric with a wurtzite structure through electric field regulation and control. The novel wurtzite In2Se3 material obtained by the method has a three-dimensional non-centrosymmetric structure, the theoretical prediction polarization intensity is greater than 50 [mu] C / cm < 2 >, and the novel wurtzite In2Se3 material has excellent thickness controllability and silicon-based compatibility. The novel In2Se3 wurtzite ferroelectric semiconductor material obtained by the method has the advantages of simple composition, high polarization intensity, low coercive field, proper band gap, silicon substrate compatibility and the like, and is a superexcellent candidate material for research and development of sensing, memory and computing integrated devices in the later Mohr era in the future.
Owner:EAST CHINA NORMAL UNIV

Multi-modal sensing-memory-computing integrated brain-inspired chip and preparation method therefor

PCT designated stageWO2026016177A1HeterojunctionGate dielectric
Disclosed in the present invention are a multi-modal sensing-memory-computing integrated brain-inspired chip and a preparation method therefor. The chip comprises: a gate dielectric layer and a channel layer sequentially arranged on the surface of a substrate, and a source-drain electrode arranged on two ends of the channel layer. The channel layer comprises a ferroelectric semiconductor layer and an organic semiconductor layer connected at one end to form a heterojunction, and the source-drain electrode is respectively arranged on the ferroelectric semiconductor layer and the organic semiconductor layer. The ferroelectric semiconductor layer serves as a response layer for an optical signal and an electrical signal, and the organic semiconductor layer serves as a response layer for gas. The present invention uses a heterojunction of ferroelectric semiconductors and organic semiconductors to construct a sensing-memory-computing integrated brain-inspired chip to obtain a neuromorphic electronic device having optical, electrical and gas storage effects, and is suitable for multi-modal information sensing, storage and processing.
Owner:FUDAN UNIVERSITY +1

A heterogeneous phototransistor based on a double ferroelectric layer, its fabrication method and application

ActiveCN121013425BHeterojunctionIndium
This invention provides a heterogeneous phototransistor based on a double ferroelectric layer, its fabrication method, and its applications, belonging to the field of high-performance sensing and integrated sensing-memory-computing technology. The heterogeneous phototransistor includes a bottom gate substrate, a bottom gate dielectric layer, and a heterostructure stacked thereon. The heterostructure consists of a ferroelectric semiconductor bismuth oxide selenide layer, a bismuth selenite oxide dielectric layer, and a ferroelectric semiconductor α-phase indium selenide layer. Source and drain electrodes are provided on both sides of the ferroelectric semiconductor α-phase indium selenide layer. This invention utilizes the structural symmetry breaking characteristic of the ferroelectric semiconductor in the double ferroelectric layer structure to achieve a direction-sensitive response to linearly polarized light. Simultaneously, through the polarization coupling between the two ferroelectric semiconductor layers, supplemented by the suppression of electrostatic energy and the blocking of carrier migration by the intermediate bismuth selenite oxide dielectric layer, the polarization state is effectively stabilized, giving the device significant non-volatile electrical characteristics. This invention can achieve in-situ encryption of optical information at the sensing end.
Owner:PEKING UNIV

Complementary field effect transistor device structure and preparation method thereof

The invention discloses a complementary field effect transistor device structure and a preparation method thereof, relates to the technical field of transistors, and aims to solve the technical problems that in the prior art, a traditional two-dimensional ferroelectric semiconductor material cannot realize a P-type transistor and a traditional silicon-based material is limited in performance improvement under the nanoscale. The complementary field effect transistor device structure comprises a substrate; the at least one group of heterojunction units are formed on the substrate; the bigrid structures are arranged corresponding to each group of heterojunction units; the first heterojunction comprises a first two-dimensional ferroelectric semiconductor layer and a first two-dimensional insulating layer; the second heterojunction comprises a second two-dimensional insulating layer and a second two-dimensional ferroelectric semiconductor layer; external voltage is applied to the bigrid structure, the second two-dimensional ferroelectric semiconductor layer in the second heterojunction is induced to form P-type semiconductor characteristics, the first two-dimensional ferroelectric semiconductor layer in the first heterojunction keeps intrinsic N-type semiconductor characteristics, and integration of the complementary field effect transistor is achieved.
Owner:INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD

Closed-loop vision-motion man-machine interaction system based on NbOIphotosynapse

The invention discloses a closed-loop vision-to-motion man-machine interaction system based on NbOI photoelectric synapse, and belongs to the technical field of neuromorphic electronics, the closed-loop vision-to-motion man-machine interaction system is characterized in that a NbOI photoelectric synapse module takes a two-dimensional ferroelectric semiconductor NbOI as a unique core function layer and has optical pulse and electric pulse dual-mode regulation and control capability; an inhibitory / excitatory synaptic current can be selectively output, and the energy consumption of a single synaptic event is less than or equal to 100aJ; a visual optical signal output by the visual perception module can be directly input into the synapse module for processing, and an additional optical-electric conversion sub-module is not needed; the motion execution module executes a target action according to the regulation and control signal and feeds back a state to realize closed-loop self-adaptive regulation and control; all the modules form a closed loop feedback link through the signal interaction module. The problems of high energy consumption, single function and poor stability of traditional synapses are effectively solved, the system architecture is simplified, scenes such as edge computing and intelligent robots are adapted, and the method has important practical value.
Owner:GUANGXI UNIV

A method for obtaining polarization of single-domain ferroelectric semiconductor single crystals

This invention relates to a polarization method for obtaining a single-domain ferroelectric semiconductor single crystal, comprising the following steps: S100: providing a raw material to be polarized, wherein the Curie temperature of the raw material is T. c The growth temperature of the raw materials is T. g S200: Heat the raw materials to a first preset temperature T1, T c <T1<T g The raw material is kept at a first preset temperature T1 for a first preset time S1 to ensure that the raw material is heated evenly. S300: After the heat preservation in step S200 is completed, the temperature of the raw material is reduced to room temperature. At the same time, light is introduced during the entire cooling process. The light intensity is within a first preset range. After the light is irradiated, a single-domain ferroelectric semiconductor single crystal is obtained.
Owner:HUIZHOU UNIV