87 results about "Ferroelectricity" patented technology

The invention relates to the technical field of sliding ferroelectricity, in particular to a torsion WS2 / MoS2 sliding ferroelectric device and a preparation method and application thereof. The sliding ferroelectric device comprises a metal electrode, MoS2, WS2 and a target substrate; the MoS2 and the WS2 grow on the surface of a target substrate, and the WS2 covers the surface of the MoS2 through a transfer part; the number of the metal electrodes is two, one metal electrode covers the WS2, and the other metal electrode covers the MoS2. The invention provides a two-dimensional Van der Waals heterojunction device with adjustable ferroelectricity, the two-dimensional Van der Waals heterojunction device is prepared based on a non-ferroelectric two-dimensional material through manual stacking and twisting, the method effectively induces and adjusts the ferroelectric property of the material through accurate adjustment of an interlayer torsion angle, and flexible adjustment of the ferroelectricity of the material is realized; the sliding ferroelectric device can realize a large storage window and is excellent in performance stability.

The application relates to a ferroelectric monolayer vanadium trichloride film and a preparation method thereof. The method comprises the following steps: evaporating and depositing VCl3 powder on the surface of a NbSe2 substrate under an ultrahigh vacuum atmosphere, and performing annealing treatment, so that the ferroelectric monolayer vanadium trichloride film is obtained. The sample preparation strategy of molecular beam epitaxy under an ultrahigh vacuum environment is used, high-purity VCl3 powder is evaporated and deposited on a NbSe2 substrate, an atomically flat monolayer VCl3 sample is obtained through annealing treatment, in-situ scanning tunneling microscope technology and scanning tunneling spectrum technology are combined, and it is determined that the monolayer VCl3 is a semiconductor material with ferroelectricity. The method provides a new method and idea for introducing ferroelectricity in the family of transition metal trichlorides, has high application potential and scientific research value, meanwhile, the successful introduction of ferroelectricity in the system also provides a new platform for carrying out multi-state regulation and research.

The invention belongs to the field of single crystal growth, and particularly relates to a novel single crystal with ferroelectricity and ferromagnetic orderliness at room temperature and a growth method. Comprising the following steps: grinding a composition 1 and a composition 2 in an aluminum oxide mortar, putting into a platinum crucible, putting the platinum crucible into an aluminum oxide crucible, putting the aluminum oxide crucible into a single crystal growth furnace, adjusting a temperature program, cooling to room temperature, and taking out the platinum crucible; and S2, putting the platinum crucible taken out in the step S1 into a beaker, adding dilute nitric acid, and carrying out ultrasonic cleaning to obtain the novel ordered single crystal with ferroelectricity and ferromagnetic at room temperature. The high-temperature melting method is adopted for the first time to grow the novel single crystal with ferroelectricity and ferromagnetic ordered state at the same time under the room temperature condition, and the operation method is simple and easy to implement.

The present disclosure provides a nitride semiconductor transistor capable of improving current density. The nitride semiconductor transistor includes: a first channel layer having a first upper surface having nitrogen polarity; the ferroelectric nitride semiconductor layer is positioned on the first upper surface and is provided with a second upper surface with metal polarity; the second channel layer is positioned on the second upper surface and is provided with a third upper surface with metal polarity; and the first barrier layer is positioned on the third upper surface and is provided with a fourth upper surface with metal polarity.

Disclosed is a polycrystalline ceramic dielectric comprising: crystal grain bulks made of a barium titanate-based ceramic; and grain boundaries comprising interfaces between the crystal grain bulks, wherein the composition of the grain boundaries is controlled using dopants. By controlling the grain boundary composition using dopants so that the dopants are distributed across a width of 5 nm or less and using a nano-sized, fine-grained barium titanate-based ceramic precursor, the grain boundary structure within the polycrystals may maintain electroneutrality, and their ferroelectricity may be controlled, thereby allowing for smoother polarization reaction. Accordingly, the present disclosure provides polycrystalline ceramic dielectrics that have dielectric properties such as high permittivity and low dielectric losses in a wide frequency range, a small amount of reduction in electric field-dependent relative permittivity, high temperature stability, non-reducibility under a reduction sintering condition, and resulting high insulation resistance, and a preparation method therefor.

The embodiment of the invention discloses a storage method of a field effect transistor, a readable storage medium and a storage system, and the storage method comprises the steps: firstly applying a positive or negative pulse to a grid electrode of a ferroelectric polarization auxiliary charge trapping field effect transistor, so as to enable the field effect transistor to be in an electron trapping state or a hole trapping state; and writing information in an electron capture state or a hole capture state. On the basis of the application, the situation that a large number of electrons or holes are injected and captured in the pulse process of the grid electrode of the field effect transistor, so that the read threshold voltage drifts is considered, the threshold voltage difference value generated by capturing of the electrons or the holes is used as a storage window, information storage is realized, and the reading efficiency is improved. The memory function is realized by utilizing the phenomenon that electrons or holes induced by ferroelectricity are captured and the part of electrons or holes can be retained in a gate medium for a certain time, and a single-transistor DRAM (Dynamic Random Access Memory) memory device with the size of 4F2 is realized.

The invention belongs to the technical field of multiferroic materials, and relates to a design method of a multiferroic body based on a vanadium-doped two-dimensional ferroelectric and the multiferroic body. Performing cell expansion on the single-layer NbOI2 primitive cell in different directions to obtain supercells with different sizes; the method comprises the following steps: doping supercells with different sizes by taking vanadium as a doping element to obtain a doping configuration of each supercell under different doping concentrations; taking the doping configuration with the lowest total energy of the ferromagnetic state and the antiferromagnetic state under each doping concentration as the ground state configuration of the doping concentration; calculating band gaps Eg of ground state configurations with different doping concentrations and spontaneous ferroelectric polarization intensity along a b axis, drawing a double-Y-axis curve graph by taking the doping concentrations as abscissas and the spontaneous ferroelectric polarization intensity and the band gaps Eg as ordinates, and dividing a multiferroic phase region and a magnetic semimetal phase region to obtain a doping concentration-physical property evolution phase diagram; and obtaining a corresponding doping concentration value range when the ground state configuration has a multiferroic phase with ferroelectricity and antiferromagnetism so as to design a multiferroic body.

This invention provides a simulation method and application based on the slip ferroelectricity and piezoelectricity of two-dimensional heterolayer materials. The simulation method first constructs a g-C3N4 / graphene heterolayer model, forming various stacking configurations such as AA, AB, and BA. Then, based on density functional theory, structural optimization and electronic structure calculations are performed on the constructed heterolayer model. Based on this, the out-of-plane ferroelectric polarization and in-plane piezoelectric coefficient of the heterolayer under different stacking configurations are solved. Finally, combined with charge transfer characteristics and band structure analysis, the microscopic physical mechanism of the coexistence of slip ferroelectricity and piezoelectric properties of the system is elucidated. This invention can provide a theoretical basis for multifunctional two-dimensional materials through this simulation method, and has broad prospects for applications in memory, sensors, and actuators.

Ferroelectric devices, including FeFET and / or FeRAM devices, include ferroelectric material layers deposited using atomic layer deposition (ALD). By controlling parameters of the ALD deposition sequence, the crystal structure and ferroelectric properties of the ferroelectric layer may be engineered. An ALD deposition sequence including relatively shorter precursor pulse durations and purge durations between successive precursor pulses may provide a ferroelectric layer having relatively uniform crystal grain sizes and a small mean grain size (e.g., ≤3 nm), which may provide effective ferroelectric performance. An ALD deposition sequence including relatively longer precursor pulse durations and purge durations between successive precursor pulses may provide a ferroelectric layer having less uniform crystal grain sizes and a larger mean grain size (e.g., ≥7 nm). Ferroelectric layers having larger mean grain sizes may exhibit enhanced crystallinity and a stabilized orthorhombic crystal phase, particularly in relatively thin layers (e.g., ≤15 nm in thickness).

The invention provides a semiconductor structure and a preparation method thereof, the semiconductor structure comprises a substrate and a superlattice structure, the superlattice structure comprises more than one periodic unit structure, each periodic unit structure comprises more than two layers of Al (1-x) ScxN, and x is a number greater than 0 and less than 1; x of Al (1-x) ScxN in each layer in the periodic unit structure is sequentially reduced from the direction far away from the substrate to the direction close to the substrate. According to the invention, a periodic unit structure composed of Al (1-x) ScxN arranged according to the preset scandium doping concentration is formed on the substrate to form a superlattice structure, abnormal grains generated when aluminum nitride doped with high scandium concentration grows on the substrate are inhibited, the crystal quality and the surface roughness of Al (1-x) ScxN are optimized, the piezoelectric and ferroelectric properties of Al (1-x) ScxN are improved, and relatively high polarization intensity is realized; meanwhile, the thickness of each layer of Al (1-x) ScxN in the superlattice structure is set, so that the thick high-scandium-concentration doped aluminum nitride inhibits the generation of high-resistance doped abnormal grains, the thin high-scandium-concentration doped aluminum nitride reduces the ferroelectric coercive field intensity of the film, and the dual improvement of the performance reliability and ferroelectric performance of the Al (1-x) ScxN is realized.

A method for improving the nucleation of the γ phase in polyvinylidene fluoride (PVDF), a γ phase PVDF dielectric film based on the nucleation method, and a preparation method thereof are disclosed. The method involves using ceramic powder in the PVDF film material to enhance the nucleation ability of the γ phase crystals, improve the hydrophilicity of the PVDF film, and enhance the high-temperature dielectric properties of the PVDF film material. The dielectric film raw materials include 0-0.2 parts of ceramic powder (NBT), 10 parts of polyvinylidene fluoride (PVDF), and 200-204 parts of N,N-dimethylformamide (DMF). The preparation method is as follows: 1) Using N,N-dimethylformamide... 1) Prepare a 5% ceramic powder / polyvinylidene fluoride solution using amide as a solvent; 2) Drop the solution from step 1) onto a glass slide and cure it into a film in a vacuum oven at 68-72℃; 3) Melt the cured film obtained in step 2) on a hot stage at 200℃-220℃ to eliminate thermal history, and then rapidly cool it to 150-170℃ for isothermal crystallization until the blended film is completely crystallized; The preparation method of the γ-phase polyvinylidene fluoride dielectric film of the present invention is simple, convenient to operate, and has excellent performance, such as high temperature resistance, corrosion resistance, and strong piezoelectricity and ferroelectricity.

The invention discloses a copper ion intercalation two-dimensional beta-phase indium selenide material as well as a preparation method and application thereof. The method comprises the following steps: soaking a substrate loaded with a beta-InSe nanosheet in an organic solution of copper hexafluorophosphate tetraacetonitrile with the pH value of 4.0-6.5, and preparing the copper ion intercalation two-dimensional beta-InSe material through a solution heating and soaking method. According to the copper ion intercalation two-dimensional beta-phase indium selenide material and the preparation method thereof, a mild and efficient copper ion solution intercalation process is adopted, highly uniform and ordered distribution of copper between two-dimensional beta-InSe layers is achieved, the ferroelectric property and the electrical transport property of the copper ion intercalation two-dimensional beta-phase indium selenide material are regulated and controlled at the same time, and the prepared copper ion intercalation two-dimensional beta-phase indium selenide material is suitable for constructing a high-performance ferroelectric device.

The embodiment of the invention provides a memory cell, a memory array, a memory and electronic equipment, relates to the technical field of semiconductor memory, and aims to solve the problem of high power consumption of a ferroelectric memory. A storage capacitor of the storage unit comprises a first electrode, a ferroelectric layer, a first metal oxide layer and a second electrode. The first metal oxide layer is stacked between the first electrode and the ferroelectric layer. The metal element of the first metal oxide in the first metal oxide layer comprises at least one metal element except the hafnium element in the third group element, the fourth group element and the fifth group element, and the first metal oxide layer applies a proper pulling force to the ferroelectric layer to stretch the crystal structure of the ferroelectric layer; and the crystal structure of the ferroelectric layer has lattice distortion so as to increase the proportion of the O phase in the ferroelectric layer, so that the ferroelectricity of the ferroelectric layer is increased, the ferroelectric polarity of the memory is easier to turn, and the working voltage and power consumption are reduced.

The invention belongs to the field of sodium-ion batteries, and relates to a preparation method of a coated modified sodium-ion battery positive electrode material, a positive electrode plate and a sodium-ion battery. The positive electrode material comprises a layered transition metal oxide NaNi < 0.5 > Mn < 0.5 > O < 2 > and a multiferroic material BiFeO < 3 > coating layer coated outside the layered oxide. The BiFeO3 coating layer can be used as a protective layer to inhibit interface side reaction, so that the cycling stability of the battery is improved; meanwhile, on the basis of ferroelectricity and magnetism of BiFeO3, a physical field is introduced into a positive electrode-electrolyte interface, interface ion transport is regulated and controlled, and then the rate capability of the battery is improved.

The invention discloses a method for generating ferroelectricity by inducing a two-dimensional semiconductor through ion regulation and application, and the method comprises the following steps: S1, adding alkali metal and an aromatic hydrocarbon compound into an ether solvent, and dissolving to form a mixed solution; s2, diluting the mixed solution to obtain an alkali metal-aromatic hydrocarbon pre-doped solution; s3, completely immersing a two-dimensional semiconductor material in the alkali metal-aromatic hydrocarbon pre-doped solution prepared in S2, and allowing the two-dimensional semiconductor material to stand for a preset time so as to embed alkali metal ions into crystal lattices or surface structures of the two-dimensional semiconductor material; and S4, taking out the two-dimensional semiconductor material treated in S3, repeatedly washing and drying to finally obtain the ion-doped two-dimensional semiconductor material, and inducing the ion-doped two-dimensional semiconductor material to generate ferroelectricity. The ferroelectricity is directly induced in the bulk phase two-dimensional semiconductor material through liquid phase embedding of alkali metal ions, the technical limitation of physical stripping is effectively avoided, and the process is mild and controllable.

The present invention addresses the problem of providing an electro-optical element having an electro-optical layer excellent in temporal stability of the electro-optic constant, and a method for manufacturing the electro-optical element. An electro-optical element according to the present invention has a substrate, an electro-optical layer, and an electrode, the electro-optical layer being obtained by fixing the alignment state of a composition for forming an electro-optical layer, the composition containing a liquid crystal compound that does not exhibit ferroelectricity and an organic dye having a maximum absorption wavelength of 600-1200 nm, and the degree of orientation of a component derived from the liquid crystal compound in the electro-optical layer being 0.50 or more.

To provide a semiconductor device which performs calculation by using a transistor having a large S value or operation in a subthreshold region of the transistor.SOLUTION: The transistor includes an oxide semiconductor layer having a channel formation region, a gate electrode having a region overlapping with the oxide semiconductor layer with an insulating layer interposed therebetween, and a first conductive layer having a region overlapping with the oxide semiconductor layer with a ferroelectric layer interposed therebetween. In particular, the ferroelectric layer has a crystal, and the crystal has a crystal structure that exhibits ferroelectricity.SELECTED DRAWING: Figure 1

The invention discloses a self-supporting piezoelectric film and a preparation method thereof. The preparation method of the self-supporting piezoelectric film comprises the following steps: providing an initial layered structure body; the device sequentially comprises a substrate, a conductive electrode layer and a piezoelectric film layer from bottom to top, the substrate contains surface ions, and one side containing the surface ions is in contact with the conductive electrode layer; and a polar solvent is introduced between the substrate and the conductive electrode layer, standing is carried out, the polar solvent and surface ions on the substrate are subjected to solvation, and the substrate is separated from the conductive electrode layer and the piezoelectric film layer. The substrate containing the surface ions is adopted, the polar solvent is introduced to be subjected to solvation with the surface ions, the substrate is separated from the conductive electrode layer and the piezoelectric film layer, the problem that an existing rigid substrate is difficult to peel off is solved, and the obtained film has excellent crystal texture and microstructure integrity; the mechanical clamping effect of the rigid substrate is eliminated, and the piezoelectric and ferroelectric properties are better.

A new LC medium exhibits a ferroelectric-nematic phase at ambient temperature. It comprises at least one or more compounds selected from each of the groups of formula IA, IB and IC-1 / IC-2 / IC-3, wherein the variable groups have the meanings indicated in the text and claims. The mixture can be used in electro-optics, electronics, electromechanics and other applications for materials with very high dielectric permittivity and other energy saving applications.

The present invention relates to the manufacturing of devices that comprise films having piezoelectric, pyroelectric and / or ferroelectric properties, obtained at room temperature by aerosol deposition (AD). Advantageously, the devices according to the invention are functional without requiring subsequent heat treatment, and can be produced on various types of substrates, rigid or flexible, with varied thicknesses, whether in a thin layer (< 10 μm) or a thick layer (> 10 μm). More particularly, the invention relates to ceramic-polymer composite films having piezoelectric, pyroelectric or ferroelectric properties, obtained by AD, wherein the rate of polymer integrated into the film is controlled in order to obtain films that are functional immediately after deposition. The interconnectivity of the phases and the diameter of the ceramic grains are also controlled, ensuring that the desired functional properties are maintained. The invention further relates to an AD method for producing such devices.

The invention relates to a self-storage voltage comparator, and belongs to the technical field of electronic components. The device comprises a substrate, a transition metal chalcogenide, a metal phosphorus-sulfur (selenide), a source electrode, a drain electrode and an input electrode, the metal phosphorus-sulfur (selenide) is located on the upper surface of the transition metal chalcogenide, and the input electrode is located on the upper surface of the metal phosphorus-sulfur (selenide). The source electrode and the drain electrode are located at the two ends of the transition metal chalcogenide and are electrically communicated with the transition metal chalcogenide. According to the invention, the transition metal chalcogenide and the metal phosphorus-sulfur (selenide) form an integrated device of a field effect transistor and a memristor, an input voltage is identified and compared by using a competitive mechanism between ferroelectricity and ionic conductivity of the metal phosphorus-sulfur (selenide), and a comparison result can be stored in a nonvolatile manner.

A material having favorable ferroelectricity is provided. An embodiment of the present invention is a metal oxide film including a first layer and a second layer. The first layer contains first oxygen and hafnium, and the second layer contains second oxygen and zirconium. The hafnium and the zirconium are bonded to each other with the first oxygen positioned therebetween, and the second oxygen is bonded to the zirconium.

The application belongs to the technical field of multiferroic materials, and relates to a design method of a multiferroic material based on a vanadium-doped two-dimensional ferroelectric body and the multiferroic material. Single-layer NbOI2 primitive cells are expanded in different directions to obtain supercells of different sizes. Vanadium is used as a doping element to dope the supercells of different sizes, and the doping configurations of each supercell under different doping concentrations are obtained. The doping configuration with the lowest total energy of the ferromagnetic state and the antiferromagnetic state under each doping concentration is used as the ground state configuration of the doping concentration. The band gap Eg and the spontaneous ferroelectric polarization intensity along the b-axis of the ground state configuration under different doping concentrations are calculated. A double-Y-axis curve graph is drawn with the doping concentration as the horizontal coordinate and the spontaneous ferroelectric polarization intensity and the band gap Eg as the vertical coordinate, and the multiferroic phase region and the magnetic semimetal phase region are divided. The doping concentration-physical property evolution phase diagram is obtained, so that the corresponding doping concentration value range of the ground state configuration with the multiferroic phase of ferroelectricity and antiferromagnetism is obtained to design the multiferroic material.

The application provides a hafnium zirconium oxide nanowire, a nanometer hafnium zirconium oxide powder, a preparation method and application thereof, and belongs to the technical field of material synthesis and catalysis. x Zr 1‑x O2,x ranges from 0.1 to 0.9; the hafnium zirconium oxide nanowire is sub-nanometer size (diameter less than 1 nanometer), has the polymer-like flexibility of easy bending and curling, and has superior ferroelectricity.

The invention provides a p-type sensing, storage and calculation integrated device based on single crystal Bi2O2Se, and belongs to the technical field of semiconductor device preparation. According to the device, a strong p-type Bi2O2Se thin film which is stable in air is selected as a base material of the device, and effective capture of photon-generated carriers is realized by utilizing a stable and controllable oxygen defect injection technology and intrinsic ferroelectricity of the material, so that stable non-volatile photoelectric response is realized in the single Bi2O2Se thin film, and then the stable sensing, storage and calculation integrated device is prepared. According to the invention, a new normal form for realizing a complex function by a single material is created: by utilizing a collaborative mechanism of defect engineering and ferroelectricity, the electrically erasable nonvolatile photoelectric response is realized in the single material, the complex and uncontrollable heterojunction problem in the traditional scheme is fundamentally avoided, the process is greatly simplified, and the cost is reduced. And the uniformity, the stability and the yield of the device are improved.

The application discloses an electronic and optoelectronic fiber drawing tower, and belongs to the technical field of electronic and optoelectronic fiber drawing, which comprises a tower body, a suspension system, a feeding system, a heating system, a diameter measuring system, a drawing system, a winding system and an attribute imparting system, the suspension system drives the spatial movement and rotation of a preform rod, the feeding system feeds an inner core wire to the preform rod, the heating system is used for heating the preform rod to a drawing state, the diameter measuring system is used for monitoring the diameter of an initial fiber, the drawing system is used for receiving and drawing the initial fiber, the winding system is used for winding and storing a finished fiber, and the attribute imparting system is used for imparting the inner core wire with magnetic, piezoelectric or ferroelectric properties. The drawing speed can be adjusted according to the monitored data, the electronic and optoelectronic fiber high-precision drawing can be satisfied, the current problem that electronic and optoelectronic fiber is difficult to realize high-efficiency and high-quality drawing is effectively solved, and the inner core wire can be imparted with magnetic, piezoelectric or ferroelectric properties.

The application discloses a flexible hafnium oxide-based ferroelectric memcapacitor integrated array and a preparation method thereof. The flexible hafnium oxide-based ferroelectric memcapacitor integrated array comprises, from top to bottom, a patterned top electrode, a patterned ferroelectric layer, a patterned bottom electrode and a flexible mica substrate. The ferroelectric layer is a hafnium oxide ferroelectric film doped with zirconium. The bottom electrode and the top electrode are both metal tungsten prepared by electron beam evaporation. The ferroelectric memcapacitor is integrated on the flexible mica substrate, so that the ferroelectric memcapacitor can withstand deformation such as bending and stretching and still has good ferroelectric performance and memcapacitor characteristics under different bending conditions, and is suitable for flexible electronic applications.

The invention provides a lead-free (La, Bi) FeO3 film with an adjustable polymorphic negative capacitance effect and a preparation method thereof. The lead-free (La, Bi) FeO3 film comprises a substrate layer, and a first electrode layer, a ferroelectric material layer and a second electrode layer which are sequentially stacked on the substrate layer, the ferroelectric material layer comprises bismuth ferrite doped with rare earth elements, and the doping content of the rare earth elements in the bismuth ferrite is 15%-30%. According to the lead-free (La, Bi) FeO3 thin film, the ferroelectricity of bismuth ferrite is converted, steady-state negative capacitance is achieved, and lead-free, high polarization intensity and adjustable phase change voltage are achieved.

The application provides a ferroelectric photovoltaic semiconductor material Hg 0.75 Pb 0.25 MnO3. The application also provides a method for preparing the ferroelectric photovoltaic semiconductor material Hg 0.75 Pb 0.25 MnO3, which comprises the following steps: (1) mixing PbO, HgO and MnO2 in a molar ratio of 1:3:4 to obtain a mixture; then grinding the mixture to obtain a powder; (2) sealing the powder obtained in step (1) and then performing a heating and pressurizing treatment, quenching and pressure releasing to a room temperature environment to obtain the ferroelectric photovoltaic semiconductor material Hg 0.75 Pb 0.25 MnO3. The application also provides the ferroelectric photovoltaic semiconductor material Hg 0.75 Pb 0.25 MnO3 according to the application or the ferroelectric photovoltaic semiconductor material Hg 0.75 Pb 0.25 MnO3 prepared by the method according to the application. The ferroelectric photovoltaic semiconductor material Hg 0.75 Pb 0.25 MnO3 has ferroelectricity at room temperature and good environmental stability, can reverse the photoelectric current direction with the direction of an external field, and has the characteristics of absorbing visible light.

This invention relates to the field of dielectric materials technology, specifically to a multi-element rare earth-doped modified bismuth ferrite-based ceramic and its preparation method. The method employs a standard solid-state reaction sintering process, which includes drying the raw materials, weighing them according to the correct stoichiometric ratio, batching, ball milling, drying, sieving, and pressing to obtain a BiFeO3-based ceramic green body. Finally, it is sintered at a high temperature of 900℃ to form a ceramic. This ceramic exhibits good ferroelectricity and magnetism, and possesses excellent magnetoelectric coupling. Furthermore, the preparation method is simple to implement and can be mass-produced.