32results about How to "Realize the logic function" patented technology

The invention discloses a transponder simulation system and a test system in rail traffic. The simulation system comprises a bridge simulation module, a vehicle dynamics module, a lineside simulation module, an interlocking simulation module and a lineside electronic unit (LEU) simulation module; the bridge simulation module is used for simulating an actual bridge; the vehicle dynamics module is used for obtaining a speed and a position of a simulation vehicle according to status data acquired by the bridge simulation module and actual parameters of a train; the LEU simulation module is used for establishing communication connection between the interlocking simulation module and the lineside simulation module; the lineside simulation module is used for simulating lineside elements and sending a transponder message according to the speed and the position of the simulation vehicle and the position of a transponder in a line; and the interlocking simulation module is used for driving simulation lineside elements according to state information of the simulation lineside elements. The test system comprises the simulation system and a tester. According to the transponder simulation system and the test system, sending time of messages of the transponder can be really simulated, and reliable detection of the transponder is facilitated.

The invention discloses an AND logic gate and an NAND logic gate based on magnetic skyrmion. The magnetic skyrmion is placed in the annular magnetic racing track. A voltage driving mode is adopted toenable the skyrmion to circularly move in the magnetic racing track, and the state of the skyrmion in the magnetic racing track is read through the magnetic tunnel junction, so that the logic functions of the AND gate and the NAND gate are realized, and the stability of the NOT gate based on the skyrmion and the AND gate in use is ensured.

The invention relates to a full-gloss logic XNOR gate structure based on a micro-ring resonator structure, comprising a first nanowire waveguide, a second nanowire waveguide and a micro-ring resonant cavity, wherein the first nanowire waveguide and the second nanowire waveguide are parallel to each other, the micro-ring resonant cavity is positioned between the first nanowire waveguide and the second nanowire waveguide, gaps are respectively arranged between the micro-ring resonant cavity and the first nanowire waveguide and between the micro-ring resonant cavity and the second nanowire waveguide and ensure that the micro-ring resonant cavity satisfies critical coupling conditions so that light waves satisfying the resonant wavelength of the micro-ring resonant cavity can be completely coupled in the micro-ring resonant cavity through the first nanowire waveguide or the second nanowire waveguide, and the light extinction is realized on the output end of the first nanowire waveguide orthe second nanowire waveguide. The invention utilizes the two-photon absorption effect in the micro-ring resonant cavity to realize the logic function of full-gloss 'XNOR'.

The invention relates to the technical field of integrated circuits, in particular to a reconfigurable threshold logic unit based on an SET (Single Electron Transistor) / MOS (Metal Oxide Semiconductor) composite structure and composed of nano devices. The reconfigurable threshold logic unit comprises a four-input SET / MOS composite circuit, a first phase inverter and a second phase inverter, wherein the output ends of the first phase inverter and the second phase inverter are respectively connected with an input end of the SET / MOS composite circuit; the input end is offset, but the device parameters of the circuit are not changed, thus, the logic unit can realize OR, NOR, AND and NAND logic functions. The reconfigurable threshold logic unit is simple in structure, low in power consumption, high in integration level, higher in reconfigurability and capable of effectively realizing different logic functions of the same unit. Due to the existence of the characteristics, the reconfigurable threshold logic unit can be applied to super-large-scale integrated circuits such as an FPGA (Field Programmable Gate Array), an artificial neural network and the like with low power consumption and high integration level.

The invention discloses a magnetic skyrmion-based JK trigger with an annular magnetic track structure. The magnetic skyrmion is placed in the annular magnetic racing track; a voltage driving mode is adopted to enable the skyrmion to circularly move in the magnetic racing track, and the state of the skyrmion in the magnetic racing track is read through the magnetic tunnel junction, so that the logic function of the JK trigger is realized, and the stability of the JK trigger based on the skyrmion in use is ensured.

The present invention relates to a power dispatching remote operation broadcasting forecasting method based on a power dispatching remote control broadcasting forecasting system. The system includes a dispatching terminal and a plant station terminal, and the dispatching terminal is connected to the plant station terminal; the dispatching terminal includes a monitoring machine , a dispatching automation system and a communication room, the monitoring machine is connected to the dispatching automation system, and the dispatching automation system is connected to the communication room; the station end includes a communication room, a main control room, a high voltage room, field and a broadcast system, the communication room is connected to the main control room, and the main control room is respectively connected to the high voltage room and the variable electric field through the broadcast system. The electric power dispatching remote control operation broadcast forecasting system of the present invention has small investment and great effect, effectively reduces safety risks and avoids personal safety accidents.

The invention relates to an embryonic hardware reconfiguration control configuration circuit, which uses a multiplexer tree MuxTree as a basic primitive cell to form an embryonic electronic array circuit, wherein each basic primitive cell of the multiplexer tree MuxTree is composed of a programmable function module (FU ), switch module (SB) and storage unit (CREG). The programmable function module (FU) mainly includes a 2-to-1 multiplexer and a D-type flip-flop (F) that realizes clock timing behavior; the switch module (SB) provides input buses in four directions, southeast, northwest, and basic principles. The interconnection between the output terminal (NOUT) of the cell and the output buses in the four directions of east, west, and north. The embryonic hardware reconfiguration control configuration circuit of the present invention can accurately configure configuration bit strings into corresponding array units, realize the logic function of modulo 4 counting, and spend less time, fully meeting the real-time requirements of configuration.