Use of amorphous carbon hard mask for gate patterning to eliminate requirement of poly re-oxidation,Methods for uniform doping of non-planar transistor structures,Removal of charged defects from metal oxide-gate stacks,Methods for uniform doping of non-planar transistor structures,Solder jointing system, solder jointing method, semiconductor device manufacturing method, and semiconductor device manufacturing system

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87 results about "Re oxidation" patented technology

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Use of amorphous carbon hard mask for gate patterning to eliminate requirement of poly re-oxidation

InactiveUS6884733B1Semiconductor/solid-state device manufacturingSemiconductor devicesElectrical conductorPolysilicon gate

A method of producing an integrated circuit eliminates the need to re-oxidize polysilicon gate conductors and lines prior to removal of a hard mask used to form the gate conductors. A layer of polysilicon is provided above a semiconductor substrate. The layer of polysilicon is then doped. A mask material comprising amorphous carbon is provided above the layer of polysilicon, and the layer of mask material is patterned to form a mask. A portion of the layer of polysilicon is removed according to the mask, and the mask is removed.

Use of amorphous carbon hard mask for gate patterning to eliminate requirement of poly re-oxidation

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Owner:ADVANCED MICRO DEVICES INC

Methods for uniform doping of non-planar transistor structures

InactiveUS20080085580A1Semiconductor/solid-state device manufacturingSemiconductor devicesRe oxidationMaterials science

Methods for uniformly tip doping a silicon body of a non-planar transistor and devices and systems formed by such methods. In one embodiment, a method can include vertical tip ion implantation of a silicon body with at least three surfaces on a substrate followed by conformal deposition of a dielectric material. The dielectric material can be selectively etched to expose a top surface of the silicon body followed by selective re-oxidation of the top surface for form a mask. The remaining dielectric material can be removed followed by angled ion implantation of at least two sidewalls of the silicon body. The mask can be removed resulting in a silicon body with uniform doping.

Methods for uniform doping of non-planar transistor structures

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Owner:INTEL CORP

Removal of charged defects from metal oxide-gate stacks

InactiveUS7488656B2High carrier mobilityEliminate oxygen vacanciesTransistorSemiconductor/solid-state device manufacturingCapacitanceDielectric

The present invention provides a method for removing charged defects from a material stack including a high k gate dielectric and a metal contact such that the final gate stack, which is useful in forming a pFET device, has a threshold voltage substantially within the silicon band gap and good carrier mobility. Specifically, the present invention provides a re-oxidation procedure that will restore the high k dielectric of a pFET device to its initial, low-defect state. It was unexpectedly determined that by exposing a material stack including a high k gate dielectric and a metal to dilute oxygen at low temperatures will substantially eliminate oxygen vacancies, resorting the device threshold to its proper value. Furthermore, it was determined that if dilute oxygen is used, it is possible to avoid undue oxidation of the underlying semiconductor substrate which would have a deleterious effect on the capacitance of the final metal-containing gate stack. The present invention also provides a semiconductor structure that includes at least one gate stack that has a threshold voltage within a control range and has good carrier mobility.

Removal of charged defects from metal oxide-gate stacks

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Owner:INT BUSINESS MASCH CORP

Methods for uniform doping of non-planar transistor structures

InactiveUS7494862B2Semiconductor/solid-state device manufacturingSemiconductor devicesRe oxidationIon implantation

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Owner:INTEL CORP

Solder jointing system, solder jointing method, semiconductor device manufacturing method, and semiconductor device manufacturing system

InactiveUS20020130164A1Reduce capacitySafe and cleanPrinted circuit assemblingMuffle furnacesEngineeringSemiconductor

There are provided a chamber having openings which are opened to an outer air and through which a solder-adhered object w is passed and having a heating / melting area and carrying areas arranged adjacent to the heating / melting area, a carrying mechanism for carrying the solder-adhered object w into the heating / melting area, a formic-acid supplying means for supplying a formic acid into the heating / melting area, an exhausting means for exhausting a gas from the heating / melting area and its neighboring area to lower a pressure in the heating / melting area rather than an outer air, heating means for heating directly or indirectly the solder-adhered object w in the heating / melting area, and air-stream suppressing means for disturbing a gas flow between the heating / melting area and the carrying areas. Accordingly, there can be provided a solder jointing system for jointing solder layers of the semiconductor device, the electronic device, or the like to the wirings or the pads, which is capable of having a high processing ability and preventing re-oxidation.

Solder jointing system, solder jointing method, semiconductor device manufacturing method, and semiconductor device manufacturing system

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Owner:SOCIONEXT INC

Method for fabricating transistor with polymetal gate electrode

InactiveUS7029999B2Gate resistance increasePrevent oxidationSemiconductor/solid-state device manufacturingSemiconductor devicesInsulation layerSilicon oxide

The present invention is related to a method for fabricating a transistor with a polymetal gate electrode structure. The method includes the steps of: forming a gate insulation layer on a substrate; forming a patterned gate stack structure on the gate insulation layer, wherein the patterned stack structure includes a polysilicon layer as a bottom layer and a metal layer as an upper layer; forming a silicon oxide-based capping layer along a profile containing the patterned gate stack structure and on the gate insulation layer at a predetermined temperature that prevents oxidation of the metal layer; and performing a gate re-oxidation process.

Method for fabricating transistor with polymetal gate electrode

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Owner:SK HYNIX INC

Method for fabricating semiconductor device

ActiveUS20070066013A1Reduce increase in interfacial resistanceSemiconductor/solid-state device manufacturingInsulation layerDevice material

A method for fabricating a semiconductor device includes forming a gate insulation layer over a substrate, forming a first gate conductive layer over the gate insulation layer, forming a barrier metal over the first gate conductive layer, sequentially forming a second gate conductive layer and a gate hard mask over the barrier metal, patterning the gate hard mask, the second gate conductive layer, the barrier metal, the first gate conductive layer, and the gate insulation layer to form a gate pattern, and performing a plasma selective gate re-oxidation process on the gate pattern.

Method for fabricating semiconductor device

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Owner:SK HYNIX INC

Selective plasma re-oxidation process using pulsed RF source power

ActiveUS7141514B2Resist formationElectric discharge tubesSemiconductor/solid-state device manufacturingOxygenVacuum chamber

A transistor gate selective re-oxidation process includes the steps of introducing into the vacuum chamber containing the semiconductor substrate a process gas that includes oxygen while maintaining a vacuum pressure in the chamber. An oxide insulating layer on the order of several Angstroms in thickness is formed by generating a plasma in a plasma generation region within the vacuum chamber during successive “on” times, and allowing ion energy of the plasma to decay during successive “off” intervals separating the successive “on” intervals, the “on” and “off” intervals defining a controllable duty cycle. During formation of the oxide insulating layer, the duty cycle is limited so as to limit formation of ion bombardment-induced defects in the insulating layer, while the vacuum pressure is limited so as to limit formation of contamination-induced defects in the insulating layer.

Selective plasma re-oxidation process using pulsed RF source power

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Owner:APPLIED MATERIALS INC

Method and system for modularized combined treatment of high-difficulty organic waste water

ActiveCN102826697AImprove applicabilityEasy to handleWater contaminantsMultistage water/sewage treatmentTreatment effectSludge

The invention discloses a method and a system for modularized combined treatment of high-difficulty organic waste water, and the treatment system comprises: a primary settling tank, an adjusting tank, a reinforced flocculation tank, a precipitation separation tank, a secondary flocculation settling tank, a buffering water tank, a pH adjusting tank, a primary honeycomb microelectrolytic tank, a flocculation settling tank, a secondary honeycomb microelectrolytic tank, an intermediate tank, a heat exchanger, a microwave catalytic oxidation device, a secondary catalytic oxidation pot, and a re-oxidation filter pipe. The treatment method adopts a combined technical scheme of a multistage honeycomb iron carbon microelectrolytic module, a reinforced flocculation module and a microwave electro-catalytic oxidation module; the invention has the characteristics of high applicability, good treatment effect, and unit modularization; the modules can be combined and cascaded freely according to the waste water condition, and thus different waste water treatment effect requirements and waste water quantity requirements are adapted; the operation cost is low; the sludge amount is low; no secondary pollution is caused; and the method is an environment-friendly high-difficulty waste water treatment method.

Method and system for modularized combined treatment of high-difficulty organic waste water

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Owner:山东泰山行星环保科技有限公司

Method for preparing carbon nano-tube loading ruthenium oxide hydration composite material

InactiveCN101122040AIncrease loadIncrease profitFixed capacitor electrodesElectrolytic organic material coatingHigh volume manufacturingCarbon nanotube

The invention provides a method of preparing a carbon nano pipe load hydrous ruthenium oxide composite material. First, an electric deposition solution is prepared, and then the carbon nano pipes are spread in the main solution; the ruthenium hydroxide is deposited and loaded on the carbon nano pipes through the electric deposition method, to form the precursor of the carbon nano pipe load hydrous ruthenium oxide composite material; the carbon nano pipes / ruthenium hydroxide settling after the electric deposition are put into a drying box to receive heat treatment, and after natural cooling, the carbon nano pipe load hydrous ruthenium oxide nano powder composite material is obtained. The invention has simple preparing conditions, easy to realize, does not include the complicated technology of re-oxidation treatment after traditional deposition of ruthenium trichloride and alkalinesubstance, so as to prevent introduction of impurity ion, make sure of high purity of products, prevent deficiencies of low output and difficulty in realizng industrialization, can prepare a large amount of carbon nano pipe / hydrous ruthenium oxide compound powder, and helps in industrial large-scale production.

Method for preparing carbon nano-tube loading ruthenium oxide hydration composite material

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Owner:HARBIN ENG UNIV

Method of fabricating nitrogen-containing gate dielectric layer and semiconductor device

ActiveUS7312139B2Reduce leakage currentIncrease productionSemiconductor/solid-state device manufacturingGate dielectricNitrogen doped

A method of fabricating a nitrogen-containing gate dielectric layer is described. First, a gate dielectric layer is formed on a substrate by performing a dilute wet oxidation process. Then, a nitridation step is performed for doping nitrogen into the gate dielectric layer. After that, a re-oxidation step is performed for repairing the nitrogen-doped gate dielectric layer. The above steps are carried out inside the same reaction chamber. Moreover, two or more wafers can be treated inside the reaction chamber at the same time.

Method of fabricating nitrogen-containing gate dielectric layer and semiconductor device

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Owner:UNITED MICROELECTRONICS CORP

SiO2 granule surface molecule print adsorption agent and preparation thereof

InactiveCN101234329ASimple preparation processHigh selectivityOther chemical processesSilicon compoundsFunctional monomerSorbent

The invention provides a molecular blot absorbent of a SiO2 particle surface in a water phase system and a preparation method thereof, which overcomes the defects of low identification ability and low service life caused by mismatched solvent polarity or by using toxic organic solvent in synthesis in the prior art. The preparation method is provided with the following steps: firstly, activating treatment is adopted to SiO2 particles, and the particles react with a functional monomer and target phenolic pollutants such as one of chlorophenols or nitrophenol to form a complex type precursor body; the molecular blot absorbent of the SiO2 particle surface is obtained through polymerization and post treatment after the re-oxidation. The molecular blot absorbent of the invention is simple in preparation technique and low in cost; the absorbent has high selectivity in target molecules, a fast balancing speed in absorption and de-sorption and can be repeatedly used.

SiO2 granule surface molecule print adsorption agent and preparation thereof

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Owner:HUAZHONG UNIV OF SCI & TECH

Method for fabricating semiconductor device with use of partial gate recessing process

InactiveUS20050095797A1Avoid mechanical stressSemiconductor/solid-state device manufacturingSemiconductor devicesGate dielectricDevice material

Disclosed is a method for fabricating a semiconductor device with a polymetal gate electrode formed by a partial gate recessing process. The method includes the steps of forming a gate structure including a gate dielectric layer, a polysilicon layer, a metal layer, an etch stop layer and a sacrificial layer sequentially formed on a substrate; selectively performing a re-oxidation process to the gate structure; forming a spacer on each sidewall of the gate structure; implanting ions in the substrate for forming source/drain regions; selectively removing the sacrificial layer of the gate structure to form a recess; and filling an insulating hard mask into the recess for use in a self-aligned contact etching process.

Method for fabricating semiconductor device with use of partial gate recessing process

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Owner:SK HYNIX INC

Application of nano reduced graphene oxide serving as antibacterial material

InactiveCN101990900AImprove antibacterial propertiesBiocideDisinfectantsFiltrationPolyvinylidene difluoride

The invention discloses the application of nano reduced graphene oxide serving as an antibacterial material, in particular relates to the application of nano reduced graphene oxide suspension or a nano reduced graphene oxide membrane serving as an antibacterial material. The preparation method of the nano reduced graphene oxide suspension comprises the following steps of: pre-oxidation of graphite, separation of a pre-oxidized product, re-oxidation, purification of an oxidation product and reduction of the oxidation product. The nano reduced graphene oxide film is prepared by performing suction filtration on the nano reduced graphene oxide suspension by using a polyvinylidene fluoride (PVDF) membrane of which the mesh is 0.22 mu m. Through the application of the nano reduced graphene oxide serving as the antibacterial material, the nano reduced graphene oxide serving as an additive can be prepared into a product with an antibacterial property or prepared into an antibacterial coating material, which is applied to medicines and daily life.

Application of nano reduced graphene oxide serving as antibacterial material

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Owner:SHANGHAI INST OF APPLIED PHYSICS - CHINESE ACAD OF SCI

Re-oxidation approach to improve peripheral gate oxide integrity in a tunnel nitride oxidation process

InactiveUS6436778B1Solid-state devicesSemiconductor/solid-state device manufacturingNitrogenOxygen

A process for fabricating a semiconductor device 20 that includes providing semiconductor substrate 28 having a core region 24 and a peripheral gate region 26. The semiconductor substrate 28 has at least one shallow trench isolation region 30 and at least one nitrogen-contaminated region 36 in the peripheral gate region 26. A tunnel oxide layer 34 overlies the semiconductor substrate 28 and a first polysilicon layer 38 overlies the tunnel oxide layer 34 in the core region 24. An ONO layer 40 overlies the first polysilicon layer 38 in the core region 24. The process further includes growing a sacrificial oxide layer 42 overlying the nitrogen-contaminated region 36 in the peripheral gate region 26, wherein oxygen from within the sacrificial oxide layer 42 diffuses into the nitrogen-contaminated region 36 and forms silicon dioxide. By allowing oxygen from within the sacrificial oxide layer 42 to diffuse into the nitrogen-contaminated region 36 and form silicon dioxide, the nitrogen 56 can be removed from within the semiconductor substrate 28 by removing the silicon dioxide.

Re-oxidation approach to improve peripheral gate oxide integrity in a tunnel nitride oxidation process

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Owner:MONTEREY RES LLC

Preconditioning treatment to enhance redox tolerance of solid oxide fuel cells

InactiveUS20060141300A1Improve toleranceCell electrodesFuel cell auxillariesFuel cellsPre-condition

A high temperature, redox tolerant fuel cell anode electrode and method of fabrication in which the anode electrode is pre-conditioned by application of an initial controlled redox cycle to the electrode whereby an initial re-oxidation of the anode electrode is carried out at temperatures less than or equal to about 650° C.

Preconditioning treatment to enhance redox tolerance of solid oxide fuel cells

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Owner:VERSA POWER SYST

Gate structure

InactiveUS20080157231A1Improve device performanceInferior propertySemiconductor/solid-state device manufacturingSemiconductor devicesGate dielectricNitrogen

A method of fabricating a gate structure is provided. First, a sacrificial oxide layer is formed on a substrate. A nitridation treatment process is performed to redistribute the nitrogen atoms in the sacrificial layer and the substrate and produce a concentration profile such that the concentration of nitrogen progressively increases and then decreases toward the substrate with the maximum concentration of nitrogen in the sacrificial oxide layer. Next, the sacrificial oxide layer is removed. A re-oxidation process is performed to produce an interface layer on the surface of the substrate. A high K (dielectric constant) gate dielectric layer, a barrier layer and a metal layer are sequentially formed on the substrate. The metal layer, the barrier layer, the high K gate dielectric layer and the interface layer are defined to form a stacked gate structure.

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Owner:UNITED MICROELECTRONICS CORP

Semiconducting ceramic material, process for producing the ceramic material, and thermistor

InactiveUS20030030192A1Excellent PTC characteristicLow densityCeramic shaping apparatusPositive temperature coefficient thermistorsReducing atmosphereThermistor

A BaTiO3-type semiconducting ceramic material which has undergone firing in a reducing atmosphere and re-oxidation, wherein the relative density of the ceramic material after sintering is about 85-90%. A process for producing the semiconducting ceramic material of the present invention and a thermistor containing the semiconducting ceramic material are also disclosed.

Semiconducting ceramic material, process for producing the ceramic material, and thermistor

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Owner:MURATA MFG CO LTD

Smelting reduction iron-making device and method for avoiding re-oxidation of pre-reduction ores

ActiveCN105296699AAvoid reoxidationFlexible matchingShaft furnaceCombustionShaft furnace

The invention discloses a smelting reduction iron-making device and method for avoiding re-oxidation of pre-reduction ores, and belongs to the technical field of smelting reduction iron making. The smelting reduction iron-making device adopts an existing shaft furnace and an iron bath furnace as reduction reactors and also comprises a feed port which is used for conveying pre-reduction ores generated by the shaft furnace to the furnace body side surface of the iron bath furnace by adopting a pre-reduction furnace charge descending passage, the furnace charge is further pressed into a slag blanket of the iron bath furnace to avoid the pre-reduction ores from contacting with gas in a free space in the upper part of the iron bath furnace and generating re-oxidation, thereby ensuring that the secondary combustion rate of the gas in the free space is not limited. Three layers of spray guns are arranged on the furnace body of the iron bath furnace, and the secondary combustion rate and the temperature of the gas in the furnace can be adjusted by adjusting the oxygen blowing ratio and the coal injection ratio as well as the total oxygen blowing quantity and the total coal injection quantity of the three layers of the spray guns, thereby providing sufficient heat for a melting bath in the iron bath furnace.

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Owner:NORTHEASTERN UNIV

Method for forming a gate electrode in a semiconductor device including re-oxidation for restraining the thickness of the gate oxide

InactiveUS6905927B2Reduce thickness differenceImprove variationSolid-state devicesSemiconductor/solid-state device manufacturingDevice materialGate oxide

A semiconductor device and method of production are disclosed, the method including forming a preliminary gate electrode on a semiconductor substrate, the preliminary gate electrode including a gate oxide layer pattern and a conductive layer pattern stacked on the gate oxide layer pattern, and performing a re-oxidation process for curing damage of the semiconductor substrate and / or a sidewall of the conductive layer pattern, when the preliminary gate electrode is formed by forming an oxide layer on an outer surface of the preliminary gate electrode and on the semiconductor substrate, by supplying an oxygen gas and a chlorine-including gas while restraining a thickness of the gate oxide layer pattern from being increased; and the semiconductor device comprising a preliminary gate electrode formed on a semiconductor substrate, the preliminary gate electrode including a gate oxide layer pattern and a conductive layer pattern stacked on the gate oxide layer pattern, and a re-oxidized semiconductor substrate and / or a sidewall of the conductive layer pattern, with damage cured therein by supplying an oxygen gas and a chlorine-including gas while restraining a thickness of the gate oxide layer pattern from being increased.

Method for forming a gate electrode in a semiconductor device including re-oxidation for restraining the thickness of the gate oxide

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Owner:SAMSUNG ELECTRONICS CO LTD

Electron mobility enhancement for MOS devices with nitrided polysilicon re-oxidation

InactiveUS20080124861A1Semiconductor/solid-state device manufacturingSemiconductor devicesGate dielectricSemiconductor structure

A semiconductor structure includes a PMOS device and an NMOS device. The PMOS device includes a first gate dielectric on a semiconductor substrate, a first gate electrode on the first gate dielectric, and a first gate spacer along sidewalls of the first gate electrode and the first gate dielectric. The NMOS device includes a second gate dielectric on the semiconductor substrate, a second gate electrode on the second gate dielectric, a nitrided polysilicon re-oxidation layer having a vertical portion and a horizontal portion wherein the vertical portion is on sidewalls of the second gate electrode and the second gate dielectric and wherein the horizontal portion is on the semiconductor substrate, and a second gate spacer on sidewalls of the second gate electrode and the second gate dielectric, wherein the second gate spacer is on the horizontal portion of the nitrided polysilicon re-oxidation layer.

Electron mobility enhancement for MOS devices with nitrided polysilicon re-oxidation

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Owner:TAIWAN SEMICON MFG CO LTD

Method for fabricating semiconductor device with use of partial gate recessing process

InactiveUS7074661B2Avoid mechanical stressSemiconductor/solid-state device manufacturingSemiconductor devicesGate dielectricIon implantation

Disclosed is a method for fabricating a semiconductor device with a polymetal gate electrode formed by a partial gate recessing process. The method includes the steps of forming a gate structure including a gate dielectric layer, a polysilicon layer, a metal layer, an etch stop layer and a sacrificial layer sequentially formed on a substrate; selectively performing a re-oxidation process to the gate structure; forming a spacer on each sidewall of the gate structure; implanting ions in the substrate for forming source / drain regions; selectively removing the sacrificial layer of the gate structure to form a recess; and filling an insulating hard mask into the recess for use in a self-aligned contact etching process.

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Owner:SK HYNIX INC

Method for forming semiconductor devices having reduced gate edge leakage current

ActiveUS7456115B2Semiconductor/solid-state device manufacturingSemiconductor devicesEngineeringDrain current

The present invention provides methods for forming semiconductor FET devices having reduced gate edge leakage current by using plasma or thermal nitridation and low-temperature plasma re-oxidation processes post gate etch.

Method for forming semiconductor devices having reduced gate edge leakage current

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Owner:TAIWAN SEMICON MFG CO LTD

Preparation method for carbon extracting and manganese retaining of high-manganese high-silicon and high-phosphorus molten iron through converter smelting

ActiveCN109055649AGood dephosphorizationImprove desulfurization effectManufacturing convertersProcess efficiency improvementSteelmakingLead smelting

The invention discloses a preparation method for carbon extracting and manganese retaining of high-manganese high-silicon and high-phosphorus molten iron through converter smelting, wherein the high-manganese high-silicon and high-phosphorus molten iron comprises, by weight, 1.10-1.50% of Mn, 0.70-1.00% of Si, 0.120-0.170% of P, and 0.035% or the less of S. According to the preparation method, theprocesses such as slag retaining operation, double-slag slag making process, less slag smelting, constant-pressure gun changing operation in the smelting process, converter direct lowest-gun-positiongun pressing operation, slag washing in the steel discharging process, and whole-process bottom argon blowing are adopted and integrally innovated, thus kinetics and thermodynamic conditions of a smelting reaction are optimized, the good smelting slagging dephosphorization and desulfurization effects are obtained, splashing of molten steel and slag in the smelting process is avoided, the distribution concentration in the slag (MnO) is effectively increased, reduction in the slag (MnO) at the smelting medium stage is promoted, re-oxidation of Mn in the molten steel at the smelting later stageis lowered, the end point molten steel residual Mn content (0.35-0.55wt%) is significantly increased, the adding amount of a manganese-series alloy in the deoxidizing alloying process is reduced, steelmaking alloy consumption and the alloying cost are significantly lowered, and the product market competitiveness is improved.

Owner:WUKUN STEEL

Resource utilization method of electric furnace bag dusting ash

InactiveCN110055410ANo emissionsAchieve recyclingGlass making apparatusProcess efficiency improvementSlagResource utilization

The invention provides a resource utilization method of electric furnace bag dusting ash. The resource utilization method of the electric furnace bag dusting ash comprises the following steps that a)adding a reducing agent, a binder and water into the electric furnace bag dusting ash, uniformly stirring is performed, and putting the mixture into a pelletizing machine for pelletizing to obtain a semi-finished iron carbon ball; b) naturally curing the prepared semi-finished iron carbon ball or drying the prepared semi-finished iron carbon ball at 105-110 DEG C; and c) putting the dried iron carbon ball into a rotary-bottom reduction furnace for heating and reducing, controlling the temperature of the rotary-bottom reduction furnace to be 1100-1400 DEG C, carrying out heat preservation for 25-45 minutes, collecting volatile smoke dust and reducing furnace slag, and collecting the collected smoke dust as a crude zinc product. According to the method, the zinc element is reduced by using the electric furnace bag dusting ash, the zinc element is subjected to air re-oxidation, then the purpose of extracting and recovering the zinc element is achieved, heavy metal indexes of residual slagafter zinc extraction reach the national waste discharge standard, and the goal of zero emission treatment of solid waste is realized.

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Owner:ANHUI UNIVERSITY OF TECHNOLOGY

Direct alloying steelmaking process for manganese oxide composite briquettes used for re-blowing revolving furnace

InactiveCN101899604AHigh yieldRestore impactManufacturing convertersSteelmakingBriquette

The invention relates to direct alloying steelmaking process for manganese oxide composite briquettes used for a re-blowing revolving furnace. The technical scheme comprises the following steps of: when the carbon content of molten steel in the revolving furnace is reduced to less than 0.1 percent and the molten steel reaches the temperature of between 1,650 and 1,750DEG C, and adding manganese oxide composite briquettes into the revolving furnace at one time, wherein the manganese oxide composite briquettes, which undergo cold pressing and mixed with carbon, are quickly heated to above 1,500 DEG C by the heat of the molten steel in the revolving furnace, the manganese oxide is quickly self-reduced in the manganese oxide composite briquettes which undergo cold pressing and mixed with carbon, so that the aim of the direct alloying of the molten steel is achieved. Oxygen blowing is stopped in the revolving furnace after the manganese oxide composite briquettes are added into the revolving furnace in order to avoid the re-oxidation of manganese, but the uniformization of manganese in the molten steel is enforced by the bottom-blowing strengthening molten pool stirring of the revolving furnace. The process of the invention has the advantages of simple process, easy operation and control, high manganese yield, great energy conservation, low CO2 emission and low production cost of the alloying of the manganese in the molten steel.

Owner:WUHAN UNIV OF SCI & TECH

Electron mobility enhancement for mos devices with nitrided polysilicon re-oxidation

ActiveCN101179076ATransistorSemiconductor/solid-state device manufacturingGate dielectricSemiconductor structure

A semiconductor structure forming method. The PMOS device includes a first gate dielectric on a semiconductor substrate, a first gate electrode on the first gate dielectric, and a first gate spacer along sidewalls of the first gate electrode and the first gate dielectric. The NMOS device includes a second gate dielectric on the semiconductor substrate, a second gate electrode on the second gate dielectric, a nitrided polysilicon re-oxidation layer having a vertical portion and a horizontal portion wherein the vertical portion is on sidewalls of the second gate electrode and the second gate dielectric and wherein the horizontal portion is on the semiconductor substrate, and a second gate spacer on sidewalls of the second gate electrode and the second gate dielectric, wherein the second gate spacer is on the horizontal portion of the nitrided polysilicon re-oxidation layer.

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Owner:TAIWAN SEMICON MFG CO LTD

Method for manufacturing semiconductor device layer

InactiveCN102097379AImprove performanceWon't happenSemiconductor/solid-state device manufacturingSemiconductor devicesReverse short-channel effectSalicide

The invention discloses a method for manufacturing a semiconductor device layer. The method comprises the following steps of: after a well is formed on a substrate of a semiconductor device, forming an isolation shallow trench, and forming a grid on the substrate of the semiconductor device; performing ion implantation of carbon impurity on the grid and the substrate of the semiconductor device; after the surface of the grid and the surface of the substrate of the semiconductor device are re-oxidized, performing light dope on the grid and the substrate of the semiconductor device to form a shallow junction on the substrate of the semiconductor device; forming a nitrogen oxide side wall of the grid, doping the grid and the substrate of the semiconductor device, and performing deposition on the semiconductor device to form a drain and a source; and depositing metals on the surface of the grid and the semiconductor substrate by adopting a self-alignment silicide method to form metalized silicon layers, then performing quick annealing treatment, and etching the un-reacted metals. The method can effectively reduce the transient enhanced diffusion (TED) generated in the re-oxidation process of the grid so as to remarkably prevent the short trench of the semiconductor device from generating short channel effect (SCE) and reverse short channel effect (RSCE).

Method for manufacturing semiconductor device layer

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Owner:SEMICON MFG INT (SHANGHAI) CORP

Method of fabricating nitrogen-containing gate dielectric layer and semiconductor device

ActiveUS20060148179A1Reduce leakage currentIncrease productionSemiconductor/solid-state device manufacturingGate dielectricSemiconductor

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Owner:UNITED MICROELECTRONICS CORP

Method for preparing nearly-spherical tungsten powder

ActiveCN101983804AAvoid oxidation lossGood uniformity of shape distributionPrillTungsten

The invention provides a method for preparing nearly-spherical tungsten powder, which comprises the steps of drying at a temperature of 50 to 100 DEG C, oxidation at a temperature of 450 to 520 DEG C, alkaline washing by alkaline solution of which the OH<-> concentration is 3 to 8mol / L, cleaning, drying, and the like. In the invention, the oxidation treatment is performed on tungsten powder subjected to drying process. Because the area of sharp corners and edges of projecting parts of the tungsten powder is lager than the superficial area of the tungsten powder, the activity thereof is bigger, and the oxidation rate thereof in the process of oxidation is significantly higher than that of the flat surface of the tungsten powder. After removing the sharp corners and edges of projecting parts of the tungsten powder subjected to partial preferential re-oxidation by alkaline solution, nearly-spherical particles with surfaces smoother than that of original tungsten powder particles are formed. The nearly-spherical tungsten powder prepared by using the method of the invention has the advantage of good shape distribution uniformity; and meanwhile, the method of the invention is simple in process, low in production cost, and suitable for industrial production.

Owner:浙江至信新材料股份有限公司

87 results about "Re oxidation" patented technology

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