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284 results about "Logical analysis" patented technology

Multimodal input-based interactive method and device

The invention aims to provide an intelligent glasses device and method used for performing interaction based on multimodal input and capable of enabling the interaction to be closer to natural interaction of users. The method comprises the steps of obtaining multiple pieces of input information from at least one of multiple input modules; performing comprehensive logic analysis on the input information to generate an operation command, wherein the operation command has operation elements, and the operation elements at least include an operation object, an operation action and an operation parameter; and executing corresponding operation on the operation object based on the operation command. According to the intelligent glasses device and method, the input information of multiple channels is obtained through the input modules and is subjected to the comprehensive logic analysis, the operation object, the operation action and the operation element of the operation action are determined to generate the operation command, and the corresponding operation is executed based on the operation command, so that the information is subjected to fusion processing in real time, the interaction of the users is closer to an interactive mode of a natural language, and the interactive experience of the users is improved.
Owner:HISCENE INFORMATION TECH CO LTD

Simplified process to design integrated circuits

A set of tools is provided herein that produces useful, proven, and correct integrated semiconductor chips. Having as input either a customer's requirements for a chip, or a design specification for a partially manufactured semiconductor chip, the tools generate the RTL for control plane interconnect; memory composition, test, and manufacture; embedded logic analysis, trace interconnection, and utilization of spare resources on the chip; I / O qualification, JTAG, boundary scan, and SSO analysis; testable clock generation, control, and distribution; interconnection of all of the shared logic in a testable manner from a transistor fabric and / or configurable blocks in the slice. The input customer requirements are first conditioned by RTL analysis tools to quickly implement its logic. The slice definition and the RTL shell provides the correct logic for a set of logic interfaces for the design specification to connect. The tools share a common database so that logical interactions do not require multiple entries. The designs are qualified, tested, and verified by other tools. The tools further optimize the placement and timing of the blocks on the chip with respect to each other and with respect to placement on a board. The suite may be run as batch processes or can be driven interactively through a common graphical user interface. The tools also have an iterative mode and a global mode. In the iterative mode, one or more of the selected tools can generate the blocks or modify a design incrementally and then look at the consequences of the addition, or change. In the global mode, the semiconductor product is designed all at once in a batch process as above and then optimized altogether. This suite of generation tools generates design views including a qualified netlist for a foundry to manufacture.
Owner:BELL SEMICON LLC

Topology error-preventing checking method based on intelligent identification of state of equipment

The invention provides a topology error-preventing checking method based on intelligent identification of a state of equipment. The method comprises the following steps of: based on power grid real-time data, combining an SCADA (Supervisory Control and Data Acquisition) monitoring system to carry out object-oriented partial topology analysis to obtain information and real-time opening / closing states of a circuit breaker, an isolation switch, a bypass disconnecting link / earth wire in an equipment gap; and then, obtaining the state of electrical equipment through a logic analysis and analyzing whether the state of the equipment is normal or not; and obtaining influences to a power grid by equipment operations through analyzing changes of a power system before and after the equipment operations, so as to calculate a checked result and give out a prompt to realize the topology error-preventing checking. According to the invention, an intelligent identification function of the state of the equipment is realized and operation conditions of the equipment gap can be monitored in real time; once erroneous states are found, the system sends out an alarming prompt to accelerate a user to find and correct errors, so as to ensure the safe operation of the power grid. By comparing the changes of the power grid before and after the equipment operations to carry out checking, the accuracy of checking operations is ensured.
Owner:BEIJING KEDONG ELECTRIC POWER CONTROL SYST

Compiling method from intermediate language (IL) program to C language program of instruction list

InactiveCN103123590AFeasible grammatical conventionFeasible semantic analysisProgram controlMemory systemsPerformance functionLexical analysis
The invention discloses a compiling method from an intermediate language (IL) program to a C language program of an instruction list. The method comprises the steps: building a middle storage structure syntax tree according to results of lexical analysis and grammatical analysis through logical analysis on a program of the instruction list and logistic mapping relation between semanteme of the instruction list and semanteme of the C language; combining an auxiliary performance function and an auxiliary data structure define file, and generating an integrated file of the C language program through program data of an original instruction list according to a C language programming method, wherein the program data of the original instruction list is stored in the structure of the syntax tree. The generated C language program completely corresponds to the logic program of the original instruction list and has the advantages of a high-level C language, wherein the advantages include strong transportability, strong compatibility and the like. Due to the structure of the syntax tree and an analytic method of semanteme mapping, compiling is standardized and mass-produced, complexity of the compiling is reduced through adoption of functions and modularization of an auxiliary function of a function block, compiling time is shortened, and speed of the whole compiling process is improved.
Owner:中国科学院沈阳计算技术研究所有限公司

Integrated logic analysis module based on PCIe (peripheral component interconnection express) for FPGA (field programmable gate array)

ActiveCN102495920ASolve the situation where the margin is not enoughMeet the transmission protocol requirementsSpecial data processing applicationsInternal memoryComputer architecture
An integrated logic analysis module based on PCIe (peripheral component interconnection express) for an FPGA (field programmable gate array), which comprises a trigger controller, a DMA (direct memory access) controller, a message transmitting engine, a message receiving engine and a PCIe receiving and transmitting controller. The integrated logic analysis module not only can realize all functions of SignalTap or Chipscope, but also can solve the problem of insufficient allowance of a Block RAM (random access memory) in a large-size design, and at the moment, as data are exported and stored in an internal memory of a CPU (central processing unit) side instead of being stored in a chip, sufficient data can be collected under permission of the internal memory. In addition, a trigger module is a register-level code, accordingly, more complicated triggering setting can be realized only by means of modifying the code, and the integrated logic analysis module is far more flexible than the SignalTap or the Chipscope. Besides, in the large-sized design, a CPU and an FPGA are commonly arranged in the same system, a PCIe link is a common channel of multiple high-speed systems, and accordingly the integrated logic analysis module is wide in application.
Owner:南京中新赛克科技有限责任公司
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