2results about How to "Improve operational performance" patented technology

A semiconductor device and a method of fabricating the same are disclosed. The semiconductor device includes a substrate, a shallow trench isolation, a gate structure, a residue, and a spacer. The shallow trench isolation is disposed in the substrate and includes an inclined side surface at a side close to the substrate. The gate structure is disposed on the shallow trench isolation. The residue is disposed and physically contacts the inclined side surface of the shallow trench isolation. The spacer is disposed on a side wall of the gate structure and physically contacts the side wall of the gate structure, the shallow trench isolation, and the residue. Thus, the residue fills up a small recess or unevenness on a surface of the shallow trench isolation, thereby optimizing a component structure and performance of the semiconductor device.

The application belongs to the technical field of computer vision model publishing, and discloses a visual model continuous publishing method and system based on a high-risk scene slice regression gate. The method compares the performance of a candidate publishing model and a baseline model in the network at the slice level by constructing a high-risk scene slice set, generates a slice regression result, and determines passing slices and blocking slices based on hard gating and soft gating. The passing slices are subjected to conditional volume increase and online routing, and local rollback or global rollback is performed according to online monitoring results, and the baseline model in the network is updated after stabilization. The scheme can reduce the publishing risk caused by performance degradation in key scenes, and improve the safety and fine control ability of model continuous publishing.