The present disclosure relates to a method, device, equipment, storage medium and product for checking device connection relationship. The method comprises: obtaining a standard format
netlist file; obtaining a
node level matching checking program; using the program to perform
node level matching checking on the standard format
netlist file to obtain a node with an error level matching and a device with an error level connection relationship. The embodiment of the present disclosure can check the node with the error level connection relationship and the device in the
chip design, solve the error level driving problem by modifying the design or adding a level conversion circuit, and thus can solve the problem of
chip performance not meeting the expectation,
chip yield reduction or chip long-term failure from the design source.