A method of forming Monolithic
CMOS-MEMS
hybrid integrated, packaged structures includes the steps of providing: providing a
semiconductor substrate with pre-fabricated
cmos circuits on the front side and a polished back-side with through substrate conductive vias; forming at least one opening in the polished backside of the
semiconductor substrate by appropriately protecting the front-side; applying at least one filler material in the at least one opening on the
semiconductor substrate; positioning at least one prefabricated mems, nems or
cmos chip on the filler material, the
chip including a front face and a bare back face with the prefabricated mems / nems chips containing mechanical and
dielectric layers; applying at least one planarization layer overlying the substrate, filler material and the
chip; forming at least one via opening on a portion of the planarization layer
interfacing pads on the chip and the through substrate conductive vias; applying at least one metallization layer overlying the planarization layer on the substrate and the chip connecting the through substrate conductive vias to the at least one chip; applying at least one second insulating layer overlying the metallization layer; performing at least one micro /
nano fabrication etching step to release the mechanical layer on the prefabricated mems / nems chips; positioning protective cap to
package the integrated device over the mems / nems device area on the pre-fabricated chips.