48results about How to "Break through performance bottlenecks" patented technology

The invention provides a cloud service method for a taxation cloud computing network billing IM (instant messaging) online customer system, which adopts a cloud computing technology to perform overall structuring of the service. The method comprises the following step of effectively dividing resources through role positioning of the virtual computing node of the cloud platform of the tax industry, so that the limit of the single service structure of an IM software system in the original industry is broken through, free and flexible configuration of nodes is realized, namely, the configured node is used at once, the change of programs is not required, and the problems that service structure extending cannot be performed and an effective service load cannot be formed are solved; as various functional modules are developed by using a distributed computing language, the various functional modules can form code segment mirrors in the cloud computing platform, resource allocation can be dynamically performed on the various functional modules by the cloud computing platform, and the problems that the system resource is wasted and the resource is distributed unevenly can be solved; with the adoption of an independently developed database reverse message proxy module, a message mechanism is adopted to replace the original polling mechanism at the same time of state management information, so that the system efficiency is greatly improved and the bottleneck restriction of the system performance is broken through.

The invention discloses a 12-bit pipelined successive approximation analog-to-digital converter with low power consumption, which comprises a 6-bit sub-level successive approximation analog-to-digital converter, an operational amplifier, a 7-bit sub-level successive approximation analog-to-digital converter and a digital delay calibration unit. The residual signal output of the 6-bit sub-stage successive approximation analog-to-digital converter is connected to the input terminal of the operational amplifier, and the digital signal of the 6-bit sub-stage successive approximation analog-to-digital converter is output to the high six input terminals of the digital delay calibration unit, The output end of the operational amplifier is connected to the input end of the 7-bit sub-stage successive approximation analog-to-digital converter, and the digital signal output of the 7-bit sub-stage successive approximation analog-to-digital converter is connected to the lower six inputs of the digital delay calibration unit end. The invention can effectively realize the combination of the pipeline analog-to-digital converter and the successive approximation comparator, effectively improve the comprehensive performance of the analog-to-digital converter, has lower power consumption than similar analog-to-digital converters, and has wide application prospects in deep submicron technology.