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2 results about "Critical phase" patented technology

Elevator diagnosis method and system based on functional safety

According to the elevator diagnosis method and system based on functional safety, functional safety diagnosis is paused in the running stage of an elevator needing to be quickly responded, a control system can centralize resources to process related tasks, such as accurate control over elevator car leveling and timely response to door machine instructions, response delay caused by diagnosis program interference is avoided, and the service life of the elevator is prolonged. The probability of accidents caused by untimely response is reduced, and quick and accurate response in a key stage is guaranteed; secondly, by setting the threshold duration of pause function safety diagnosis and overtime forced recovery diagnosis, long-time non-monitoring in the quick response stage is avoided, and in the normal operation stage of the elevator, diagnosis is recovered and periodically executed, the elevator function is continuously detected, potential safety problems are found and early warned in time, so that maintenance and repair measures are taken, and the safety of the elevator is guaranteed. The response speed and safety monitoring are balanced, the safety monitoring effectiveness of the overall function of the elevator is guaranteed, and the operation safety is improved.
Owner:HITACHI BUILDING TECH GUANGZHOU CO LTD

Method and system for managing the service life of a driving chip based on digital twinning

PendingCN122364035APhysical layerTerm memory
This invention discloses a method and system for managing the lifespan of a driver chip based on digital twins. The invention relates to the technical field of driver chips. By tracing the various deviations output by the driver chip twin, corresponding multi-source anomaly data is determined. This multi-source anomaly data is then mapped in multiple directions to the actual working content of the driver chip at the physical layer, thereby dynamically constructing a corresponding lifespan topology map. Furthermore, by combining a long short-term memory mechanism, corresponding temporal degradation features are extracted, improving the accuracy of the driver chip's temporal degradation features. Multi-level iterations are performed on each critical phase transition point to predict the driver chip's lifespan characteristic combination under current operating conditions, determining the remaining lifespan of the driver chip. This remaining lifespan is then integrated with the current usage history of the driver chip, improving the accuracy of the driver chip's lifespan management system.